Lines Matching refs:leftStep
100 leftStep RN 4 ;// input variable
124 M_LDR leftStep, LeftStep ;// Arg leftStep loaded from stack to reg
145 M_LDRB Left0, [pSrcLeft], leftStep ;// Left0 = pSrcLeft[0]
146 M_LDRB Left1, [pSrcLeft], leftStep ;// Left1 = pSrcLeft[1]
147 M_LDRB Left2, [pSrcLeft], leftStep ;// Left2 = pSrcLeft[2]
174 M_LDRB Left0, [pSrcLeft], leftStep ;// Left0 = pSrcLeft[0]
175 M_LDRB Left1, [pSrcLeft], leftStep ;// Left1 = pSrcLeft[1]
177 M_LDRB Left2, [pSrcLeft], leftStep ;// Left2 = pSrcLeft[2]
245 M_LDRB Left0, [pSrcLeft], leftStep ;// Left0 = pSrcLeft[0]
246 M_LDRB Left1, [pSrcLeft], leftStep ;// Left1 = pSrcLeft[1]
247 M_LDRB Left2, [pSrcLeft], leftStep ;// Left2 = pSrcLeft[2]
374 M_LDRB Left0, [pSrcLeft], leftStep ;// Left0 = pSrcLeft[0]
375 M_LDRB Left1, [pSrcLeft], leftStep ;// Left1 = pSrcLeft[1]
376 M_LDRB Left2, [pSrcLeft], leftStep ;// Left2 = pSrcLeft[2]
417 M_LDRB Left0, [pSrcLeft], leftStep ;// Left0 = 00 00 00 L0
418 M_LDRB Left1, [pSrcLeft], leftStep ;// Left1 = 00 00 00 L1
459 M_LDRB Left0, [pSrcLeft], leftStep ;// Left0 = 00 00 00 L0
460 M_LDRB Left1, [pSrcLeft], leftStep ;// Left1 = 00 00 00 L1
461 M_LDRB Left2, [pSrcLeft], leftStep ;// Left2 = 00 00 00 L2
543 M_LDRB Left0, [pSrcLeft], leftStep ;// Left0 = pSrcLeft[0]
544 M_LDRB Left1, [pSrcLeft], leftStep ;// Left1 = pSrcLeft[1]
545 M_LDRB Left2, [pSrcLeft], leftStep ;// Left2 = pSrcLeft[2]