Searched defs:Offset (Results 326 - 350 of 428) sorted by relevance

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/external/llvm/lib/CodeGen/SelectionDAG/
H A DFastISel.cpp477 // Keep a running tab of the total offset to coalesce multiple N = N + Offset
490 // N = N + Offset
508 // N = N + Offset
720 unsigned Offset = 0; local
724 Offset = FuncInfo.getArgumentFrameIndex(Arg);
725 if (Offset)
726 Op = MachineOperand::CreateFI(Offset);
H A DSelectionDAGISel.cpp495 unsigned Offset = IsIndirect ? MI->getOperand(1).getImm() : 0; local
500 LDI->second, Offset, Variable);
523 Offset, Variable);
/external/llvm/lib/MC/
H A DELFObjectWriter.cpp83 uint64_t Offset; // Where is the relocation. member in struct:__anon25871::ELFRelocationEntry
92 ELFRelocationEntry(uint64_t Offset, const MCSymbol *Symbol, unsigned Type, argument
94 : Offset(Offset), UseSymbol(true), Symbol(Symbol), Type(Type),
97 ELFRelocationEntry(uint64_t Offset, const MCSectionData *Section, argument
99 : Offset(Offset), UseSymbol(false), Section(Section), Type(Type),
288 uint64_t Address, uint64_t Offset,
307 uint64_t Offset, uint64_t Size, uint64_t Alignment,
1313 uint64_t Offset, uint64_
1311 WriteSecHdrEntry(uint32_t Name, uint32_t Type, uint64_t Flags, uint64_t Address, uint64_t Offset, uint64_t Size, uint32_t Link, uint32_t Info, uint64_t Alignment, uint64_t EntrySize) argument
1508 WriteSection(MCAssembler &Asm, const SectionIndexMapTy &SectionIndexMap, uint32_t GroupSymbolIndex, uint64_t Offset, uint64_t Size, uint64_t Alignment, const MCSectionELF &Section) argument
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H A DMCAsmStreamer.cpp184 bool EmitValueToOffset(const MCExpr *Offset,
199 void EmitCFIDefCfa(int64_t Register, int64_t Offset) override;
200 void EmitCFIDefCfaOffset(int64_t Offset) override;
202 void EmitCFIOffset(int64_t Register, int64_t Offset) override;
208 void EmitCFIRelOffset(int64_t Register, int64_t Offset) override;
220 void EmitWinCFISetFrame(unsigned Register, unsigned Offset) override;
222 void EmitWinCFISaveReg(unsigned Register, unsigned Offset) override;
223 void EmitWinCFISaveXMM(unsigned Register, unsigned Offset) override;
811 bool MCAsmStreamer::EmitValueToOffset(const MCExpr *Offset, argument
813 // FIXME: Verify that Offset i
953 EmitCFIDefCfa(int64_t Register, int64_t Offset) argument
957 OS << ", " << Offset; local
961 EmitCFIDefCfaOffset(int64_t Offset) argument
963 OS << "\\t.cfi_def_cfa_offset " << Offset; local
974 EmitCFIOffset(int64_t Register, int64_t Offset) argument
978 OS << ", " << Offset; local
1014 EmitCFIRelOffset(int64_t Register, int64_t Offset) argument
1018 OS << ", " << Offset; local
1129 EmitWinCFISetFrame(unsigned Register, unsigned Offset) argument
1132 OS << "\\t.seh_setframe " << Register << ", " << Offset; local
1143 EmitWinCFISaveReg(unsigned Register, unsigned Offset) argument
1146 OS << "\\t.seh_savereg " << Register << ", " << Offset; local
1150 EmitWinCFISaveXMM(unsigned Register, unsigned Offset) argument
1153 OS << "\\t.seh_savexmm " << Register << ", " << Offset; local
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H A DMCDwarf.cpp1132 Streamer.AddComment(Twine("Offset " + Twine(CFAOffset)));
1149 Streamer.AddComment(Twine("Offset " + Twine(CFAOffset)));
1173 int Offset = Instr.getOffset(); local
1175 Offset -= CFAOffset;
1176 Offset = Offset / dataAlignmentFactor;
1178 if (Offset < 0) {
1183 if (VerboseAsm) Streamer.AddComment(Twine("Offset ") + Twine(Offset));
1184 Streamer.EmitSLEB128IntValue(Offset);
[all...]
H A DMCStreamer.cpp286 void MCStreamer::EmitCFIDefCfa(int64_t Register, int64_t Offset) { argument
289 MCCFIInstruction::createDefCfa(Label, Register, Offset);
294 void MCStreamer::EmitCFIDefCfaOffset(int64_t Offset) { argument
297 MCCFIInstruction::createDefCfaOffset(Label, Offset);
318 void MCStreamer::EmitCFIOffset(int64_t Register, int64_t Offset) { argument
321 MCCFIInstruction::createOffset(Label, Register, Offset);
326 void MCStreamer::EmitCFIRelOffset(int64_t Register, int64_t Offset) { argument
329 MCCFIInstruction::createRelOffset(Label, Register, Offset);
500 void MCStreamer::EmitWinCFISetFrame(unsigned Register, unsigned Offset) { argument
505 if (Offset
529 EmitWinCFISaveReg(unsigned Register, unsigned Offset) argument
542 EmitWinCFISaveXMM(unsigned Register, unsigned Offset) argument
684 EmitValueToOffset(const MCExpr *Offset, unsigned char Value) argument
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/external/llvm/lib/Object/
H A DMachOObjectFile.cpp273 static const char *getPtr(const MachOObjectFile *O, size_t Offset) { argument
274 return O->getData().substr(Offset, 1).data();
702 uint32_t Offset; local
707 Offset = Sect.offset;
711 Offset = Sect.offset;
715 Res = this->getData().substr(Offset, Size);
848 uint64_t Offset; local
849 getRelocationOffset(Rel, Offset);
855 Res = SecAddress + Offset;
883 uint64_t Offset local
1419 unsigned Offset = Symtab.symoff + local
1839 uint32_t Offset; local
1871 uint64_t Offset = DLC.indirectsymoff + Index * sizeof(uint32_t); local
1878 uint64_t Offset = DataOffset + Index * sizeof(MachO::data_in_code_entry); local
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/external/llvm/lib/Target/AArch64/
H A DAArch64FastISel.cpp57 int64_t Offset; member in class:__anon25940::AArch64FastISel::Address
60 Address() : Kind(RegBase), Offset(0) { Base.Reg = 0; }
81 void setOffset(int64_t O) { Offset = O; }
82 int64_t getOffset() { return Offset; }
446 int64_t Offset = Addr.getOffset(); local
459 needsLowering = ((Offset & 0xfff) != Offset);
462 needsLowering = (Offset > 256 || Offset < -256);
497 int64_t Offset local
565 int64_t Offset = Addr.getOffset(); local
660 int64_t Offset = Addr.getOffset(); local
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H A DAArch64ISelDAGToDAG.cpp116 bool SelectAddrModeWRO(SDValue N, SDValue &Base, SDValue &Offset, argument
118 return SelectAddrModeWRO(N, Width / 8, Base, Offset, SignExtend, DoShift);
122 bool SelectAddrModeXRO(SDValue N, SDValue &Base, SDValue &Offset, argument
124 return SelectAddrModeXRO(N, Width / 8, Base, Offset, SignExtend, DoShift);
172 SDValue &Offset, SDValue &SignExtend,
175 SDValue &Offset, SDValue &SignExtend,
179 SDValue &Offset, SDValue &SignExtend);
677 bool WantExtend, SDValue &Offset,
690 Offset = narrowIfNeeded(CurDAG, N.getOperand(0).getOperand(0));
693 Offset
676 SelectExtendedSHL(SDValue N, unsigned Size, bool WantExtend, SDValue &Offset, SDValue &SignExtend) argument
709 SelectAddrModeWRO(SDValue N, unsigned Size, SDValue &Base, SDValue &Offset, SDValue &SignExtend, SDValue &DoShift) argument
780 SelectAddrModeXRO(SDValue N, unsigned Size, SDValue &Base, SDValue &Offset, SDValue &SignExtend, SDValue &DoShift) argument
967 SDValue Offset = CurDAG->getTargetConstant(OffsetVal, MVT::i64); local
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/external/llvm/lib/Target/ARM/
H A DARMConstantIslandPass.cpp89 /// Offset - Distance from the beginning of the function to the beginning
98 unsigned Offset; member in struct:__anon25967::ARMConstantIslands::BasicBlockInfo
107 /// KnownBits - The number of low bits in Offset that are known to be
108 /// exact. The remaining bits of Offset are an upper bound.
121 BasicBlockInfo() : Offset(0), Size(0), KnownBits(0), Unalign(0),
140 unsigned PO = Offset + Size;
336 assert(!MBBId || BBInfo[MBBId - 1].postOffset() <= BBInfo[MBBId].Offset);
362 dbgs() << format("%08x BB#%u\t", BBI.Offset, J)
833 unsigned Offset = BBInfo[MBB->getNumber()].Offset; local
1078 unsigned Offset = BBInfo[i - 1].postOffset(LogAlign); local
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H A DARMFrameLowering.cpp454 unsigned Offset = MFI->getObjectOffset(FI); local
456 MCCFIInstruction::createOffset(nullptr, DwarfReg, Offset));
485 unsigned Offset = MFI->getObjectOffset(FI); local
487 MCCFIInstruction::createOffset(nullptr, DwarfReg, Offset));
723 int Offset = MFI->getObjectOffset(FI) + MFI->getStackSize(); local
724 int FPOffset = Offset - AFI->getFramePtrSpillOffset();
728 Offset += SPAdj;
740 Offset = FPOffset;
746 return Offset;
771 if (Offset >
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H A DARMLoadStoreOptimizer.cpp84 int Offset; member in struct:__anon25980::ARMLoadStoreOpt::MemOpQueueEntry
92 : Offset(o), Reg(r), isKill(k), Position(p), MBBI(i), Merged(false) {}
105 int Offset, unsigned Base, bool BaseKill, int Opcode,
115 int Offset,
344 int Offset; local
357 Offset = MO.getImm() - WordOffset * getImmScale(Opc);
358 if (Offset >= 0)
359 MO.setImm(Offset);
368 Offset = (Opc == ARM::tSUBi8) ?
371 if (TL->isLegalAddImmediate(Offset)) {
413 MergeOps(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, int Offset, unsigned Base, bool BaseKill, int Opcode, ARMCC::CondCodes Pred, unsigned PredReg, unsigned Scratch, DebugLoc dl, ArrayRef<std::pair<unsigned, bool> > Regs, ArrayRef<unsigned> ImpDefs) argument
610 MergeOpsUpdate(MachineBasicBlock &MBB, MemOpQueue &memOps, unsigned memOpsBegin, unsigned memOpsEnd, unsigned insertAfter, int Offset, unsigned Base, bool BaseKill, int Opcode, ARMCC::CondCodes Pred, unsigned PredReg, unsigned Scratch, DebugLoc dl, SmallVectorImpl<MachineBasicBlock::iterator> &Merges) argument
714 int Offset = MemOps[SIndex].Offset; local
1220 int Offset = AddSub == ARM_AM::sub ? -Bytes : Bytes; local
1225 int Offset = ARM_AM::getAM2Opc(AddSub, Bytes, ARM_AM::no_shift); local
1231 int Offset = AddSub == ARM_AM::sub ? -Bytes : Bytes; local
1243 int Offset = ARM_AM::getAM2Opc(AddSub, Bytes, ARM_AM::no_shift); local
1249 int Offset = AddSub == ARM_AM::sub ? -Bytes : Bytes; local
1346 int Offset = isAM3 ? ARM_AM::getAM3Offset(OffField) local
1358 InsertLDR_STR(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI, int Offset, bool isDef, DebugLoc dl, unsigned NewOpc, unsigned Reg, bool RegDeadKill, bool RegUndef, unsigned BaseReg, bool BaseKill, bool BaseUndef, bool OffKill, bool OffUndef, ARMCC::CondCodes Pred, unsigned PredReg, const TargetInstrInfo *TII, bool isT2) argument
1536 int Offset = getMemoryOpOffset(MBBI); local
1875 CanFormLdStDWord(MachineInstr *Op0, MachineInstr *Op1, DebugLoc &dl, unsigned &NewOpc, unsigned &EvenReg, unsigned &OddReg, unsigned &BaseReg, int &Offset, unsigned &PredReg, ARMCC::CondCodes &Pred, bool &isT2) argument
1993 int Offset = getMemoryOpOffset(Op); local
2041 int Offset = 0; local
2141 int Offset = getMemoryOpOffset(MI); local
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/external/llvm/lib/Target/Hexagon/
H A DHexagonISelDAGToDAG.cpp75 bool SelectMEMriS11_2(SDValue& Addr, SDValue &Base, SDValue &Offset);
77 bool SelectADDRrr(SDValue &Addr, SDValue &Base, SDValue &Offset);
91 bool SelectAddr(SDNode *Op, SDValue Addr, SDValue &Base, SDValue &Offset);
365 static bool OffsetFitsS11(EVT MemType, int64_t Offset) { argument
366 if (MemType == MVT::i64 && isShiftedInt<11,3>(Offset)) {
369 if (MemType == MVT::i32 && isShiftedInt<11,2>(Offset)) {
372 if (MemType == MVT::i16 && isShiftedInt<11,1>(Offset)) {
375 if (MemType == MVT::i8 && isInt<11>(Offset)) {
396 int64_t Offset = cast<GlobalAddressSDNode>(Base)->getOffset(); local
397 if (Offset !
440 SDValue Offset = LD->getOffset(); local
507 SDValue Offset = LD->getOffset(); local
583 SDValue Offset = LD->getOffset(); local
695 SDValue Offset = ST->getOffset(); local
779 int64_t Offset = cast<GlobalAddressSDNode>(Base)->getOffset(); local
1397 SelectADDRri(SDValue& Addr, SDValue &Base, SDValue &Offset) argument
1414 SelectADDRriS11_0(SDValue& Addr, SDValue &Base, SDValue &Offset) argument
1431 SelectADDRriS11_1(SDValue& Addr, SDValue &Base, SDValue &Offset) argument
1448 SelectADDRriS11_2(SDValue& Addr, SDValue &Base, SDValue &Offset) argument
1465 SelectADDRriU6_0(SDValue& Addr, SDValue &Base, SDValue &Offset) argument
1482 SelectADDRriU6_1(SDValue& Addr, SDValue &Base, SDValue &Offset) argument
1499 SelectADDRriU6_2(SDValue& Addr, SDValue &Base, SDValue &Offset) argument
1516 SelectMEMriS11_2(SDValue& Addr, SDValue &Base, SDValue &Offset) argument
1527 SelectADDRriS11_3(SDValue& Addr, SDValue &Base, SDValue &Offset) argument
1567 SelectAddr(SDNode *Op, SDValue Addr, SDValue &Base, SDValue &Offset) argument
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H A DHexagonISelLowering.cpp153 unsigned Offset = State.AllocateStack(ArgFlags.getByValSize(), 4); local
154 State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset, LocVT, LocInfo));
196 unsigned Offset = State.AllocateStack(4, 4); local
197 State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset, LocVT, LocInfo));
221 unsigned Offset = State.AllocateStack(8, 8, Hexagon::D2); local
222 State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset, LocVT, LocInfo));
268 unsigned Offset = State.AllocateStack(4, 4); local
269 State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset, LocVT, LocInfo));
283 unsigned Offset = State.AllocateStack(8, 8); local
284 State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset, LocV
615 getIndexedAddressParts(SDNode *Ptr, EVT VT, bool isSEXTLoad, SDValue &Base, SDValue &Offset, bool &isInc, SelectionDAG &DAG) argument
653 getPostIndexedAddressParts(SDNode *N, SDNode *Op, SDValue &Base, SDValue &Offset, ISD::MemIndexedMode &AM, SelectionDAG &DAG) const argument
980 SDValue Offset = DAG.getConstant(4, MVT::i32); local
1021 int64_t Offset = cast<GlobalAddressSDNode>(Op)->getOffset(); local
1521 SDValue Offset = Op.getOperand(1); local
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/external/llvm/lib/Target/Mips/
H A DMipsConstantIslandPass.cpp211 /// Offset - Distance from the beginning of the function to the beginning
220 unsigned Offset; member in struct:__anon26048::MipsConstantIslands::BasicBlockInfo
232 unsigned PO = Offset + Size;
236 BasicBlockInfo() : Offset(0), Size(0) {}
437 dbgs() << format("%08x BB#%u\t", BBI.Offset, J)
835 unsigned Offset = BBInfo[MBB->getNumber()].Offset; local
840 Offset += TII->GetInstSizeInBytes(I);
842 return Offset;
979 NextBlockOffset = BBInfo[NextBlock->getNumber()].Offset;
1051 unsigned Offset = BBInfo[i - 1].Offset + BBInfo[i - 1].Size; local
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/external/llvm/lib/Target/PowerPC/
H A DPPCFastISel.cpp75 long Offset; member in struct:__anon26084::Address
79 : BaseType(RegBase), Offset(0) {
317 long TmpOffset = Addr.Offset;
353 Addr.Offset = TmpOffset;
400 if (!isInt<16>(Addr.Offset))
417 const ConstantInt *Offset = local
418 ConstantInt::getSigned(OffsetTy, (int64_t)(Addr.Offset));
419 IndexReg = PPCMaterializeInt(Offset, MVT::i64);
465 if ((Opc == PPC::LWA || Opc == PPC::LWA_32) && ((Addr.Offset & 3) != 0))
472 UseOffset = ((Addr.Offset
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H A DPPCISelDAGToDAG.cpp1071 SDValue Offset = LD->getOffset(); local
1072 if (Offset.getOpcode() == ISD::TargetConstant ||
1073 Offset.getOpcode() == ISD::TargetGlobalAddress) {
1104 SDValue Ops[] = { Offset, Base, Chain };
1139 SDValue Ops[] = { Base, Offset, Chain };
1370 SDValue Base, Offset; local
1373 SelectAddrIdxOnly(LD->getBasePtr(), Base, Offset)) {
1375 SDValue Ops[] = { Base, Offset, Chain };
/external/llvm/lib/Target/R600/
H A DSIISelLowering.cpp290 unsigned Offset, bool Signed) const {
297 DAG.getConstant(Offset, MVT::i64));
1155 unsigned Offset = N->getOpcode() - AMDGPUISD::CVT_F32_UBYTE0; local
1158 APInt Demanded = APInt::getBitsSet(32, 8 * Offset, 8 * Offset + 8);
1701 ConstantSDNode *Offset = cast<ConstantSDNode>(N->getOperand(1)); local
1706 DAG.getConstant(Offset->getSExtValue() << 2, MVT::i32)
288 LowerParameter(SelectionDAG &DAG, EVT VT, EVT MemVT, SDLoc DL, SDValue Chain, unsigned Offset, bool Signed) const argument
H A DSIInstrInfo.cpp1298 uint32_t Offset = Imm & 0x3f; // Extract bits [5:0]. local
1305 Inst->addOperand(MachineOperand::CreateImm(Offset));
/external/llvm/lib/Target/XCore/
H A DXCoreISelLowering.cpp291 int64_t Offset = GN->getOffset(); local
294 int64_t FoldedOffset = std::max(Offset & ~3, (int64_t)0);
298 if (Offset != FoldedOffset) {
299 SDValue Remaining = DAG.getConstant(Offset - FoldedOffset, MVT::i32);
308 Constant *Idx = ConstantInt::get(Ty, Offset);
375 int64_t Offset, SelectionDAG &DAG) const
377 if ((Offset & 0x3) == 0) {
382 int32_t HighOffset = RoundUpToAlignment(Offset, 4);
397 SDValue LowShift = DAG.getConstant((Offset - LowOffset) * 8, MVT::i32);
398 SDValue HighShift = DAG.getConstant((HighOffset - Offset) *
374 lowerLoadWordFromAlignedBasePlusOffset(SDLoc DL, SDValue Chain, SDValue Base, int64_t Offset, SelectionDAG &DAG) const argument
444 int64_t Offset = 0; local
844 SDValue Offset = Op.getOperand(1); local
1173 int Offset = VA.getLocMemOffset(); local
1496 int Offset = VA.getLocMemOffset(); local
[all...]
/external/llvm/lib/Transforms/InstCombine/
H A DInstCombineAddSub.cpp1439 Value *Offset = EmitGEPOffset(GEP2); local
1440 Result = Builder->CreateSub(Result, Offset);
H A DInstCombineCasts.cpp26 /// X*Scale+Offset.
29 uint64_t &Offset) {
31 Offset = CI->getZExtValue();
41 Offset = 0;
49 Offset = 0;
56 Offset = 0;
65 DecomposeSimpleLinearExpr(I->getOperand(0), SubScale, Offset);
66 Offset += RHS->getZExtValue();
75 Offset = 0;
137 if (uint64_t Offset
28 DecomposeSimpleLinearExpr(Value *Val, unsigned &Scale, uint64_t &Offset) argument
[all...]
/external/llvm/lib/Transforms/Instrumentation/
H A DDataFlowSanitizer.cpp1073 uint64_t Offset = 0; local
1084 Value *CurShadowVecAddr = IRB.CreateConstGEP1_32(ShadowVecAddr, Offset);
1087 ++Offset;
1089 Offset *= ShadowVecSize;
1092 Value *CurShadowAddr = IRB.CreateConstGEP1_32(ShadowAddr, Offset);
1095 ++Offset;
/external/llvm/lib/Transforms/Scalar/
H A DScalarReplAggregates.cpp154 void isSafeForScalarRepl(Instruction *I, uint64_t Offset, AllocaInfo &Info);
155 void isSafePHISelectUseForScalarRepl(Instruction *User, uint64_t Offset,
157 void isSafeGEP(GetElementPtrInst *GEPI, uint64_t &Offset, AllocaInfo &Info);
158 void isSafeMemAccess(uint64_t Offset, uint64_t MemSize,
161 bool TypeHasComponent(Type *T, uint64_t Offset, uint64_t Size);
162 uint64_t FindElementAndOffset(Type *&T, uint64_t &Offset,
169 void RewriteForScalarRepl(Instruction *I, AllocaInst *AI, uint64_t Offset,
171 void RewriteBitCast(BitCastInst *BC, AllocaInst *AI, uint64_t Offset,
173 void RewriteGEP(GetElementPtrInst *GEPI, AllocaInst *AI, uint64_t Offset,
176 uint64_t Offset,
399 MergeInTypeForLoadOrStore(Type *In, uint64_t Offset) argument
443 MergeInVectorType(VectorType *VInTy, uint64_t Offset) argument
469 CanConvertToScalar(Value *V, uint64_t Offset, Value* NonConstantIdx) argument
598 ConvertUsesToScalar(Value *Ptr, AllocaInst *NewAI, uint64_t Offset, Value* NonConstantIdx) argument
764 ConvertScalar_ExtractValue(Value *FromVal, Type *ToType, uint64_t Offset, Value* NonConstantIdx, IRBuilder<> &Builder) argument
899 ConvertScalar_InsertValue(Value *SV, Value *Old, uint64_t Offset, Value* NonConstantIdx, IRBuilder<> &Builder) argument
1597 isSafeForScalarRepl(Instruction *I, uint64_t Offset, AllocaInfo &Info) argument
1657 isSafePHISelectUseForScalarRepl(Instruction *I, uint64_t Offset, AllocaInfo &Info) argument
1707 isSafeGEP(GetElementPtrInst *GEPI, uint64_t &Offset, AllocaInfo &Info) argument
1788 isSafeMemAccess(uint64_t Offset, uint64_t MemSize, Type *MemOpType, bool isStore, AllocaInfo &Info, Instruction *TheAccess, bool AllowWholeAccess) argument
1827 TypeHasComponent(Type *T, uint64_t Offset, uint64_t Size) argument
1863 RewriteForScalarRepl(Instruction *I, AllocaInst *AI, uint64_t Offset, SmallVectorImpl<AllocaInst *> &NewElts) argument
1977 RewriteBitCast(BitCastInst *BC, AllocaInst *AI, uint64_t Offset, SmallVectorImpl<AllocaInst *> &NewElts) argument
2005 FindElementAndOffset(Type *&T, uint64_t &Offset, Type *&IdxTy) argument
2035 RewriteGEP(GetElementPtrInst *GEPI, AllocaInst *AI, uint64_t Offset, SmallVectorImpl<AllocaInst *> &NewElts) argument
2096 RewriteLifetimeIntrinsic(IntrinsicInst *II, AllocaInst *AI, uint64_t Offset, SmallVectorImpl<AllocaInst *> &NewElts) argument
[all...]
/external/llvm/lib/Transforms/Utils/
H A DSimplifyLibCalls.cpp974 size_t Offset = SearchStr.find(ToFindStr); variable
976 if (Offset == StringRef::npos) // strstr("foo", "bar") -> null
981 Result = B.CreateConstInBoundsGEP1_64(Result, Offset, "strstr");

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