| /external/llvm/lib/CodeGen/ |
| H A D | TargetLoweringBase.cpp | 420 RTLIB::Libcall RTLIB::getFPEXT(EVT OpVT, EVT RetVT) { argument
422 if (RetVT == MVT::f64)
424 if (RetVT == MVT::f128)
427 if (RetVT == MVT::f128)
436 RTLIB::Libcall RTLIB::getFPROUND(EVT OpVT, EVT RetVT) { argument
437 if (RetVT == MVT::f32) {
446 } else if (RetVT == MVT::f64) {
460 RTLIB::Libcall RTLIB::getFPTOSINT(EVT OpVT, EVT RetVT) { argument
462 if (RetVT == MVT::i8)
464 if (RetVT
510 getFPTOUINT(EVT OpVT, EVT RetVT) argument
560 getSINTTOFP(EVT OpVT, EVT RetVT) argument
600 getUINTTOFP(EVT OpVT, EVT RetVT) argument
[all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | FastISel.cpp | 1584 unsigned FastISel::FastEmitInst_extractsubreg(MVT RetVT, argument
1587 unsigned ResultReg = createResultReg(TLI.getRegClassFor(RetVT));
|
| H A D | TargetLowering.cpp | 84 /// result of type RetVT.
87 RTLIB::Libcall LC, EVT RetVT,
105 Type *RetTy = RetVT.getTypeForEVT(*DAG.getContext());
199 EVT RetVT = getCmpLibcallReturnType(); local
201 NewLHS = makeLibCall(DAG, LC1, RetVT, Ops, 2, false/*sign irrelevant*/,
203 NewRHS = DAG.getConstant(0, RetVT);
207 getSetCCResultType(*DAG.getContext(), RetVT),
209 NewLHS = makeLibCall(DAG, LC2, RetVT, Ops, 2, false/*sign irrelevant*/,
212 getSetCCResultType(*DAG.getContext(), RetVT), NewLHS,
86 makeLibCall(SelectionDAG &DAG, RTLIB::Libcall LC, EVT RetVT, const SDValue *Ops, unsigned NumOps, bool isSigned, SDLoc dl, bool doesNotReturn, bool isReturnValueUsed) const argument
|
| H A D | LegalizeVectorTypes.cpp | 2647 EVT RetVT = WidenEltVT; local
2649 return RetVT;
2663 RetVT = MemVT;
2679 if (RetVT.getSizeInBits() < MemVTWidth || MemVT == WidenVT)
2684 return RetVT;
|
| /external/llvm/lib/Target/AArch64/ |
| H A D | AArch64FastISel.cpp | 144 bool FinishCall(MVT RetVT, SmallVectorImpl<unsigned> &UsedRegs,
1274 bool AArch64FastISel::FinishCall(MVT RetVT, SmallVectorImpl<unsigned> &UsedRegs, argument
1284 if (RetVT != MVT::isVoid) {
1287 CCInfo.AnalyzeCallResult(RetVT, CCAssignFnForCall(CC));
1333 MVT RetVT;
1336 RetVT = MVT::isVoid;
1337 else if (!isTypeLegal(RetTy, RetVT))
1418 if (!FinishCall(RetVT, UsedRegs, I, CC, NumBytes))
|
| /external/llvm/lib/Target/PowerPC/ |
| H A D | PPCFastISel.cpp | 175 void finishCall(MVT RetVT, SmallVectorImpl<unsigned> &UsedRegs,
1308 void PPCFastISel::finishCall(MVT RetVT, SmallVectorImpl<unsigned> &UsedRegs, argument
1319 if (RetVT != MVT::isVoid) {
1322 CCInfo.AnalyzeCallResult(RetVT, RetCC_PPC64_ELF_FIS);
1332 if (RetVT == MVT::i8 || RetVT == MVT::i16 || RetVT == MVT::i32)
1338 if (RetVT == CopyVT) {
1348 ResultReg = createResultReg(TLI.getRegClassFor(RetVT));
1356 } else if (RetVT
1399 MVT RetVT; local
[all...] |
| /external/llvm/lib/Target/ARM/ |
| H A D | ARMFastISel.cpp | 208 bool FinishCall(MVT RetVT, SmallVectorImpl<unsigned> &UsedRegs,
2017 bool ARMFastISel::FinishCall(MVT RetVT, SmallVectorImpl<unsigned> &UsedRegs, argument
2027 if (RetVT != MVT::isVoid) {
2030 CCInfo.AnalyzeCallResult(RetVT, CCAssignFnForCall(CC, true, isVarArg));
2033 if (RVLocs.size() == 2 && RetVT == MVT::f64) {
2054 if (RetVT == MVT::i1 || RetVT == MVT::i8 || RetVT == MVT::i16)
2186 MVT RetVT; local
2188 RetVT
2295 MVT RetVT; local
[all...] |
| /external/llvm/lib/Target/X86/ |
| H A D | X86FastISel.cpp | 114 bool X86FastEmitCMoveSelect(MVT RetVT, const Instruction *I);
116 bool X86FastEmitSSESelect(MVT RetVT, const Instruction *I);
118 bool X86FastEmitPseudoSelect(MVT RetVT, const Instruction *I);
292 MVT RetVT; local
296 if (!isTypeLegal(RetTy, RetVT))
299 if (RetVT != MVT::i32 && RetVT != MVT::i64)
1734 bool X86FastISel::X86FastEmitCMoveSelect(MVT RetVT, const Instruction *I) { argument
1740 if (RetVT < MVT::i16 || RetVT > MV
1854 X86FastEmitSSESelect(MVT RetVT, const Instruction *I) argument
1935 X86FastEmitPseudoSelect(MVT RetVT, const Instruction *I) argument
2000 MVT RetVT; local
[all...] |