/external/chromium_org/third_party/mesa/src/src/mesa/drivers/dri/r200/ |
H A D | radeon_mipmap_tree.h | 75 GLuint height0; /** Height of baseLevel image */ member in struct:_radeon_mipmap_tree 105 GLuint width0, GLuint height0, GLuint depth0, GLuint tilebits);
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H A D | radeon_mipmap_tree.c | 171 mt->levels[level].height = minify(mt->height0, i); 190 GLuint width0, GLuint height0, GLuint depth0, GLuint tilebits) 205 mt->height0 = height0; 340 fprintf(stderr, "height0 %d vs %d\n", mtBaseLevel->height, firstImage->Height); 188 radeon_miptree_create(radeonContextPtr rmesa, GLenum target, gl_format mesaFormat, GLuint baseLevel, GLuint numLevels, GLuint width0, GLuint height0, GLuint depth0, GLuint tilebits) argument
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/external/chromium_org/third_party/mesa/src/src/mesa/drivers/dri/radeon/ |
H A D | radeon_mipmap_tree.h | 75 GLuint height0; /** Height of baseLevel image */ member in struct:_radeon_mipmap_tree 105 GLuint width0, GLuint height0, GLuint depth0, GLuint tilebits);
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H A D | radeon_mipmap_tree.c | 171 mt->levels[level].height = minify(mt->height0, i); 190 GLuint width0, GLuint height0, GLuint depth0, GLuint tilebits) 205 mt->height0 = height0; 340 fprintf(stderr, "height0 %d vs %d\n", mtBaseLevel->height, firstImage->Height); 188 radeon_miptree_create(radeonContextPtr rmesa, GLenum target, gl_format mesaFormat, GLuint baseLevel, GLuint numLevels, GLuint width0, GLuint height0, GLuint depth0, GLuint tilebits) argument
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/external/chromium_org/third_party/mesa/src/src/mesa/state_tracker/ |
H A D | st_texture.h | 75 * Note that the number of 1D array layers will be in height0 and the 78 GLuint width0, height0, depth0; member in struct:st_texture_object 153 GLuint height0,
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H A D | st_texture.c | 50 * width0, height0, depth0 are the dimensions of the level 0 image 60 GLuint height0, 70 assert(height0 > 0); 87 pt.height0 = height0; 196 ptHeight != u_minify(pt->height0, image->Level) || 318 u_minify(dst->height0, level)); 326 u_minify(dst->height0, level)); /* width, height */ 346 region.y = src->height0 / 2; 375 GLuint height = u_minify(dst->height0, dstLeve 55 st_texture_create(struct st_context *st, enum pipe_texture_target target, enum pipe_format format, GLuint last_level, GLuint width0, GLuint height0, GLuint depth0, GLuint layers, GLuint bind ) argument [all...] |
H A D | st_cb_texture.c | 252 GLuint *width0, GLuint *height0, GLuint *depth0) 307 *height0 = height; 343 stObj->width0 = stObj->height0 = stObj->depth0 = 0; 375 stObj->height0 = height; 1134 u_minify(stImage->pt->height0, src_level) == stImage->base.Height); 1226 height = stObj->height0; 1242 stObj->pt->height0 != ptHeight || 1289 stImage->base.Height == u_minify(stObj->height0, level) && 1323 stObj->height0 = height; 250 guess_base_level_size(GLenum target, GLuint width, GLuint height, GLuint depth, GLuint level, GLuint *width0, GLuint *height0, GLuint *depth0) argument
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/external/mesa3d/src/mesa/drivers/dri/r200/ |
H A D | radeon_mipmap_tree.h | 75 GLuint height0; /** Height of baseLevel image */ member in struct:_radeon_mipmap_tree 105 GLuint width0, GLuint height0, GLuint depth0, GLuint tilebits);
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H A D | radeon_mipmap_tree.c | 171 mt->levels[level].height = minify(mt->height0, i); 190 GLuint width0, GLuint height0, GLuint depth0, GLuint tilebits) 205 mt->height0 = height0; 340 fprintf(stderr, "height0 %d vs %d\n", mtBaseLevel->height, firstImage->Height); 188 radeon_miptree_create(radeonContextPtr rmesa, GLenum target, gl_format mesaFormat, GLuint baseLevel, GLuint numLevels, GLuint width0, GLuint height0, GLuint depth0, GLuint tilebits) argument
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/external/mesa3d/src/mesa/drivers/dri/radeon/ |
H A D | radeon_mipmap_tree.h | 75 GLuint height0; /** Height of baseLevel image */ member in struct:_radeon_mipmap_tree 105 GLuint width0, GLuint height0, GLuint depth0, GLuint tilebits);
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H A D | radeon_mipmap_tree.c | 171 mt->levels[level].height = minify(mt->height0, i); 190 GLuint width0, GLuint height0, GLuint depth0, GLuint tilebits) 205 mt->height0 = height0; 340 fprintf(stderr, "height0 %d vs %d\n", mtBaseLevel->height, firstImage->Height); 188 radeon_miptree_create(radeonContextPtr rmesa, GLenum target, gl_format mesaFormat, GLuint baseLevel, GLuint numLevels, GLuint width0, GLuint height0, GLuint depth0, GLuint tilebits) argument
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/external/mesa3d/src/mesa/state_tracker/ |
H A D | st_texture.h | 75 * Note that the number of 1D array layers will be in height0 and the 78 GLuint width0, height0, depth0; member in struct:st_texture_object 153 GLuint height0,
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H A D | st_texture.c | 50 * width0, height0, depth0 are the dimensions of the level 0 image 60 GLuint height0, 70 assert(height0 > 0); 87 pt.height0 = height0; 196 ptHeight != u_minify(pt->height0, image->Level) || 318 u_minify(dst->height0, level)); 326 u_minify(dst->height0, level)); /* width, height */ 346 region.y = src->height0 / 2; 375 GLuint height = u_minify(dst->height0, dstLeve 55 st_texture_create(struct st_context *st, enum pipe_texture_target target, enum pipe_format format, GLuint last_level, GLuint width0, GLuint height0, GLuint depth0, GLuint layers, GLuint bind ) argument [all...] |
/external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeonsi/ |
H A D | r600_blit.c | 260 unsigned height0; member in struct:texture_orig_info 279 orig->height0 = tex->height0; 291 new_height = util_format_get_nblocksy(tex->format, orig->height0); 294 tex->height0 = new_height; 311 tex->height0 = orig->height0; 391 sbox.height = texture->resource.b.b.height0;
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/external/chromium_org/third_party/mesa/src/src/mesa/drivers/dri/intel/ |
H A D | intel_mipmap_tree.h | 215 GLuint width0, height0, depth0; /**< Level zero image dimensions */ member in struct:intel_mipmap_tree 378 GLuint height0,
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H A D | intel_mipmap_tree.c | 81 GLuint height0, 103 mt->height0 = height0; 145 mt->height0, 193 GLuint height0, 237 height0, depth0, 806 mt->height0, 842 mt->height0, 1036 mt->singlesample_mt->height0); 1063 mt->singlesample_mt->height0); 75 intel_miptree_create_internal(struct intel_context *intel, GLenum target, gl_format format, GLuint first_level, GLuint last_level, GLuint width0, GLuint height0, GLuint depth0, bool for_region, GLuint num_samples, enum intel_msaa_layout msaa_layout) argument 187 intel_miptree_create(struct intel_context *intel, GLenum target, gl_format format, GLuint first_level, GLuint last_level, GLuint width0, GLuint height0, GLuint depth0, bool expect_accelerated_upload, GLuint num_samples, enum intel_msaa_layout msaa_layout) argument [all...] |
/external/mesa3d/src/gallium/drivers/radeonsi/ |
H A D | r600_blit.c | 260 unsigned height0; member in struct:texture_orig_info 279 orig->height0 = tex->height0; 291 new_height = util_format_get_nblocksy(tex->format, orig->height0); 294 tex->height0 = new_height; 311 tex->height0 = orig->height0; 391 sbox.height = texture->resource.b.b.height0;
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/external/mesa3d/src/mesa/drivers/dri/intel/ |
H A D | intel_mipmap_tree.h | 215 GLuint width0, height0, depth0; /**< Level zero image dimensions */ member in struct:intel_mipmap_tree 378 GLuint height0,
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H A D | intel_mipmap_tree.c | 81 GLuint height0, 103 mt->height0 = height0; 145 mt->height0, 193 GLuint height0, 237 height0, depth0, 806 mt->height0, 842 mt->height0, 1036 mt->singlesample_mt->height0); 1063 mt->singlesample_mt->height0); 75 intel_miptree_create_internal(struct intel_context *intel, GLenum target, gl_format format, GLuint first_level, GLuint last_level, GLuint width0, GLuint height0, GLuint depth0, bool for_region, GLuint num_samples, enum intel_msaa_layout msaa_layout) argument 187 intel_miptree_create(struct intel_context *intel, GLenum target, gl_format format, GLuint first_level, GLuint last_level, GLuint width0, GLuint height0, GLuint depth0, bool expect_accelerated_upload, GLuint num_samples, enum intel_msaa_layout msaa_layout) argument [all...] |
/external/chromium_org/third_party/mesa/src/src/gallium/drivers/r600/ |
H A D | r600_blit.c | 378 info->src.res->width0, info->src.res->height0, 389 unsigned dst_height = u_minify(info->dst.res->height0, info->dst.level); 395 dst_height == info->src.res->height0 && 435 templ.height0 = info->src.res->height0; 563 unsigned height0; member in struct:texture_orig_info 581 orig->height0 = tex->height0; 593 new_height = util_format_get_nblocksy(tex->format, orig->height0); 596 tex->height0 [all...] |
/external/mesa3d/src/gallium/drivers/r600/ |
H A D | r600_blit.c | 378 info->src.res->width0, info->src.res->height0, 389 unsigned dst_height = u_minify(info->dst.res->height0, info->dst.level); 395 dst_height == info->src.res->height0 && 435 templ.height0 = info->src.res->height0; 563 unsigned height0; member in struct:texture_orig_info 581 orig->height0 = tex->height0; 593 new_height = util_format_get_nblocksy(tex->format, orig->height0); 596 tex->height0 [all...] |
/external/chromium_org/third_party/mesa/src/src/mesa/drivers/dri/i915/ |
H A D | intel_mipmap_tree.c | 81 GLuint height0, 103 mt->height0 = height0; 145 mt->height0, 193 GLuint height0, 237 height0, depth0, 806 mt->height0, 842 mt->height0, 1036 mt->singlesample_mt->height0); 1063 mt->singlesample_mt->height0); 75 intel_miptree_create_internal(struct intel_context *intel, GLenum target, gl_format format, GLuint first_level, GLuint last_level, GLuint width0, GLuint height0, GLuint depth0, bool for_region, GLuint num_samples, enum intel_msaa_layout msaa_layout) argument 187 intel_miptree_create(struct intel_context *intel, GLenum target, gl_format format, GLuint first_level, GLuint last_level, GLuint width0, GLuint height0, GLuint depth0, bool expect_accelerated_upload, GLuint num_samples, enum intel_msaa_layout msaa_layout) argument [all...] |
/external/chromium_org/third_party/mesa/src/src/mesa/drivers/dri/i965/ |
H A D | intel_mipmap_tree.c | 81 GLuint height0, 103 mt->height0 = height0; 145 mt->height0, 193 GLuint height0, 237 height0, depth0, 806 mt->height0, 842 mt->height0, 1036 mt->singlesample_mt->height0); 1063 mt->singlesample_mt->height0); 75 intel_miptree_create_internal(struct intel_context *intel, GLenum target, gl_format format, GLuint first_level, GLuint last_level, GLuint width0, GLuint height0, GLuint depth0, bool for_region, GLuint num_samples, enum intel_msaa_layout msaa_layout) argument 187 intel_miptree_create(struct intel_context *intel, GLenum target, gl_format format, GLuint first_level, GLuint last_level, GLuint width0, GLuint height0, GLuint depth0, bool expect_accelerated_upload, GLuint num_samples, enum intel_msaa_layout msaa_layout) argument [all...] |
/external/mesa3d/src/mesa/drivers/dri/i915/ |
H A D | intel_mipmap_tree.c | 81 GLuint height0, 103 mt->height0 = height0; 145 mt->height0, 193 GLuint height0, 237 height0, depth0, 806 mt->height0, 842 mt->height0, 1036 mt->singlesample_mt->height0); 1063 mt->singlesample_mt->height0); 75 intel_miptree_create_internal(struct intel_context *intel, GLenum target, gl_format format, GLuint first_level, GLuint last_level, GLuint width0, GLuint height0, GLuint depth0, bool for_region, GLuint num_samples, enum intel_msaa_layout msaa_layout) argument 187 intel_miptree_create(struct intel_context *intel, GLenum target, gl_format format, GLuint first_level, GLuint last_level, GLuint width0, GLuint height0, GLuint depth0, bool expect_accelerated_upload, GLuint num_samples, enum intel_msaa_layout msaa_layout) argument [all...] |
/external/mesa3d/src/mesa/drivers/dri/i965/ |
H A D | intel_mipmap_tree.c | 81 GLuint height0, 103 mt->height0 = height0; 145 mt->height0, 193 GLuint height0, 237 height0, depth0, 806 mt->height0, 842 mt->height0, 1036 mt->singlesample_mt->height0); 1063 mt->singlesample_mt->height0); 75 intel_miptree_create_internal(struct intel_context *intel, GLenum target, gl_format format, GLuint first_level, GLuint last_level, GLuint width0, GLuint height0, GLuint depth0, bool for_region, GLuint num_samples, enum intel_msaa_layout msaa_layout) argument 187 intel_miptree_create(struct intel_context *intel, GLenum target, gl_format format, GLuint first_level, GLuint last_level, GLuint width0, GLuint height0, GLuint depth0, bool expect_accelerated_upload, GLuint num_samples, enum intel_msaa_layout msaa_layout) argument [all...] |