/art/compiler/optimizing/ |
H A D | parallel_move_resolver.cc | 150 bool ParallelMoveResolver::IsScratchLocation(Location loc) { argument 152 if (moves_.Get(i)->Blocks(loc)) { 158 if (moves_.Get(i)->GetDestination().Equals(loc)) {
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H A D | code_generator.cc | 156 Location loc = locations->InAt(i); local 157 if (loc.IsRegister()) { 159 DCHECK(!blocked_registers_[loc.GetEncoding()]); 160 blocked_registers_[loc.GetEncoding()] = true; 165 Location loc = locations->GetTemp(i); local 166 if (loc.IsRegister()) { 168 DCHECK(!blocked_registers_[loc.GetEncoding()]); 169 blocked_registers_[loc.GetEncoding()] = true; 177 Location loc = locations->InAt(i); local 179 if (loc 199 Location loc = locations->GetTemp(i); local [all...] |
/art/compiler/dex/quick/ |
H A D | gen_loadstore.cc | 388 RegLocation Mir2Lir::ForceTemp(RegLocation loc) { argument 389 DCHECK(!loc.wide); 390 DCHECK(loc.location == kLocPhysReg); 391 DCHECK(!loc.reg.IsFloat()); 392 if (IsTemp(loc.reg)) { 393 Clobber(loc.reg); 396 OpRegCopy(temp_low, loc.reg); 397 loc.reg = temp_low; 401 loc.s_reg_low = INVALID_SREG; 402 return loc; 405 ForceTempWide(RegLocation loc) argument [all...] |
H A D | mir_to_lir.cc | 42 RegisterClass Mir2Lir::LocToRegClass(RegLocation loc) { argument 44 if (loc.fp) { 45 DCHECK(!loc.ref) << "At most, one of ref/fp may be set"; 47 } else if (loc.ref) {
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H A D | ralloc_util.cc | 821 void Mir2Lir::MarkLive(RegLocation loc) { argument 822 RegStorage reg = loc.reg; 826 int s_reg = loc.s_reg_low; 853 if (loc.wide) { 858 if (loc.wide) { 909 void Mir2Lir::MarkClean(RegLocation loc) { argument 910 if (loc.reg.IsPair()) { 911 RegisterInfo* info = GetRegInfo(loc.reg.GetLow()); 913 info = GetRegInfo(loc.reg.GetHigh()); 916 RegisterInfo* info = GetRegInfo(loc 922 MarkDirty(RegLocation loc) argument 1008 UpdateLoc(RegLocation loc) argument 1033 UpdateLocWide(RegLocation loc) argument 1069 UpdateRawLoc(RegLocation loc) argument 1076 EvalLocWide(RegLocation loc, int reg_class, bool update) argument 1111 EvalLoc(RegLocation loc, int reg_class, bool update) argument 1153 RegLocation loc = mir_graph_->reg_location_[i]; local [all...] |
H A D | codegen_util.cc | 1286 RegLocation Mir2Lir::NarrowRegLoc(RegLocation loc) { argument 1287 if (loc.location == kLocPhysReg) { 1288 DCHECK(!loc.reg.Is32Bit()); 1289 if (loc.reg.IsPair()) { 1290 RegisterInfo* info_lo = GetRegInfo(loc.reg.GetLow()); 1291 RegisterInfo* info_hi = GetRegInfo(loc.reg.GetHigh()); 1294 loc.reg = info_lo->GetReg(); 1296 RegisterInfo* info = GetRegInfo(loc.reg); 1299 if (info->IsLive() && (info->SReg() == loc.s_reg_low)) { 1301 info_new->MarkLive(loc [all...] |
H A D | gen_common.cc | 431 RegLocation loc = UpdateLoc(info->args[i]); local 432 if (loc.location == kLocPhysReg) { 434 Store32Disp(TargetPtrReg(kSp), SRegOffset(loc.s_reg_low), loc.reg);
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H A D | gen_invoke.cc | 921 RegLocation loc = info->args[next_arg]; local 922 if (loc.wide) { 923 loc = UpdateLocWide(loc); 924 if ((next_arg >= 2) && (loc.location == kLocPhysReg)) { 926 StoreBaseDisp(TargetPtrReg(kSp), SRegOffset(loc.s_reg_low), loc.reg, k64, kNotVolatile); 930 loc = UpdateLoc(loc); 931 if ((next_arg >= 3) && (loc [all...] |
H A D | mir_to_lir.h | 660 RegisterClass LocToRegClass(RegLocation loc); 719 virtual RegLocation NarrowRegLoc(RegLocation loc); 778 void MarkLive(RegLocation loc); 783 void MarkClean(RegLocation loc); 784 void MarkDirty(RegLocation loc); 787 virtual RegLocation UpdateLoc(RegLocation loc); 788 virtual RegLocation UpdateLocWide(RegLocation loc); 789 RegLocation UpdateRawLoc(RegLocation loc); 794 * @param loc the location where the value will be stored. 799 virtual RegLocation EvalLocWide(RegLocation loc, in 1215 TargetReg(SpecialTargetRegister reg, RegLocation loc) argument [all...] |
/art/runtime/jdwp/ |
H A D | jdwp_event.h | 61 JdwpLocation loc; member in struct:art::JDWP::JdwpEventMod::__anon105
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/art/compiler/dex/ |
H A D | vreg_analysis.cc | 441 RegLocation* loc = static_cast<RegLocation*>(arena_->Alloc(max_regs * sizeof(*loc), local 444 loc[i] = fresh_loc; 445 loc[i].s_reg_low = i; 446 loc[i].is_const = is_constant_v_->IsBitSet(i); 447 loc[i].wide = false; 453 loc[ct->s_reg_low].location = kLocCompilerTemp; 454 loc[ct->s_reg_low].defined = true; 458 loc[GetMethodSReg()].ref = true; 460 reg_location_ = loc; [all...] |
H A D | local_value_numbering.cc | 80 uint16_t loc = gvn->LookupValue(kNonAliasingIFieldLocOp, base, field_id, type); local 81 auto lb = lvn->non_aliasing_ifield_value_map_.find(loc); 84 : gvn->LookupValue(kNonAliasingIFieldInitialOp, loc, kNoValue, kNoValue); 596 uint16_t loc; local 598 loc = *store_it; 601 loc = load_it->first; 603 DCHECK(store_it == store_end || cmp(loc, *store_it)); 605 while (work_it != work_end && cmp(work_it->first, loc)) { 608 if (work_it != work_end && !cmp(loc, work_it->first)) { 1157 uint16_t loc local 1217 uint16_t loc = gvn_->LookupValue(kNonAliasingIFieldLocOp, base, field_id, type); local [all...] |
/art/compiler/ |
H A D | elf_patcher.cc | 181 uintptr_t loc = patch_ptr - (reinterpret_cast<uintptr_t>(oat_file_->Begin()) + local 185 CHECK_LT(loc, oat_file_->Size() - oat_header_->GetExecutableOffset()); 186 AddPatch(loc);
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/art/compiler/dex/quick/x86/ |
H A D | utility_x86.cc | 1025 RegLocation X86Mir2Lir::UpdateLocTyped(RegLocation loc, int reg_class) { argument 1026 loc = UpdateLoc(loc); 1027 if ((loc.location == kLocPhysReg) && (loc.fp != loc.reg.IsFloat())) { 1028 if (GetRegInfo(loc.reg)->IsTemp()) { 1029 Clobber(loc.reg); 1030 FreeTemp(loc.reg); 1031 loc 1039 UpdateLocWideTyped(RegLocation loc, int reg_class) argument [all...] |
H A D | int_x86.cc | 2396 X86OpCode X86Mir2Lir::GetOpcode(Instruction::Code op, RegLocation loc, bool is_high_op, argument 2398 bool in_mem = loc.location != kLocPhysReg; 2401 DCHECK(in_mem || !loc.reg.IsFloat());
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H A D | target_x86.cc | 934 void X86Mir2Lir::DumpRegLocation(RegLocation loc) { argument 935 LOG(INFO) << "location: " << loc.location << ',' 936 << (loc.wide ? " w" : " ") 937 << (loc.defined ? " D" : " ") 938 << (loc.is_const ? " c" : " ") 939 << (loc.fp ? " F" : " ") 940 << (loc.core ? " C" : " ") 941 << (loc.ref ? " r" : " ") 942 << (loc.high_word ? " h" : " ") 943 << (loc 2618 RegLocation loc = info->args[next_arg]; local [all...] |
/art/compiler/dex/quick/arm64/ |
H A D | target_arm64.cc | 858 static RegStorage GetArgPhysicalReg(RegLocation* loc, int* num_gpr_used, int* num_fpr_used, argument 860 if (loc->fp) { 865 if (loc->wide) { 878 if (loc->wide || loc->ref) { 1058 RegLocation loc = info->args[next_arg]; local 1059 if (loc.wide) { 1060 loc = UpdateLocWide(loc); 1061 if (loc [all...] |
/art/compiler/dex/portable/ |
H A D | mir_to_gbc.cc | 101 ::llvm::Type* MirConverter::LlvmTypeFromLocRec(RegLocation loc) { argument 103 if (loc.wide) { 104 if (loc.fp) 109 if (loc.fp) { 112 if (loc.ref) 222 RegLocation loc) { 224 if (loc.wide) { 225 if (loc.fp) { 231 if (loc.fp) { 233 } else if (loc 221 EmitConst(::llvm::ArrayRef< ::llvm::Value*> src, RegLocation loc) argument 249 EmitCopy(::llvm::ArrayRef< ::llvm::Value*> src, RegLocation loc) argument 1577 RegLocation loc; local [all...] |