| /external/chromium_org/v8/src/mips/ |
| H A D | assembler-mips-inl.h | 175 WriteBarrierMode write_barrier_mode,
179 if (write_barrier_mode == UPDATE_WRITE_BARRIER &&
212 WriteBarrierMode write_barrier_mode,
218 if (write_barrier_mode == UPDATE_WRITE_BARRIER &&
240 WriteBarrierMode write_barrier_mode,
244 set_target_address(target, write_barrier_mode, icache_flush_mode);
262 WriteBarrierMode write_barrier_mode,
267 if (write_barrier_mode == UPDATE_WRITE_BARRIER && host() != NULL) {
174 set_target_address(Address target, WriteBarrierMode write_barrier_mode, ICacheFlushMode icache_flush_mode) argument
211 set_target_object(Object* target, WriteBarrierMode write_barrier_mode, ICacheFlushMode icache_flush_mode) argument
239 set_target_runtime_entry(Address target, WriteBarrierMode write_barrier_mode, ICacheFlushMode icache_flush_mode) argument
261 set_target_cell(Cell* cell, WriteBarrierMode write_barrier_mode, ICacheFlushMode icache_flush_mode) argument
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| /external/chromium_org/v8/src/mips64/ |
| H A D | assembler-mips64-inl.h | 169 WriteBarrierMode write_barrier_mode,
173 if (write_barrier_mode == UPDATE_WRITE_BARRIER &&
206 WriteBarrierMode write_barrier_mode,
212 if (write_barrier_mode == UPDATE_WRITE_BARRIER &&
234 WriteBarrierMode write_barrier_mode,
238 set_target_address(target, write_barrier_mode, icache_flush_mode);
256 WriteBarrierMode write_barrier_mode,
261 if (write_barrier_mode == UPDATE_WRITE_BARRIER && host() != NULL) {
168 set_target_address(Address target, WriteBarrierMode write_barrier_mode, ICacheFlushMode icache_flush_mode) argument
205 set_target_object(Object* target, WriteBarrierMode write_barrier_mode, ICacheFlushMode icache_flush_mode) argument
233 set_target_runtime_entry(Address target, WriteBarrierMode write_barrier_mode, ICacheFlushMode icache_flush_mode) argument
255 set_target_cell(Cell* cell, WriteBarrierMode write_barrier_mode, ICacheFlushMode icache_flush_mode) argument
|
| /external/chromium_org/v8/src/arm/ |
| H A D | assembler-arm-inl.h | 139 WriteBarrierMode write_barrier_mode,
143 if (write_barrier_mode == UPDATE_WRITE_BARRIER &&
166 WriteBarrierMode write_barrier_mode,
172 if (write_barrier_mode == UPDATE_WRITE_BARRIER &&
194 WriteBarrierMode write_barrier_mode,
198 set_target_address(target, write_barrier_mode, icache_flush_mode);
216 WriteBarrierMode write_barrier_mode,
221 if (write_barrier_mode == UPDATE_WRITE_BARRIER && host() != NULL) {
138 set_target_address(Address target, WriteBarrierMode write_barrier_mode, ICacheFlushMode icache_flush_mode) argument
165 set_target_object(Object* target, WriteBarrierMode write_barrier_mode, ICacheFlushMode icache_flush_mode) argument
193 set_target_runtime_entry(Address target, WriteBarrierMode write_barrier_mode, ICacheFlushMode icache_flush_mode) argument
215 set_target_cell(Cell* cell, WriteBarrierMode write_barrier_mode, ICacheFlushMode icache_flush_mode) argument
|
| /external/chromium_org/v8/src/ia32/ |
| H A D | assembler-ia32-inl.h | 115 WriteBarrierMode write_barrier_mode,
119 if (write_barrier_mode == UPDATE_WRITE_BARRIER && host() != NULL &&
141 WriteBarrierMode write_barrier_mode,
148 if (write_barrier_mode == UPDATE_WRITE_BARRIER &&
170 WriteBarrierMode write_barrier_mode,
174 set_target_address(target, write_barrier_mode, icache_flush_mode);
193 WriteBarrierMode write_barrier_mode,
201 if (write_barrier_mode == UPDATE_WRITE_BARRIER && host() != NULL) {
114 set_target_address(Address target, WriteBarrierMode write_barrier_mode, ICacheFlushMode icache_flush_mode) argument
140 set_target_object(Object* target, WriteBarrierMode write_barrier_mode, ICacheFlushMode icache_flush_mode) argument
169 set_target_runtime_entry(Address target, WriteBarrierMode write_barrier_mode, ICacheFlushMode icache_flush_mode) argument
192 set_target_cell(Cell* cell, WriteBarrierMode write_barrier_mode, ICacheFlushMode icache_flush_mode) argument
|
| /external/chromium_org/v8/src/x64/ |
| H A D | assembler-x64-inl.h | 276 WriteBarrierMode write_barrier_mode,
280 if (write_barrier_mode == UPDATE_WRITE_BARRIER && host() != NULL &&
312 WriteBarrierMode write_barrier_mode,
319 if (write_barrier_mode == UPDATE_WRITE_BARRIER &&
335 WriteBarrierMode write_barrier_mode,
339 set_target_address(target, write_barrier_mode, icache_flush_mode);
358 WriteBarrierMode write_barrier_mode,
366 if (write_barrier_mode == UPDATE_WRITE_BARRIER &&
275 set_target_address(Address target, WriteBarrierMode write_barrier_mode, ICacheFlushMode icache_flush_mode) argument
311 set_target_object(Object* target, WriteBarrierMode write_barrier_mode, ICacheFlushMode icache_flush_mode) argument
334 set_target_runtime_entry(Address target, WriteBarrierMode write_barrier_mode, ICacheFlushMode icache_flush_mode) argument
357 set_target_cell(Cell* cell, WriteBarrierMode write_barrier_mode, ICacheFlushMode icache_flush_mode) argument
|
| /external/chromium_org/v8/src/x87/ |
| H A D | assembler-x87-inl.h | 115 WriteBarrierMode write_barrier_mode,
120 if (write_barrier_mode == UPDATE_WRITE_BARRIER && host() != NULL &&
142 WriteBarrierMode write_barrier_mode,
149 if (write_barrier_mode == UPDATE_WRITE_BARRIER &&
171 WriteBarrierMode write_barrier_mode,
175 set_target_address(target, write_barrier_mode, icache_flush_mode);
194 WriteBarrierMode write_barrier_mode,
202 if (write_barrier_mode == UPDATE_WRITE_BARRIER && host() != NULL) {
114 set_target_address(Address target, WriteBarrierMode write_barrier_mode, ICacheFlushMode icache_flush_mode) argument
141 set_target_object(Object* target, WriteBarrierMode write_barrier_mode, ICacheFlushMode icache_flush_mode) argument
170 set_target_runtime_entry(Address target, WriteBarrierMode write_barrier_mode, ICacheFlushMode icache_flush_mode) argument
193 set_target_cell(Cell* cell, WriteBarrierMode write_barrier_mode, ICacheFlushMode icache_flush_mode) argument
|
| /external/chromium_org/v8/src/arm64/ |
| H A D | assembler-arm64-inl.h | 26 WriteBarrierMode write_barrier_mode,
30 if (write_barrier_mode == UPDATE_WRITE_BARRIER && host() != NULL &&
721 WriteBarrierMode write_barrier_mode,
727 if (write_barrier_mode == UPDATE_WRITE_BARRIER &&
749 WriteBarrierMode write_barrier_mode,
753 set_target_address(target, write_barrier_mode, icache_flush_mode);
772 WriteBarrierMode write_barrier_mode,
25 set_target_address(Address target, WriteBarrierMode write_barrier_mode, ICacheFlushMode icache_flush_mode) argument
748 set_target_runtime_entry(Address target, WriteBarrierMode write_barrier_mode, ICacheFlushMode icache_flush_mode) argument
771 set_target_cell(Cell* cell, WriteBarrierMode write_barrier_mode, ICacheFlushMode icache_flush_mode) argument
|