| /external/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineAndOrXor.cpp | 601 Value *R1 = RHS->getOperand(0);
613 E = R2; R1 = nullptr; ok = true;
614 } else if (R1->getType()->isIntegerTy()) {
615 if (!match(R1, m_And(m_Value(R11), m_Value(R12)))) {
618 R11 = R1;
619 R12 = Constant::getAllOnesValue(R1->getType());
641 A = R11; D = R12; E = R1; ok = true;
643 A = R12; D = R11; E = R1; ok = true;
|
| /external/clang/utils/TableGen/ |
| H A D | NeonEmitter.cpp | 1452 std::pair<Type, std::string> R1 = local
1456 assert_with_loc(R1.first == R2.first, "Argument type mismatch!");
1457 return std::make_pair(R1.first, R1.second + " " + Op + " " + R2.second);
|
| /external/llvm/lib/Target/ARM/ |
| H A D | ARMFrameLowering.cpp | 233 case ARM::R1:
391 case ARM::R1:
1457 case ARM::R0: case ARM::R1:
1473 case ARM::R0: case ARM::R1:
|
| H A D | Thumb1FrameLowering.cpp | 215 case ARM::R1:
|
| H A D | ARMFastISel.cpp | 3037 ARM::R0, ARM::R1, ARM::R2, ARM::R3
|
| /external/pdfium/core/src/fxcodec/lcms2/lcms2-2.6/src/ |
| H A D | cmsgamma.c | 586 cmsFloat32Number R1 = (cmsFloat32Number) (R - g ->Segments[i].x0) / (g ->Segments[i].x1 - g ->Segments[i].x0); local
592 g ->SegInterp[i] -> Interpolation.LerpFloat(&R1, &Out, g ->SegInterp[i]);
|
| /external/chromium_org/third_party/libvpx/source/libvpx/vp8/common/ppc/ |
| H A D | filter_altivec.asm | 17 .macro load_c V, LABEL, OFF, R0, R1
19 la \R1, \LABEL@l(\R0)
20 lvx \V, \OFF, \R1
|
| /external/libvpx/libvpx/vp8/common/ppc/ |
| H A D | filter_altivec.asm | 17 .macro load_c V, LABEL, OFF, R0, R1
19 la \R1, \LABEL@l(\R0)
20 lvx \V, \OFF, \R1
|
| /external/llvm/lib/Analysis/ |
| H A D | ScalarEvolution.cpp | 5707 const SCEVConstant *R1 = dyn_cast<SCEVConstant>(Roots.first);
5709 if (R1 && R2) {
5711 dbgs() << "HFTZ: " << *V << " - sol#1: " << *R1
5717 R1->getValue(),
5720 std::swap(R1, R2); // R1 is the minimum root now.
5725 const SCEV *Val = AddRec->evaluateAtIteration(R1, *this);
5727 return R1; // We found a quadratic root!
6846 const SCEVConstant *R1 = dyn_cast<SCEVConstant>(Roots.first);
6848 if (R1) {
[all...] |
| /external/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelLowering.cpp | 188 Hexagon::R0, Hexagon::R1, Hexagon::R2, Hexagon::R3, Hexagon::R4,
214 Hexagon::R1, Hexagon::R3
856 // callee return the result direclty through R0/R1.
1437 setExceptionSelectorRegister(Hexagon::R1);
|
| /external/clang/lib/Sema/ |
| H A D | AnalysisBasedWarnings.cpp | 71 SourceRange R1,
88 S.Diag(L, diag) << R1 << R2;
|
| /external/opencv/cv/src/ |
| H A D | cvcalibration.cpp | 393 CvMat R1 = cvMat(3,3,CV_64F,_R1), R2 = cvMat(3,3,CV_64F,_R2); local
406 cvRodrigues2( &r1, &R1, &dR1dr1 );
418 cvMatMul( &R2, &R1, &R3 );
419 cvCalcMatMulDeriv( &R2, &R1, &dR3dR2, &dR3dR1 );
|
| /external/clang/tools/libclang/ |
| H A D | CIndex.cpp | 103 SourceRange R1,
105 assert(R1.isValid() && "First range is invalid?");
107 if (R1.getEnd() != R2.getBegin() &&
108 SM.isBeforeInTranslationUnit(R1.getEnd(), R2.getBegin()))
110 if (R2.getEnd() != R1.getBegin() &&
111 SM.isBeforeInTranslationUnit(R2.getEnd(), R1.getBegin()))
102 RangeCompare(SourceManager &SM, SourceRange R1, SourceRange R2) argument
|
| /external/llvm/lib/Target/PowerPC/AsmParser/ |
| H A D | PPCAsmParser.cpp | 37 PPC::R0, PPC::R1, PPC::R2, PPC::R3,
48 PPC::R1, PPC::R2, PPC::R3,
|
| /external/llvm/lib/Target/XCore/ |
| H A D | XCoreISelLowering.cpp | 155 setExceptionSelectorRegister(XCore::R1);
857 // R0=ExceptionPointerRegister R1=ExceptionSelectorRegister
1364 XCore::R0, XCore::R1, XCore::R2, XCore::R3
|
| /external/opencv/cv/include/ |
| H A D | cv.h | 1332 CvMat* R1, CvMat* R2, CvMat* P1, CvMat* P2,
|
| /external/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 634 setStackPointerRegisterToSaveRestore(PPC::R1);
3292 StackPtr = DAG.getRegister(PPC::R1, MVT::i32);
3810 SDValue StackPtr = DAG.getRegister(PPC::R1, MVT::i32);
4461 StackPtr = DAG.getRegister(PPC::R1, MVT::i32);
4819 unsigned SP = isPPC64 ? PPC::X1 : PPC::R1;
6534 BaseReg = Subtarget.isPPC64() ? PPC::X1 : PPC::R1;
6615 unsigned SP = (PVT == MVT::i64) ? PPC::X1 : PPC::R1;
8623 case 'b': // R1-R31
8832 FrameReg = isPPC64 ? PPC::X1 : PPC::R1;
8858 .Case("r1", is64Bit ? PPC::X1 : PPC::R1)
[all...] |
| /external/antlr/antlr-3.4/runtime/Delphi/Sources/Antlr3.Runtime/ |
| H A D | Antlr.Runtime.Tools.pas | 781 // (2nd ed) has a bug: step R4 should go to step R1, not R2 (already errata'd).
|
| /external/deqp/framework/common/ |
| H A D | tcuCompressedTexture.cpp | 625 const deUint8 R1 = (deUint8)getBits(src, 59, 62); local
640 baseR[0] = extend4To8(R1);
|
| /external/llvm/lib/Target/ARM/AsmParser/ |
| H A D | ARMAsmParser.cpp | 2899 .Case("a2", ARM::R1)
3250 case ARM::R0: return ARM::R1; case ARM::R1: return ARM::R2;
|
| /external/deqp/modules/gles3/performance/ |
| H A D | es3pBufferDataUploadTests.cpp | 6052 const float R1 = sumOfRanks(orderedObservationsA, allSamples, comparer);
6054 const float U1 = n1*n2 + n1*(n1 + 1)/2 - R1;
|
| /external/llvm/lib/Target/ARM/Disassembler/ |
| H A D | ARMDisassembler.cpp | 874 ARM::R0, ARM::R1, ARM::R2, ARM::R3,
953 Register = ARM::R1;
|
| /external/clang/include/clang/AST/ |
| H A D | Expr.h | 234 SourceRange &R1, SourceRange &R2,
|
| /external/valgrind/main/memcheck/ |
| H A D | mc_machine.c | 859 if (o == GOF(R1) && sz == 4) return o;
|
| /external/llvm/test/MC/ARM/ |
| H A D | basic-thumb2-instructions.s | 652 ADDEQ R0, R1, R2
655 ADDEQ R1, R2, #4
|