Searched refs:R12 (Results 1 - 10 of 10) sorted by relevance

/art/runtime/arch/x86_64/
H A Dregisters_x86_64.h42 R12 = 12, enumerator in enum:art::x86_64::Register
H A Dquick_method_frame_info_x86_64.h28 (1 << art::x86_64::RBX) | (1 << art::x86_64::RBP) | (1 << art::x86_64::R12) |
/art/runtime/arch/arm/
H A Dregisters_arm.h39 R12 = 12, enumerator in enum:art::arm::Register
/art/compiler/jni/quick/x86_64/
H A Dcalling_convention_x86_64.cc129 callee_save_regs_.push_back(X86_64ManagedRegister::FromCpuRegister(R12));
140 return 1 << RBX | 1 << RBP | 1 << R12 | 1 << R13 | 1 << R14 | 1 << R15 |
/art/compiler/utils/x86_64/
H A Dassembler_x86_64_test.cc58 registers_.push_back(new x86_64::CpuRegister(x86_64::R12));
190 registers.push_back(new x86_64::CpuRegister(x86_64::R12));
208 byte_regs[x86_64::R12] = "r12b";
/art/compiler/utils/arm/
H A Dassembler_arm.cc833 __ LoadFromOffset(kLoadWord, R12, TR, QUICK_ENTRYPOINT_OFFSET(4, pDeliverException).Int32Value());
834 __ blx(R12);
H A Dassembler_arm32.cc1471 CHECK_EQ(mscratch.AsArm().AsCoreRegister(), R12);
H A Dassembler_thumb2.cc2521 CHECK_EQ(mscratch.AsArm().AsCoreRegister(), R12);
/art/compiler/utils/
H A Dassembler_thumb_test.cc316 __ add(R12, R1, ShifterOperand(R0));
874 __ StoreToOffset(kStoreWord, R0, R12, 12);
875 __ StoreToOffset(kStoreHalfword, R0, R12, 12);
876 __ StoreToOffset(kStoreByte, R2, R12, 12);
/art/compiler/optimizing/
H A Dcode_generator_x86_64.cc200 blocked_registers[R12] = true;

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