Searched refs:r0 (Results 1 - 8 of 8) sorted by relevance

/art/runtime/arch/arm/
H A Dmemcmp16_arm.S32 pld [r0, #0]
36 cmp r0, r1
38 moveq r0, #0
41 /* since r0 hold the result, move the first source
45 mov r3, r0
55 pld [r0, #32]
58 1: ldrh r0, [r3], #2
60 subs r0, r0, ip
77 ldrh r0, [r
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H A Djni_entrypoints_arm.S24 push {r0, r1, r2, r3, lr} @ spill regs
26 .cfi_rel_offset r0, 0
34 mov r12, r0 @ save result in r12
37 cbz r0, 1f @ is method code null?
38 pop {r0, r1, r2, r3, lr} @ restore regs
40 .cfi_restore r0
47 pop {r0, r1, r2, r3, pc} @ restore regs and return to caller to handle exception
H A Dquick_entrypoints_arm.S150 cbnz r0, 1f @ result non-zero branch over
156 cbz r0, 1f @ result zero branch over
169 mov r0, r9 @ pass Thread::Current
178 mov r0, r9 @ pass Thread::Current
240 * as usual - except instead of loading arg0/r0 with the target Method*, arg0/r0 will contain
245 * The helper will attempt to locate the target and return a 64-bit result in r0/r1 consisting
246 * of the target Method* in r0 and method->code_ in r1.
269 cbz r0, 1f @ did we find the target? if not go to exception delivery
287 * r0
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H A Dportable_entrypoints_arm.S22 * r0 = method pointer
30 push {r0, r4, r5, r9, r11, lr} @ spill regs
31 .save {r0, r4, r5, r9, r11, lr}
33 .cfi_rel_offset r0, 0
47 add r0, sp, #4 @ pass stack pointer + method ptr as dest for memcpy
49 ldr r0, [r11] @ restore method*
56 ldr ip, [r0, #METHOD_PORTABLE_CODE_OFFSET_32] @ get pointer to the code
60 strd r0, [ip] @ store r0/r1 into result pointer
61 pop {r0, r
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/art/compiler/dex/quick/arm/
H A Darm_lir.h27 * r0-r3: Argument registers in both Dalvik and C/C++ conventions.
29 * pointer in r0 as a hidden arg0. Otherwise used as codegen scratch
31 * r0-r1: As in C/C++ r0 is 32-bit return register and r0/r1 is 64-bit
46 * 5 core temps that codegen can use (r0, r1, r2, r3, r12)
60 * o On a call to a Dalvik method, pass target's Method* in r0
113 r0 = RegStorage::k32BitSolo | RegStorage::kCoreRegister | 0, enumerator in enum:art::ArmNativeRegisterPool
207 constexpr RegStorage rs_r0(RegStorage::kValid | r0);
300 // RegisterLocation templates return values (r0, o
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/art/compiler/dex/quick/x86/
H A Dx86_lir.h36 * r0/eax: caller | caller | caller, Method*, scratch, return value | caller, scratch, return value
118 r0 = RegStorage::k32BitSolo | RegStorage::kCoreRegister | 0, enumerator in enum:art::X86NativeRegisterPool
120 rAX = r0,
220 constexpr RegStorage rs_r0(RegStorage::kValid | r0);
738 // Mask extracting the least 3 bits of r0..r15
H A Dint_x86.cc58 // Compute (r1:r0) = (r1:r0) - (r3:r2)
59 OpRegReg(kOpSub, rs_r0, rs_r2); // r0 = r0 - r2
61 NewLIR2(kX86Set8R, rs_r2.GetReg(), kX86CondL); // r2 = (r1:r0) < (r3:r2) ? 1 : 0
64 OpRegReg(kOpOr, rs_r0, rs_r1); // r0 = high | low - sets ZF
65 NewLIR2(kX86Set8R, rs_r0.GetReg(), kX86CondNz); // r0 = (r1:r0) != (r3:r2) ? 1 : 0
66 NewLIR2(kX86Movzx8RR, r0, r0);
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/art/runtime/arch/mips/
H A Dquick_entrypoints_mips.S334 move $v0, $zero # clear result registers r0 and r1
342 * the bottom of the thread. On entry r0 holds Throwable*
977 * r0 holds the proxy method; r1, r2 and r3 may contain arguments.
1178 * r0: low word

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