/external/llvm/lib/CodeGen/ |
H A D | CallingConvLower.cpp | 45 ISD::ArgFlagsTy ArgFlags) { 46 unsigned Align = ArgFlags.getByValAlign(); 47 unsigned Size = ArgFlags.getByValSize(); 73 ISD::ArgFlagsTy ArgFlags = Ins[i].Flags; local 74 if (Fn(i, ArgVT, ArgVT, CCValAssign::Full, ArgFlags, *this)) { 91 ISD::ArgFlagsTy ArgFlags = Outs[i].Flags; local 92 if (Fn(i, VT, VT, CCValAssign::Full, ArgFlags, *this)) 105 ISD::ArgFlagsTy ArgFlags = Outs[i].Flags; local 106 if (Fn(i, VT, VT, CCValAssign::Full, ArgFlags, *this)) { 123 ISD::ArgFlagsTy ArgFlags local 42 HandleByVal(unsigned ValNo, MVT ValVT, MVT LocVT, CCValAssign::LocInfo LocInfo, int MinSize, int MinAlign, ISD::ArgFlagsTy ArgFlags) argument 142 ISD::ArgFlagsTy ArgFlags = Flags[i]; local [all...] |
/external/llvm/lib/Target/Hexagon/ |
H A D | HexagonCallingConvLower.cpp | 43 ISD::ArgFlagsTy ArgFlags) { 44 unsigned Align = ArgFlags.getByValAlign(); 45 unsigned Size = ArgFlags.getByValSize(); 82 ISD::ArgFlagsTy ArgFlags = Ins[i].Flags; local 83 if (Fn(i, ArgVT, ArgVT, CCValAssign::Full, ArgFlags, *this, 0, 0, false)) { 118 ISD::ArgFlagsTy ArgFlags = Outs[i].Flags; local 119 if (Fn(i, VT, VT, CCValAssign::Full, ArgFlags, *this, -1, -1, false)){ 148 ISD::ArgFlagsTy ArgFlags = Outs[i].Flags; local 149 if (Fn(i, ArgVT, ArgVT, CCValAssign::Full, ArgFlags, *this, 167 ISD::ArgFlagsTy ArgFlags local 40 HandleByVal(unsigned ValNo, EVT ValVT, EVT LocVT, CCValAssign::LocInfo LocInfo, int MinSize, int MinAlign, ISD::ArgFlagsTy ArgFlags) argument [all...] |
H A D | HexagonVarargsCallingConvention.h | 22 ISD::ArgFlagsTy ArgFlags, 31 ISD::ArgFlagsTy ArgFlags, 37 if (ArgFlags.isByVal() && 38 ((ByValSize = ArgFlags.getByValSize()) > 84 if (ArgFlags.isByVal()) { 100 ISD::ArgFlagsTy ArgFlags, 29 CC_Hexagon32_VarArgs(unsigned ValNo, EVT ValVT, EVT LocVT, CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags, Hexagon_CCState &State, int NonVarArgsParams, int CurrentParam, bool ForceMem) argument 98 RetCC_Hexagon32_VarArgs(unsigned ValNo, EVT ValVT, EVT LocVT, CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags, Hexagon_CCState &State, int NonVarArgsParams, int CurrentParam, bool ForceMem) argument
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H A D | HexagonCallingConvLower.h | 37 ISD::ArgFlagsTy ArgFlags, Hexagon_CCState &State, 176 int MinSize, int MinAlign, ISD::ArgFlagsTy ArgFlags);
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H A D | HexagonISelLowering.cpp | 67 ISD::ArgFlagsTy ArgFlags, CCState &State); 72 ISD::ArgFlagsTy ArgFlags, CCState &State); 77 ISD::ArgFlagsTy ArgFlags, CCState &State); 82 ISD::ArgFlagsTy ArgFlags, CCState &State); 87 ISD::ArgFlagsTy ArgFlags, CCState &State); 92 ISD::ArgFlagsTy ArgFlags, CCState &State); 97 ISD::ArgFlagsTy ArgFlags, CCState &State) { 106 return CC_Hexagon(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State); 111 if (ArgFlags.isByVal()) { 113 // by ArgFlags 95 CC_Hexagon_VarArg(unsigned ValNo, MVT ValVT, MVT LocVT, CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags, CCState &State) argument 145 CC_Hexagon(unsigned ValNo, MVT ValVT, MVT LocVT, CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags, CCState &State) argument 183 CC_Hexagon32(unsigned ValNo, MVT ValVT, MVT LocVT, CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags, CCState &State) argument 201 CC_Hexagon64(unsigned ValNo, MVT ValVT, MVT LocVT, CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags, CCState &State) argument 226 RetCC_Hexagon(unsigned ValNo, MVT ValVT, MVT LocVT, CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags, CCState &State) argument 257 RetCC_Hexagon32(unsigned ValNo, MVT ValVT, MVT LocVT, CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags, CCState &State) argument 273 RetCC_Hexagon64(unsigned ValNo, MVT ValVT, MVT LocVT, CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags, CCState &State) argument [all...] |
/external/llvm/lib/Target/ARM/ |
H A D | ARMCallingConv.h | 60 ISD::ArgFlagsTy &ArgFlags, 114 ISD::ArgFlagsTy &ArgFlags, 146 ISD::ArgFlagsTy &ArgFlags, 157 ISD::ArgFlagsTy &ArgFlags, 159 return RetCC_ARM_APCS_Custom_f64(ValNo, ValVT, LocVT, LocInfo, ArgFlags, 178 ISD::ArgFlagsTy &ArgFlags, CCState &State) { 190 if (ArgFlags.isInConsecutiveRegsLast()) { 58 CC_ARM_APCS_Custom_f64(unsigned &ValNo, MVT &ValVT, MVT &LocVT, CCValAssign::LocInfo &LocInfo, ISD::ArgFlagsTy &ArgFlags, CCState &State) argument 112 CC_ARM_AAPCS_Custom_f64(unsigned &ValNo, MVT &ValVT, MVT &LocVT, CCValAssign::LocInfo &LocInfo, ISD::ArgFlagsTy &ArgFlags, CCState &State) argument 144 RetCC_ARM_APCS_Custom_f64(unsigned &ValNo, MVT &ValVT, MVT &LocVT, CCValAssign::LocInfo &LocInfo, ISD::ArgFlagsTy &ArgFlags, CCState &State) argument 155 RetCC_ARM_AAPCS_Custom_f64(unsigned &ValNo, MVT &ValVT, MVT &LocVT, CCValAssign::LocInfo &LocInfo, ISD::ArgFlagsTy &ArgFlags, CCState &State) argument 176 CC_ARM_AAPCS_Custom_HA(unsigned &ValNo, MVT &ValVT, MVT &LocVT, CCValAssign::LocInfo &LocInfo, ISD::ArgFlagsTy &ArgFlags, CCState &State) argument
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H A D | ARMFastISel.cpp | 202 SmallVectorImpl<ISD::ArgFlagsTy> &ArgFlags, 1880 SmallVectorImpl<ISD::ArgFlagsTy> &ArgFlags, 1887 CCInfo.AnalyzeCallOperands(ArgVTs, ArgFlags, 2205 SmallVector<ISD::ArgFlagsTy, 8> ArgFlags; local 2209 ArgFlags.reserve(I->getNumOperands()); 2226 ArgFlags.push_back(Flags); 2232 if (!ProcessCallArgs(Args, ArgRegs, ArgVTs, ArgFlags, 2316 SmallVector<ISD::ArgFlagsTy, 8> ArgFlags; local 2321 ArgFlags.reserve(arg_size); 2359 ArgFlags 1877 ProcessCallArgs(SmallVectorImpl<Value*> &Args, SmallVectorImpl<unsigned> &ArgRegs, SmallVectorImpl<MVT> &ArgVTs, SmallVectorImpl<ISD::ArgFlagsTy> &ArgFlags, SmallVectorImpl<unsigned> &RegArgs, CallingConv::ID CC, unsigned &NumBytes, bool isVarArg) argument [all...] |
/external/chromium_org/gpu/command_buffer/common/ |
H A D | gles2_cmd_format_autogen.h | 17 static const cmd::ArgFlags kArgFlags = cmd::kFixed; 49 static const cmd::ArgFlags kArgFlags = cmd::kFixed; 85 static const cmd::ArgFlags kArgFlags = cmd::kFixed; 129 static const cmd::ArgFlags kArgFlags = cmd::kFixed; 165 static const cmd::ArgFlags kArgFlags = cmd::kFixed; 201 static const cmd::ArgFlags kArgFlags = cmd::kFixed; 238 static const cmd::ArgFlags kArgFlags = cmd::kFixed; 274 static const cmd::ArgFlags kArgFlags = cmd::kFixed; 321 static const cmd::ArgFlags kArgFlags = cmd::kFixed; 353 static const cmd::ArgFlags kArgFlag [all...] |
H A D | cmd_buffer_common.h | 21 enum ArgFlags { enum in namespace:gpu::cmd 185 static const cmd::ArgFlags kArgFlags = cmd::kAtLeastN; 214 static const cmd::ArgFlags kArgFlags = cmd::kFixed; 255 static const cmd::ArgFlags kArgFlags = cmd::kFixed; 291 static const cmd::ArgFlags kArgFlags = cmd::kFixed; 353 static const cmd::ArgFlags kArgFlags = cmd::kAtLeastN; 409 static const cmd::ArgFlags kArgFlags = cmd::kFixed; 479 static const cmd::ArgFlags kArgFlags = cmd::kFixed;
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H A D | gles2_cmd_format.h | 206 static const cmd::ArgFlags kArgFlags = cmd::kFixed; 214 static const cmd::ArgFlags kArgFlags = cmd::kFixed; 222 static const cmd::ArgFlags kArgFlags = cmd::kAtLeastN;
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/external/clang/include/clang/Basic/ |
H A D | IdentifierTable.h | 606 ArgFlags = ZeroArg|OneArg enumerator in enum:clang::Selector::IdentifierInfoFlag 612 assert((InfoPtr & ArgFlags) == 0 &&"Insufficiently aligned IdentifierInfo"); 618 assert((InfoPtr & ArgFlags) == 0 &&"Insufficiently aligned IdentifierInfo"); 624 return reinterpret_cast<IdentifierInfo *>(InfoPtr & ~ArgFlags); 628 return reinterpret_cast<MultiKeywordSelector *>(InfoPtr & ~ArgFlags); 632 return InfoPtr & ArgFlags;
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/external/llvm/include/llvm/CodeGen/ |
H A D | CallingConvLower.h | 155 ISD::ArgFlagsTy ArgFlags, CCState &State); 162 ISD::ArgFlagsTy &ArgFlags, CCState &State); 408 int MinSize, int MinAlign, ISD::ArgFlagsTy ArgFlags);
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/external/llvm/lib/Target/PowerPC/ |
H A D | PPCISelLowering.h | 682 ISD::ArgFlagsTy &ArgFlags, 688 ISD::ArgFlagsTy &ArgFlags, 694 ISD::ArgFlagsTy &ArgFlags,
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H A D | PPCFastISel.cpp | 170 SmallVectorImpl<ISD::ArgFlagsTy> &ArgFlags, 1197 SmallVectorImpl<ISD::ArgFlagsTy> &ArgFlags, 1209 CCInfo.AnalyzeCallOperands(ArgVTs, ArgFlags, CC_PPC64_ELF_FIS); 1427 SmallVector<ISD::ArgFlagsTy, 8> ArgFlags; local 1432 ArgFlags.reserve(NumArgs); 1473 ArgFlags.push_back(Flags); 1480 if (!processCallArgs(Args, ArgRegs, ArgVTs, ArgFlags, 1194 processCallArgs(SmallVectorImpl<Value*> &Args, SmallVectorImpl<unsigned> &ArgRegs, SmallVectorImpl<MVT> &ArgVTs, SmallVectorImpl<ISD::ArgFlagsTy> &ArgFlags, SmallVectorImpl<unsigned> &RegArgs, CallingConv::ID CC, unsigned &NumBytes, bool IsVarArg) argument
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H A D | PPCISelLowering.cpp | 2053 ISD::ArgFlagsTy &ArgFlags, 2061 ISD::ArgFlagsTy &ArgFlags, 2088 ISD::ArgFlagsTy &ArgFlags, 3752 ISD::ArgFlagsTy ArgFlags = Outs[i].Flags; local 3756 Result = CC_PPC32_SVR4(i, ArgVT, ArgVT, CCValAssign::Full, ArgFlags, 3760 ArgFlags, CCInfo); 2051 CC_PPC32_SVR4_Custom_Dummy(unsigned &ValNo, MVT &ValVT, MVT &LocVT, CCValAssign::LocInfo &LocInfo, ISD::ArgFlagsTy &ArgFlags, CCState &State) argument 2058 CC_PPC32_SVR4_Custom_AlignArgRegs(unsigned &ValNo, MVT &ValVT, MVT &LocVT, CCValAssign::LocInfo &LocInfo, ISD::ArgFlagsTy &ArgFlags, CCState &State) argument 2085 CC_PPC32_SVR4_Custom_AlignFPArgRegs(unsigned &ValNo, MVT &ValVT, MVT &LocVT, CCValAssign::LocInfo &LocInfo, ISD::ArgFlagsTy &ArgFlags, CCState &State) argument
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/external/llvm/lib/Target/Mips/ |
H A D | MipsISelLowering.cpp | 2211 CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags, 2220 if (ArgFlags.isByVal()) 2226 if (ArgFlags.isSExt()) 2228 else if (ArgFlags.isZExt()) 2241 unsigned OrigAlign = ArgFlags.getOrigAlign(); 2288 ISD::ArgFlagsTy ArgFlags, CCState &State) { 2291 return CC_MipsO32(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State, F64Regs); 2296 ISD::ArgFlagsTy ArgFlags, CCState &State) { 2299 return CC_MipsO32(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State, F64Regs); 3347 ISD::ArgFlagsTy ArgFlags local 2210 CC_MipsO32(unsigned ValNo, MVT ValVT, MVT LocVT, CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags, CCState &State, const MCPhysReg *F64Regs) argument 2286 CC_MipsO32_FP32(unsigned ValNo, MVT ValVT, MVT LocVT, CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags, CCState &State) argument 2294 CC_MipsO32_FP64(unsigned ValNo, MVT ValVT, MVT LocVT, CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags, CCState &State) argument 3382 ISD::ArgFlagsTy ArgFlags = Args[I].Flags; local 3442 handleByValArg(unsigned ValNo, MVT ValVT, MVT LocVT, CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags) argument [all...] |
H A D | MipsISelLowering.h | 400 ISD::ArgFlagsTy ArgFlags);
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/external/llvm/lib/Target/MSP430/ |
H A D | MSP430ISelLowering.cpp | 303 ISD::ArgFlagsTy ArgFlags = Args[ValNo].Flags; local 310 if (ArgFlags.isSExt()) 312 else if (ArgFlags.isZExt()) 319 if (ArgFlags.isByVal()) { 320 State.HandleByVal(ValNo++, ArgVT, LocVT, LocInfo, 2, 2, ArgFlags); 341 CC_MSP430_AssignStack(ValNo++, ArgVT, LocVT, LocInfo, ArgFlags, State);
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/external/llvm/lib/Target/AArch64/ |
H A D | AArch64FastISel.cpp | 141 SmallVectorImpl<ISD::ArgFlagsTy> &ArgFlags, 1197 SmallVectorImpl<MVT> &ArgVTs, SmallVectorImpl<ISD::ArgFlagsTy> &ArgFlags, 1202 CCInfo.AnalyzeCallOperands(ArgVTs, ArgFlags, CCAssignFnForCall(CC)); 1344 SmallVector<ISD::ArgFlagsTy, 8> ArgFlags; local 1348 ArgFlags.reserve(CS.arg_size()); 1391 ArgFlags.push_back(Flags); 1397 if (!ProcessCallArgs(Args, ArgRegs, ArgVTs, ArgFlags, RegArgs, CC, NumBytes)) 1195 ProcessCallArgs( SmallVectorImpl<Value *> &Args, SmallVectorImpl<unsigned> &ArgRegs, SmallVectorImpl<MVT> &ArgVTs, SmallVectorImpl<ISD::ArgFlagsTy> &ArgFlags, SmallVectorImpl<unsigned> &RegArgs, CallingConv::ID CC, unsigned &NumBytes) argument
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H A D | AArch64ISelLowering.cpp | 2162 ISD::ArgFlagsTy ArgFlags = Outs[i].Flags; local 2165 bool Res = AssignFn(i, ArgVT, ArgVT, CCValAssign::Full, ArgFlags, CCInfo); 2183 ISD::ArgFlagsTy ArgFlags = Outs[i].Flags; local 2191 bool Res = AssignFn(i, ValVT, ValVT, CCValAssign::Full, ArgFlags, CCInfo);
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/external/llvm/lib/Target/X86/ |
H A D | X86FastISel.cpp | 2737 SmallVector<ISD::ArgFlagsTy, 8> ArgFlags; local 2742 ArgFlags.reserve(arg_size); 2823 ArgFlags.push_back(Flags); 2835 CCInfo.AnalyzeCallOperands(ArgVTs, ArgFlags, CC_X86); 2922 ISD::ArgFlagsTy Flags = ArgFlags[VA.getValNo()];
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/external/llvm/lib/Target/Sparc/ |
H A D | SparcISelLowering.cpp | 41 ISD::ArgFlagsTy &ArgFlags, CCState &State) 43 assert (ArgFlags.isSRet()); 54 ISD::ArgFlagsTy &ArgFlags, CCState &State) 83 ISD::ArgFlagsTy &ArgFlags, CCState &State) { 128 ISD::ArgFlagsTy &ArgFlags, CCState &State) { 39 CC_Sparc_Assign_SRet(unsigned &ValNo, MVT &ValVT, MVT &LocVT, CCValAssign::LocInfo &LocInfo, ISD::ArgFlagsTy &ArgFlags, CCState &State) argument 52 CC_Sparc_Assign_f64(unsigned &ValNo, MVT &ValVT, MVT &LocVT, CCValAssign::LocInfo &LocInfo, ISD::ArgFlagsTy &ArgFlags, CCState &State) argument 81 CC_Sparc64_Full(unsigned &ValNo, MVT &ValVT, MVT &LocVT, CCValAssign::LocInfo &LocInfo, ISD::ArgFlagsTy &ArgFlags, CCState &State) argument 126 CC_Sparc64_Half(unsigned &ValNo, MVT &ValVT, MVT &LocVT, CCValAssign::LocInfo &LocInfo, ISD::ArgFlagsTy &ArgFlags, CCState &State) argument
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/external/llvm/lib/Target/R600/ |
H A D | AMDGPUISelLowering.cpp | 77 ISD::ArgFlagsTy ArgFlags, CCState &State) { 79 ArgFlags.getOrigAlign()); 75 allocateStack(unsigned ValNo, MVT ValVT, MVT LocVT, CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags, CCState &State) argument
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