Searched refs:CPSR_I (Results 1 - 4 of 4) sorted by relevance

/external/qemu/target-arm/
H A Dhelper.c325 env->uncached_cpsr = ARM_CPU_MODE_SVC | CPSR_A | CPSR_F | CPSR_I;
326 /* On ARMv7-M the CPSR_I is the value of the PRIMASK register, and is
329 env->uncached_cpsr &= ~CPSR_I;
886 mask = CPSR_I;
911 mask = CPSR_I;
930 mask = CPSR_A | CPSR_I;
936 mask = CPSR_A | CPSR_I;
943 mask = CPSR_A | CPSR_I;
950 mask = CPSR_A | CPSR_I | CPSR_F;
964 mask = CPSR_A | CPSR_I | CPSR_
[all...]
H A Dcpu.h318 #define CPSR_I (1U << 7) macro
H A Dtranslate.c6791 mask |= CPSR_I;
8606 offset |= CPSR_I;
8610 imm = CPSR_A | CPSR_I | CPSR_F;
9583 shift = CPSR_A | CPSR_I | CPSR_F;
/external/qemu/
H A Dcpu-exec.c475 || !(env->uncached_cpsr & CPSR_I))) {

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