| /external/chromium_org/third_party/mesa/src/src/mesa/drivers/dri/i965/ |
| H A D | brw_fs_visitor.cpp | 763 emit(BRW_OPCODE_MOV, fs_reg(MRF, base_mrf + mlen + i), coordinate);
773 emit(BRW_OPCODE_MOV, fs_reg(MRF, base_mrf + mlen), fs_reg(0.0f));
776 emit(BRW_OPCODE_MOV, fs_reg(MRF, base_mrf + mlen), lod);
782 emit(BRW_OPCODE_MOV, fs_reg(MRF, base_mrf + mlen), shadow_c);
786 emit(BRW_OPCODE_MOV, fs_reg(MRF, base_mrf + mlen + i), coordinate);
795 emit(BRW_OPCODE_MOV, fs_reg(MRF, base_mrf + mlen + i), coordinate);
816 emit(BRW_OPCODE_MOV, fs_reg(MRF, base_mrf + mlen), dPdx);
822 emit(BRW_OPCODE_MOV, fs_reg(MRF, base_mrf + mlen), dPdy);
829 emit(BRW_OPCODE_MOV, fs_reg(MRF, base_mrf + mlen, BRW_REGISTER_TYPE_UD), lod);
839 emit(BRW_OPCODE_MOV, fs_reg(MRF, base_mr
[all...] |
| H A D | brw_fs_schedule_instructions.cpp | 236 /* instruction scheduling needs to be aware of when an MRF write
288 assert(inst->src[i].file != MRF);
294 /* It looks like the MRF regs are released in the send
310 } else if (inst->dst.file == MRF) {
372 assert(inst->src[i].file != MRF);
378 /* It looks like the MRF regs are released in the send
394 } else if (inst->dst.file == MRF) {
|
| H A D | brw_vec4_visitor.cpp | 1914 /* MRF for the first parameter */
1919 emit(MOV(dst_reg(MRF, param_base, lod_type, writemask), lod));
1944 emit(ADD(dst_reg(MRF, param_base, ir->coordinate->type, 1 << j),
1948 emit(MOV(dst_reg(MRF, param_base, ir->coordinate->type, coord_mask),
1951 emit(MOV(dst_reg(MRF, param_base, ir->coordinate->type, zero_mask),
1955 emit(MOV(dst_reg(MRF, param_base + 1, ir->shadow_comparitor->type,
1977 emit(MOV(dst_reg(MRF, mrf, lod_type, writemask), lod));
1979 emit(MOV(dst_reg(MRF, param_base, lod_type, WRITEMASK_W),
1987 emit(MOV(dst_reg(MRF, param_base + 1, type, WRITEMASK_XZ), dPdx));
1988 emit(MOV(dst_reg(MRF, param_bas
[all...] |
| H A D | brw_vec4.cpp | 693 * written and then MOVed into an MRF and making the original write of
694 * the GRF write directly to the MRF instead.
712 inst->dst.file != MRF || inst->src[0].file != GRF ||
719 /* Can't compute-to-MRF this GRF if someone else was going to
725 /* We need to check interference with the MRF between this
738 /* We don't handle compute-to-MRF across a swizzle. We would
754 * rewrite everything writing to the GRF into the MRF instead.
764 * a compute-to-MRF.
767 /* SEND instructions can't have MRF as a destination. */
773 * GRF, so no compute-to-MRF fo
[all...] |
| H A D | brw_fs.cpp | 883 emit(BRW_OPCODE_MOV, fs_reg(MRF, base_mrf + 1, op1.type), op1);
1686 inst->dst.file != MRF || inst->src[0].file != GRF ||
1691 /* Work out which hardware MRF registers are written by this
1705 /* Can't compute-to-MRF this GRF if someone else was going to
1711 /* Found a move of a GRF to a MRF. Let's see if we can go
1712 * rewrite the thing that made this GRF to write into the MRF.
1721 * into a compute-to-MRF.
1724 /* SENDs can only write to GRFs, so no compute-to-MRF. */
1745 /* SEND instructions can't have MRF as a destination. */
1751 * GRF, so no compute-to-MRF fo
[all...] |
| H A D | brw_fs.h | 61 MRF, enumerator in enum:register_file
94 /** Register file: ARF, GRF, MRF, IMM. */
97 * Register number. For ARF/MRF, it's the hardware register. For
166 int base_mrf; /**< First MRF in the SEND message, if mlen is nonzero. */
|
| H A D | brw_vec4.h | 50 MRF = BRW_MESSAGE_REGISTER_FILE, enumerator in enum:brw::register_file
61 /** Register file: ARF, GRF, MRF, IMM. */
188 int base_mrf; /**< First MRF in the SEND message, if mlen is nonzero. */
|
| H A D | brw_fs_emit.cpp | 398 /* Explicitly set up the message header by copying g0 to the MRF. */
408 /* Set up an implied move from g0 to the MRF. */
660 case MRF:
678 case MRF:
|
| H A D | brw_vec4_emit.cpp | 168 case MRF:
440 /* Explicitly set up the message header by copying g0 to the MRF. */
452 /* Set up an implied move from g0 to the MRF. */
|
| /external/mesa3d/src/mesa/drivers/dri/i965/ |
| H A D | brw_fs_visitor.cpp | 763 emit(BRW_OPCODE_MOV, fs_reg(MRF, base_mrf + mlen + i), coordinate);
773 emit(BRW_OPCODE_MOV, fs_reg(MRF, base_mrf + mlen), fs_reg(0.0f));
776 emit(BRW_OPCODE_MOV, fs_reg(MRF, base_mrf + mlen), lod);
782 emit(BRW_OPCODE_MOV, fs_reg(MRF, base_mrf + mlen), shadow_c);
786 emit(BRW_OPCODE_MOV, fs_reg(MRF, base_mrf + mlen + i), coordinate);
795 emit(BRW_OPCODE_MOV, fs_reg(MRF, base_mrf + mlen + i), coordinate);
816 emit(BRW_OPCODE_MOV, fs_reg(MRF, base_mrf + mlen), dPdx);
822 emit(BRW_OPCODE_MOV, fs_reg(MRF, base_mrf + mlen), dPdy);
829 emit(BRW_OPCODE_MOV, fs_reg(MRF, base_mrf + mlen, BRW_REGISTER_TYPE_UD), lod);
839 emit(BRW_OPCODE_MOV, fs_reg(MRF, base_mr
[all...] |
| H A D | brw_fs_schedule_instructions.cpp | 236 /* instruction scheduling needs to be aware of when an MRF write
288 assert(inst->src[i].file != MRF);
294 /* It looks like the MRF regs are released in the send
310 } else if (inst->dst.file == MRF) {
372 assert(inst->src[i].file != MRF);
378 /* It looks like the MRF regs are released in the send
394 } else if (inst->dst.file == MRF) {
|
| H A D | brw_vec4_visitor.cpp | 1914 /* MRF for the first parameter */
1919 emit(MOV(dst_reg(MRF, param_base, lod_type, writemask), lod));
1944 emit(ADD(dst_reg(MRF, param_base, ir->coordinate->type, 1 << j),
1948 emit(MOV(dst_reg(MRF, param_base, ir->coordinate->type, coord_mask),
1951 emit(MOV(dst_reg(MRF, param_base, ir->coordinate->type, zero_mask),
1955 emit(MOV(dst_reg(MRF, param_base + 1, ir->shadow_comparitor->type,
1977 emit(MOV(dst_reg(MRF, mrf, lod_type, writemask), lod));
1979 emit(MOV(dst_reg(MRF, param_base, lod_type, WRITEMASK_W),
1987 emit(MOV(dst_reg(MRF, param_base + 1, type, WRITEMASK_XZ), dPdx));
1988 emit(MOV(dst_reg(MRF, param_bas
[all...] |
| H A D | brw_vec4.cpp | 693 * written and then MOVed into an MRF and making the original write of
694 * the GRF write directly to the MRF instead.
712 inst->dst.file != MRF || inst->src[0].file != GRF ||
719 /* Can't compute-to-MRF this GRF if someone else was going to
725 /* We need to check interference with the MRF between this
738 /* We don't handle compute-to-MRF across a swizzle. We would
754 * rewrite everything writing to the GRF into the MRF instead.
764 * a compute-to-MRF.
767 /* SEND instructions can't have MRF as a destination. */
773 * GRF, so no compute-to-MRF fo
[all...] |
| H A D | brw_fs.cpp | 883 emit(BRW_OPCODE_MOV, fs_reg(MRF, base_mrf + 1, op1.type), op1);
1686 inst->dst.file != MRF || inst->src[0].file != GRF ||
1691 /* Work out which hardware MRF registers are written by this
1705 /* Can't compute-to-MRF this GRF if someone else was going to
1711 /* Found a move of a GRF to a MRF. Let's see if we can go
1712 * rewrite the thing that made this GRF to write into the MRF.
1721 * into a compute-to-MRF.
1724 /* SENDs can only write to GRFs, so no compute-to-MRF. */
1745 /* SEND instructions can't have MRF as a destination. */
1751 * GRF, so no compute-to-MRF fo
[all...] |
| H A D | brw_fs.h | 61 MRF, enumerator in enum:register_file
94 /** Register file: ARF, GRF, MRF, IMM. */
97 * Register number. For ARF/MRF, it's the hardware register. For
166 int base_mrf; /**< First MRF in the SEND message, if mlen is nonzero. */
|
| H A D | brw_vec4.h | 50 MRF = BRW_MESSAGE_REGISTER_FILE, enumerator in enum:brw::register_file
61 /** Register file: ARF, GRF, MRF, IMM. */
188 int base_mrf; /**< First MRF in the SEND message, if mlen is nonzero. */
|
| H A D | brw_fs_emit.cpp | 398 /* Explicitly set up the message header by copying g0 to the MRF. */
408 /* Set up an implied move from g0 to the MRF. */
660 case MRF:
678 case MRF:
|
| H A D | brw_vec4_emit.cpp | 168 case MRF:
440 /* Explicitly set up the message header by copying g0 to the MRF. */
452 /* Set up an implied move from g0 to the MRF. */
|