Searched refs:MTC1 (Results 1 - 11 of 11) sorted by relevance
/external/llvm/lib/Target/Mips/ |
H A D | MipsSEInstrInfo.cpp | 121 Opc = Mips::MTC1; 301 expandCvtFPInt(MBB, MI, Mips::CVT_S_W, Mips::MTC1, false); 304 expandCvtFPInt(MBB, MI, Mips::CVT_D32_W, Mips::MTC1, false); 310 expandCvtFPInt(MBB, MI, Mips::CVT_D64_W, Mips::MTC1, true); 547 const MCInstrDesc& Mtc1Tdd = get(Mips::MTC1);
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H A D | MipsFastISel.cpp | 328 EmitInst(Mips::MTC1, DestReg).addReg(TempReg);
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H A D | MipsAsmPrinter.cpp | 735 // Because of the current td files for Mips32, the operands for MTC1 739 if (Opcode == Mips::MTC1) { 775 unsigned MovOpc = ToFP ? Mips::MTC1 : Mips::MFC1;
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/external/chromium_org/v8/src/mips/ |
H A D | constants-mips.h | 449 MTC1 = ((0 << 3) + 4) << 21,
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H A D | simulator-mips.cc | 1902 case MTC1: 2195 case MTC1:
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H A D | assembler-mips.cc | 2011 GenInstrRegister(COP1, MTC1, rt, fs, f0);
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/external/chromium_org/v8/src/mips64/ |
H A D | constants-mips64.h | 461 MTC1 = ((0 << 3) + 4) << 21,
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H A D | simulator-mips64.cc | 1972 case MTC1: 2330 case MTC1:
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H A D | assembler-mips64.cc | 2227 GenInstrRegister(COP1, MTC1, rt, fs, f0);
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/external/pcre/dist/sljit/ |
H A D | sljitNativeMIPS_common.c | 151 #define MTC1 (HI(17) | (4 << 21)) macro 1351 FAIL_IF(push_inst(compiler, MTC1 | flags | T(src) | FS(TMP_FREG1), MOVABLE_INS)); 1362 FAIL_IF(push_inst(compiler, MTC1 | flags | T(TMP_REG1) | FS(TMP_FREG1), MOVABLE_INS));
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/external/valgrind/main/none/tests/mips32/ |
H A D | MoveIns.stdout.exp | 29 MTC1
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