| /external/valgrind/main/none/tests/mips64/ |
| H A D | logical_instructions.c | 6 AND=0, ANDI, LUI, NOR, enumerator in enum:__anon33131
52 case NOR:
|
| /external/chromium_org/v8/src/mips/ |
| H A D | constants-mips.cc | 243 case NOR:
|
| H A D | constants-mips.h | 403 NOR = ((4 << 3) + 7),
|
| H A D | simulator-mips.cc | 2042 case NOR:
|
| H A D | assembler-mips.cc | 1592 GenInstrRegister(SPECIAL, rs, rt, rd, 0, NOR);
|
| /external/chromium_org/v8/src/mips64/ |
| H A D | constants-mips64.cc | 260 case NOR:
|
| H A D | constants-mips64.h | 387 NOR = ((4 << 3) + 7),
|
| H A D | assembler-mips64.cc | 1656 GenInstrRegister(SPECIAL, rs, rt, rd, 0, NOR);
|
| H A D | simulator-mips64.cc | 2164 case NOR:
|
| /external/pcre/dist/sljit/ |
| H A D | sljitNativeMIPS_32.c | 121 FAIL_IF(push_inst(compiler, NOR | S(src2) | T(src2) | DA(EQUAL_FLAG), EQUAL_FLAG));
123 FAIL_IF(push_inst(compiler, NOR | S(src2) | T(src2) | D(dst), DR(dst)));
159 FAIL_IF(push_inst(compiler, NOR | S(src1) | T(src1) | DA(OVERFLOW_FLAG), OVERFLOW_FLAG));
238 FAIL_IF(push_inst(compiler, NOR | S(src1) | T(src1) | DA(OVERFLOW_FLAG), OVERFLOW_FLAG));
|
| H A D | sljitNativeMIPS_64.c | 213 FAIL_IF(push_inst(compiler, NOR | S(src2) | T(src2) | DA(EQUAL_FLAG), EQUAL_FLAG));
215 FAIL_IF(push_inst(compiler, NOR | S(src2) | T(src2) | D(dst), DR(dst)));
251 FAIL_IF(push_inst(compiler, NOR | S(src1) | T(src1) | DA(OVERFLOW_FLAG), OVERFLOW_FLAG));
330 FAIL_IF(push_inst(compiler, NOR | S(src1) | T(src1) | DA(OVERFLOW_FLAG), OVERFLOW_FLAG));
|
| H A D | sljitNativePPC_32.c | 87 return push_inst(compiler, NOR | RC(flags) | S(src2) | A(dst) | B(src2));
|
| H A D | sljitNativePPC_64.c | 203 return push_inst(compiler, NOR | RC(flags) | S(src2) | A(dst) | B(src2));
|
| H A D | sljitNativeTILEGX_64.c | 402 #define NOR(dst, srca, srcb) \ macro
1690 FAIL_IF(NOR(EQUAL_FLAG, reg_map[src2], reg_map[src2]));
1692 FAIL_IF(NOR(reg_map[dst], reg_map[src2], reg_map[src2]));
|
| H A D | sljitNativeMIPS_common.c | 157 #define NOR (HI(0) | LO(39)) macro
|
| H A D | sljitNativePPC_common.c | 193 #define NOR (HI(31) | LO(124)) macro
|
| /external/llvm/lib/Target/Mips/InstPrinter/ |
| H A D | MipsInstPrinter.cpp | 303 case Mips::NOR:
|
| /external/llvm/lib/Target/Mips/ |
| H A D | MipsISelLowering.cpp | 964 unsigned LL, SC, AND, NOR, ZERO, BEQ; local
975 NOR = Mips::NOR;
982 NOR = Mips::NOR64;
1027 BuildMI(BB, DL, TII->get(NOR), StoreVal).addReg(ZERO).addReg(AndRes);
1155 BuildMI(BB, DL, TII->get(Mips::NOR), Mask2).addReg(Mips::ZERO).addReg(Mask);
1184 BuildMI(BB, DL, TII->get(Mips::NOR), BinOpRes)
1395 BuildMI(BB, DL, TII->get(Mips::NOR), Mask2).addReg(Mips::ZERO).addReg(Mask);
|
| /external/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelDAGToDAG.cpp | 800 Op = SDValue(CurDAG->getMachineNode(PPC::NOR, dl, MVT::i32, Op, Op), 0);
|
| /external/eclipse-basebuilder/basebuilder-3.6.2/org.eclipse.releng.basebuilder/plugins/ |
| H A D | org.sat4j.core_2.2.0.v20100429.jar | META-INF/MANIFEST.MF META-INF/ECLIPSEF.SF META-INF/ECLIPSEF.RSA META ... |