Searched refs:Reg31IsZeroRegister (Results 1 - 5 of 5) sorted by relevance

/external/vixl/src/a64/
H A Dsimulator-a64.h212 Reg31Mode r31mode = Reg31IsZeroRegister) const {
218 if ((code == 31) && (r31mode == Reg31IsZeroRegister)) {
228 inline T reg(unsigned code, Reg31Mode r31mode = Reg31IsZeroRegister) const {
234 Reg31Mode r31mode = Reg31IsZeroRegister) const {
239 Reg31Mode r31mode = Reg31IsZeroRegister) const {
244 Reg31Mode r31mode = Reg31IsZeroRegister) const {
254 Reg31Mode r31mode = Reg31IsZeroRegister) {
260 if ((code == 31) && (r31mode == Reg31IsZeroRegister)) {
269 Reg31Mode r31mode = Reg31IsZeroRegister) {
275 Reg31Mode r31mode = Reg31IsZeroRegister) {
[all...]
H A Dinstructions-a64.h149 Reg31IsZeroRegister enumerator in enum:vixl::Reg31Mode
255 return Reg31IsZeroRegister;
266 return Reg31IsZeroRegister;
271 return Reg31IsZeroRegister;
285 return Reg31IsZeroRegister;
/external/chromium_org/v8/src/arm64/
H A Dinstructions-arm64.h92 Reg31IsZeroRegister enumerator in enum:v8::internal::Reg31Mode
228 return Reg31IsZeroRegister;
239 return Reg31IsZeroRegister;
244 return Reg31IsZeroRegister;
258 return Reg31IsZeroRegister;
H A Dsimulator-arm64.h325 return ((code == 31) && (r31mode == Reg31IsZeroRegister));
333 T reg(unsigned code, Reg31Mode r31mode = Reg31IsZeroRegister) const {
342 int32_t wreg(unsigned code, Reg31Mode r31mode = Reg31IsZeroRegister) const {
346 int64_t xreg(unsigned code, Reg31Mode r31mode = Reg31IsZeroRegister) const {
354 Reg31Mode r31mode = Reg31IsZeroRegister) {
361 Reg31Mode r31mode = Reg31IsZeroRegister) {
366 Reg31Mode r31mode = Reg31IsZeroRegister) {
373 Reg31Mode r31mode = Reg31IsZeroRegister) {
381 Reg31Mode r31mode = Reg31IsZeroRegister) {
386 Reg31Mode r31mode = Reg31IsZeroRegister) {
[all...]
H A Dsimulator-arm64.cc1080 if ((code == kZeroRegCode) && (r31mode == Reg31IsZeroRegister)) {

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