Searched refs:TMP_REG2 (Results 1 - 12 of 12) sorted by relevance

/external/pcre/dist/sljit/
H A DsljitNativePPC_32.c100 SLJIT_ASSERT(src2 == TMP_REG2);
105 SLJIT_ASSERT(src2 == TMP_REG2);
109 SLJIT_ASSERT(src2 == TMP_REG2);
132 SLJIT_ASSERT(src2 == TMP_REG2);
136 SLJIT_ASSERT(src2 == TMP_REG2);
166 SLJIT_ASSERT(src2 == TMP_REG2);
173 SLJIT_ASSERT(src2 == TMP_REG2);
177 SLJIT_ASSERT(src2 == TMP_REG2);
184 SLJIT_ASSERT(src2 == TMP_REG2);
188 SLJIT_ASSERT(src2 == TMP_REG2);
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H A DsljitNativePPC_64.c126 FAIL_IF(push_inst(compiler, EXTSW | S(src2) | A(TMP_REG2))); \
127 src2 = TMP_REG2; \
137 FAIL_IF(push_inst(compiler, EXTSW | S(src2) | A(TMP_REG2))); \
138 src2 = TMP_REG2; \
219 SLJIT_ASSERT(src2 == TMP_REG2);
224 SLJIT_ASSERT(src2 == TMP_REG2);
228 SLJIT_ASSERT(src2 == TMP_REG2);
254 SLJIT_ASSERT(src2 == TMP_REG2);
258 SLJIT_ASSERT(src2 == TMP_REG2);
290 SLJIT_ASSERT(src2 == TMP_REG2);
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H A DsljitNativePPC_common.c91 #define TMP_REG2 (SLJIT_NUMBER_OF_REGISTERS + 3) macro
98 #define TMP_CALL_REG TMP_REG2
1138 arg2 goes to TMP_REG2, imm or src reg
1140 result goes to TMP_REG2, so put result can use TMP_REG1 and TMP_REG3. */
1144 sljit_si sugg_src2_r = TMP_REG2;
1156 dst_r = TMP_REG2;
1166 if (getput_arg_fast(compiler, input_flags | ARG_TEST, TMP_REG2, dst, dstw)) {
1168 dst_r = TMP_REG2;
1214 FAIL_IF(getput_arg(compiler, input_flags | LOAD_DATA, TMP_REG2, src2, src2w, src1, src1w));
1219 FAIL_IF(getput_arg(compiler, input_flags | LOAD_DATA, TMP_REG2, src
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H A DsljitNativeSPARC_common.c85 /* TMP_REG2 is not used by getput_arg */
87 #define TMP_REG2 (SLJIT_NUMBER_OF_REGISTERS + 3) macro
653 arg2 goes to TMP_REG2, imm or src reg
655 result goes to TMP_REG2, so put result can use TMP_REG1 and TMP_REG3. */
656 sljit_si dst_r = TMP_REG2;
659 sljit_si sugg_src2_r = TMP_REG2;
748 SLJIT_ASSERT(src2_r == TMP_REG2);
750 FAIL_IF(getput_arg(compiler, flags | LOAD_DATA, TMP_REG2, src2, src2w, src1, src1w));
755 FAIL_IF(getput_arg(compiler, flags | LOAD_DATA, TMP_REG2, src2, src2w, dst, dstw));
804 FAIL_IF(push_inst(compiler, OR | D(TMP_REG2) | S
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H A DsljitNativeARM_T2_32.c37 #define TMP_REG2 (SLJIT_NUMBER_OF_REGISTERS + 3) macro
515 arg2 must be register, TMP_REG2, imm */
668 FAIL_IF(load_immediate(compiler, TMP_REG2, arg2));
669 arg2 = TMP_REG2;
750 SLJIT_ASSERT(reg_map[TMP_REG2] <= 7 && dst != TMP_REG2);
751 FAIL_IF(push_inst32(compiler, SMULL | RT4(dst) | RD4(TMP_REG2) | RN4(arg1) | RM4(arg2)));
752 /* cmp TMP_REG2, dst asr #31. */
753 return push_inst32(compiler, CMP_W | RN4(TMP_REG2) | 0x70e0 | RM4(dst));
1406 if (getput_arg_fast(compiler, WORD_SIZE, TMP_REG2, sr
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H A DsljitNativeMIPS_common.c48 #define TMP_REG2 (SLJIT_NUMBER_OF_REGISTERS + 3) macro
52 #define PIC_ADDR_REG TMP_REG2
575 FAIL_IF(push_inst(compiler, ADDU_W | S(SLJIT_SP) | TA(0) | D(TMP_REG2), DR(TMP_REG2)));
577 base = S(TMP_REG2);
918 arg2 goes to TMP_REG2, imm or src reg
920 result goes to TMP_REG2, so put result can use TMP_REG1 and TMP_REG3. */
921 sljit_si dst_r = TMP_REG2;
924 sljit_si sugg_src2_r = TMP_REG2;
1019 SLJIT_ASSERT(src2_r == TMP_REG2);
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H A DsljitNativeMIPS_32.c228 FAIL_IF(push_inst(compiler, ADDIU | SA(0) | T(TMP_REG2) | IMM(src2), DR(TMP_REG2)));
229 src2 = TMP_REG2;
275 FAIL_IF(push_inst(compiler, ADDIU | SA(0) | T(TMP_REG2) | IMM(src2), DR(TMP_REG2)));
276 src2 = TMP_REG2;
H A DsljitNativeMIPS_64.c320 FAIL_IF(push_inst(compiler, ADDIU | SA(0) | T(TMP_REG2) | IMM(src2), DR(TMP_REG2)));
321 src2 = TMP_REG2;
367 FAIL_IF(push_inst(compiler, ADDIU | SA(0) | T(TMP_REG2) | IMM(src2), DR(TMP_REG2)));
368 src2 = TMP_REG2;
H A DsljitNativeARM_32.c40 #define TMP_REG2 (SLJIT_NUMBER_OF_REGISTERS + 3) macro
1118 /* cmp TMP_REG2, dst asr #31. */
1621 arg2 goes to TMP_REG2, imm or src reg
1623 result goes to TMP_REG2, so put result can use TMP_REG1 and TMP_REG3. */
1629 sljit_si sugg_src2_r = TMP_REG2;
1639 dst_r = TMP_REG2;
1649 if (getput_arg_fast(compiler, inp_flags | ARG_TEST, TMP_REG2, dst, dstw)) {
1651 dst_r = TMP_REG2;
1759 FAIL_IF(getput_arg(compiler, inp_flags | LOAD_DATA, TMP_REG2, src1, src1w, dst, dstw));
1763 FAIL_IF(getput_arg(compiler, inp_flags | LOAD_DATA, TMP_REG2, src
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H A DsljitNativeARM_64.c38 #define TMP_REG2 (SLJIT_NUMBER_OF_REGISTERS + 3) macro
520 arg2 must be register, TMP_REG2, imm */
647 FAIL_IF(load_immediate(compiler, TMP_REG2, arg2));
648 arg2 = TMP_REG2;
1372 if (getput_arg_fast(compiler, mem_flags, TMP_REG2, src, srcw))
1375 FAIL_IF(getput_arg(compiler, mem_flags, TMP_REG2, src, srcw, dst, dstw));
1376 src = TMP_REG2;
1434 if (getput_arg_fast(compiler, mem_flags, TMP_REG2, src2, src2w))
1442 FAIL_IF(getput_arg(compiler, mem_flags, TMP_REG2, src2, src2w, src1, src1w));
1447 FAIL_IF(getput_arg(compiler, mem_flags, TMP_REG2, src
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H A DsljitNativeX86_common.c84 #define TMP_REG2 (SLJIT_NUMBER_OF_REGISTERS + 3) macro
687 FAIL_IF(emit_load_imm64(compiler, TMP_REG2, srcw));
688 inst = emit_x86_instruction(compiler, 1, TMP_REG2, 0, dst, dstw);
1188 dst_r = FAST_IS_REG(dst) ? dst : TMP_REG2;
1241 EMIT_MOV(compiler, dst, dstw, TMP_REG2, 0);
1424 FAIL_IF(emit_load_imm64(compiler, TMP_REG2, immw)); \
1425 inst = emit_x86_instruction(compiler, 1, TMP_REG2, 0, arg, argw); \
1703 EMIT_MOV(compiler, TMP_REG2, 0, SLJIT_IMM, src1w);
1706 inst = emit_x86_instruction(compiler, 2, dst_r, 0, TMP_REG2, 0);
1746 EMIT_MOV(compiler, TMP_REG2,
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H A DsljitNativeTILEGX_64.c47 #define TMP_REG2 (SLJIT_NO_REGISTERS + 2) macro
50 #define PIC_ADDR_REG TMP_REG2
1814 src2 = TMP_REG2;
1892 src2 = TMP_REG2;
1997 arg2 goes to TMP_REG2, imm or src reg.
1999 result goes to TMP_REG2, so put result can use TMP_REG1 and TMP_REG3. */
2000 sljit_si dst_r = TMP_REG2;
2003 sljit_si sugg_src2_r = TMP_REG2;
2093 SLJIT_ASSERT(src2_r == TMP_REG2);
2133 sugg_dst_ar = reg_map[(op < SLJIT_ADD && FAST_IS_REG(dst)) ? dst : TMP_REG2];
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