Searched refs:X0100 (Results 1 - 5 of 5) sorted by relevance
| /external/valgrind/main/VEX/priv/ |
| H A D | host_arm_defs.c | 2733 #define X0100 BITS4(0,1,0,0) macro
2993 case ARMalu_ADD: subopc = X0100; break;
3562 case ARMvfp_MUL: pqrs = X0100; break;
3587 case ARMvfp_MUL: pqrs = X0100; break;
3608 insn = XXXXXXXX(0xE, X1110,X1011,X0000,dD,X1011,X0100,dM);
3614 insn = XXXXXXXX(0xE, X1110,X1011,X0001,dD,X1011,X0100,dM);
3659 UInt insn = XXXXXXXX(0xE, X1110, X1011, X0100, dD, X1011, X0100, dM);
3669 UInt insn = XXXXXXXX(cc, X1110,X1011,X0000,dD,X1011,X0100,dM);
3763 X1011, X0100, reg
4872 #undef X0100 macro
[all...] |
| /external/oprofile/events/ppc64/970MP/ |
| H A D | event_mappings | 162 event:0X0100 mmcr0:0X00001029 mmcr1:0X000F0000851E9958 mmcra:0X00002000
|
| /external/oprofile/events/ppc64/power5++/ |
| H A D | event_mappings | 105 event:0X0100 mmcr0:0X00000000 mmcr1:0XC8E000022010C610 mmcra:0X00000001
|
| /external/oprofile/events/ppc64/power6/ |
| H A D | event_mappings | 106 event:0X0100 mmcr0:0X00000000 mmcr1:0X000000005A2A5C26 mmcra:0X00000000
|
| /external/oprofile/events/ppc64/power7/ |
| H A D | event_mappings | 135 event:0X0100 mmcr0:0X00000000 mmcr1:0XD0C0000090FE5AF0 mmcra:0X00000000
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