Searched refs:crn (Results 1 - 6 of 6) sorted by relevance

/external/kernel-headers/original/uapi/asm-arm64/asm/
H A Dkvm.h137 #define __ARM64_SYS_REG(op0,op1,crn,crm,op2) \
141 ARM64_SYS_REG_SHIFT_MASK(crn, CRN) | \
/external/kernel-headers/original/uapi/asm-arm/asm/
H A Dkvm.h125 #define __ARM_CP15_REG(op1,crn,crm,op2) \
128 ARM_CP15_REG_SHIFT_MASK(crn, 32_CRN) | \
/external/qemu/target-arm/
H A Dcpu.h470 * (In this case crn and opc2 should be zero.)
472 #define ENCODE_CP_REG(cp, is64, crn, crm, opc1, opc2) \
473 (((cp) << 16) | ((is64) << 15) | ((crn) << 11) | \
510 * same (cp, is64, crn, crm, opc1, opc2) tuple: either the new or the
603 /* Location of register: coprocessor number and (crn,crm,opc1,opc2)
607 * callbacks will be passed an ARMCPRegInfo with the crn/crm/opc1/opc2
610 * For 64 bit registers, only crm and opc1 are relevant; crn and opc2
614 uint8_t crn; member in struct:ARMCPRegInfo
H A Dtranslate.c6238 int crn = (insn >> 16) & 0xf; local
6246 if (op1 == 0 && crn == 0 && op2 == 0) {
6274 if (op1 == 6 && crn == 0 && crm == 0 && op2 == 0) {
6282 if (op1 == 6 && crn == 1 && crm == 0 && op2 == 0) {
6291 fprintf(stderr, "Unknown cp14 read op1:%d crn:%d crm:%d op2:%d\n",
6292 op1, crn, crm, op2);
6298 int crn = (insn >> 16) & 0xf; local
6306 if (op1 == 0 && crn == 0 && op2 == 0) {
6330 if (op1 == 6 && crn == 0 && crm == 0 && op2 == 0) {
6339 if (op1 == 6 && crn
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/external/chromium_org/v8/src/arm/
H A Dassembler-arm.h1073 CRegister crd, CRegister crn, CRegister crm,
1077 CRegister crd, CRegister crn, CRegister crm,
1081 Register rd, CRegister crn, CRegister crm,
1085 Register rd, CRegister crn, CRegister crm,
1089 Register rd, CRegister crn, CRegister crm,
1093 Register rd, CRegister crn, CRegister crm,
H A Dassembler-arm.cc2042 CRegister crn,
2047 emit(cond | B27 | B26 | B25 | (opcode_1 & 15)*B20 | crn.code()*B16 |
2055 CRegister crn,
2058 cdp(coproc, opcode_1, crd, crn, crm, opcode_2, kSpecialCondition);
2065 CRegister crn,
2070 emit(cond | B27 | B26 | B25 | (opcode_1 & 7)*B21 | crn.code()*B16 |
2078 CRegister crn,
2081 mcr(coproc, opcode_1, rd, crn, crm, opcode_2, kSpecialCondition);
2088 CRegister crn,
2093 emit(cond | B27 | B26 | B25 | (opcode_1 & 7)*B21 | L | crn
2039 cdp(Coprocessor coproc, int opcode_1, CRegister crd, CRegister crn, CRegister crm, int opcode_2, Condition cond) argument
2052 cdp2(Coprocessor coproc, int opcode_1, CRegister crd, CRegister crn, CRegister crm, int opcode_2) argument
2062 mcr(Coprocessor coproc, int opcode_1, Register rd, CRegister crn, CRegister crm, int opcode_2, Condition cond) argument
2075 mcr2(Coprocessor coproc, int opcode_1, Register rd, CRegister crn, CRegister crm, int opcode_2) argument
2085 mrc(Coprocessor coproc, int opcode_1, Register rd, CRegister crn, CRegister crm, int opcode_2, Condition cond) argument
2098 mrc2(Coprocessor coproc, int opcode_1, Register rd, CRegister crn, CRegister crm, int opcode_2) argument
[all...]

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