/external/vixl/src/a64/ |
H A D | instructions-a64.cc | 64 int64_t imm_r = ImmRotate(); local 66 // An integer is constructed from the n, imm_s and imm_r bits according to 88 return RotateRight(bits, imm_r, 64); 101 RotateRight(bits, imm_r & mask, width),
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H A D | assembler-a64.cc | 1663 unsigned n, imm_s, imm_r; local 1664 if (IsImmLogical(immediate, reg_size, &n, &imm_s, &imm_r)) { 1666 LogicalImmediate(rd, rn, n, imm_s, imm_r, op); 1684 unsigned imm_r, 1689 ImmSetBits(imm_s, reg_size) | ImmRotate(imm_r, reg_size) | dest_reg | 1914 // imm_s and imm_r are updated with immediates encoded in the format required 1917 // to by n, imm_s and imm_r are undefined. 1922 unsigned* imm_r) { 1923 VIXL_ASSERT((n != NULL) && (imm_s != NULL) && (imm_r != NULL)); 1926 // Logical immediates are encoded using parameters n, imm_s and imm_r usin 1680 LogicalImmediate(const Register& rd, const Register& rn, unsigned n, unsigned imm_s, unsigned imm_r, LogicalOp op) argument 1918 IsImmLogical(uint64_t value, unsigned width, unsigned* n, unsigned* imm_s, unsigned* imm_r) argument [all...] |
H A D | macro-assembler-a64.cc | 176 unsigned n, imm_s, imm_r; local 177 if (IsImmLogical(immediate, reg_size, &n, &imm_s, &imm_r)) { 179 LogicalImmediate(rd, rn, n, imm_s, imm_r, op); 292 unsigned n, imm_s, imm_r; local 301 } else if (IsImmLogical(imm, reg_size, &n, &imm_s, &imm_r)) { 304 LogicalImmediate(rd, AppropriateZeroRegFor(rd), n, imm_s, imm_r, ORR);
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H A D | assembler-a64.h | 1716 unsigned imm_r, 1722 unsigned* imm_r);
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/external/chromium_org/v8/src/arm64/ |
H A D | instructions-arm64.cc | 98 int64_t imm_r = ImmRotate(); local 100 // An integer is constructed from the n, imm_s and imm_r bits according to 122 return RotateRight(bits, imm_r, 64); 135 RotateRight(bits, imm_r & mask, width),
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H A D | assembler-arm64.cc | 2277 unsigned n, imm_s, imm_r; local 2278 if (IsImmLogical(immediate, reg_size, &n, &imm_s, &imm_r)) { 2280 LogicalImmediate(rd, rn, n, imm_s, imm_r, op); 2298 unsigned imm_r, 2303 ImmSetBits(imm_s, reg_size) | ImmRotate(imm_r, reg_size) | dest_reg | 2527 // imm_s and imm_r are updated with immediates encoded in the format required 2530 // to by n, imm_s and imm_r are undefined. 2535 unsigned* imm_r) { 2536 DCHECK((n != NULL) && (imm_s != NULL) && (imm_r != NULL)); 2541 // Logical immediates are encoded using parameters n, imm_s and imm_r usin 2294 LogicalImmediate(const Register& rd, const Register& rn, unsigned n, unsigned imm_s, unsigned imm_r, LogicalOp op) argument 2531 IsImmLogical(uint64_t value, unsigned width, unsigned* n, unsigned* imm_s, unsigned* imm_r) argument [all...] |
H A D | macro-assembler-arm64.cc | 122 unsigned n, imm_s, imm_r; local 123 if (IsImmLogical(immediate, reg_size, &n, &imm_s, &imm_r)) { 125 LogicalImmediate(rd, rn, n, imm_s, imm_r, op); 417 unsigned n, imm_s, imm_r; local 429 } else if (IsImmLogical(imm, reg_size, &n, &imm_s, &imm_r)) { 431 LogicalImmediate(dst, AppropriateZeroRegFor(dst), n, imm_s, imm_r, ORR);
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H A D | assembler-arm64.h | 1839 unsigned* imm_r); 1952 unsigned imm_r,
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/external/valgrind/main/VEX/priv/ |
H A D | host_arm64_isel.c | 1226 /*OUT*/UInt* imm_s, /*OUT*/UInt* imm_r, 1233 // pointed to by n, imm_s and imm_r are updated with immediates 1236 // returns false, and the values pointed to by n, imm_s and imm_r 1238 vassert(n != NULL && imm_s != NULL && imm_r != NULL); 1241 // Logical immediates are encoded using parameters n, imm_s and imm_r using 1288 *imm_r = (value & 3) - 1; 1295 *imm_r = 0; 1297 *imm_r = (lead_zero > 0) ? (width - trail_zero) : lead_one; 1334 UInt n = 0, imm_s = 0, imm_r = 0; local 1335 Bool ok = isImmLogical(&n, &imm_s, &imm_r, imm6 1225 isImmLogical( UInt* n, UInt* imm_s, UInt* imm_r, ULong value, UInt width ) argument [all...] |