| /external/compiler-rt/lib/builtins/arm/ |
| H A D | fixsfsivfp.S | 22 vmov s15, r0 // load float register from R0
23 vcvt.s32.f32 s15, s15 // convert single to 32-bit int into s15
24 vmov r0, s15 // move s15 to result register
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| H A D | fixunssfsivfp.S | 23 vmov s15, r0 // load float register from R0
24 vcvt.u32.f32 s15, s15 // convert single to 32-bit unsigned into s15
25 vmov r0, s15 // move s15 to result register
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| H A D | floatsisfvfp.S | 22 vmov s15, r0 // move int to float register s15
23 vcvt.f32.s32 s15, s15 // convert 32-bit int in s15 to float in s15
24 vmov r0, s15 // move s15 to result register
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| H A D | floatunssisfvfp.S | 22 vmov s15, r0 // move int to float register s15
23 vcvt.f32.u32 s15, s15 // convert 32-bit int in s15 to float in s15
24 vmov r0, s15 // move s15 to result register
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| H A D | addsf3vfp.S | 22 vmov s15, r1 // move second param from r1 into float register
23 vadd.f32 s14, s14, s15
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| H A D | divsf3vfp.S | 22 vmov s15, r1 // move second param from r1 into float register
23 vdiv.f32 s13, s14, s15
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| H A D | eqsf2vfp.S | 23 vmov s15, r1 // move from GPR 1 to float register
24 vcmp.f32 s14, s15
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| H A D | extendsfdf2vfp.S | 22 vmov s15, r0 // load float register from R0
23 vcvt.f64.f32 d7, s15 // convert single to double
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| H A D | fixdfsivfp.S | 23 vcvt.s32.f64 s15, d7 // convert double to 32-bit int into s15
24 vmov r0, s15 // move s15 to result register
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| H A D | fixunsdfsivfp.S | 24 vcvt.u32.f64 s15, d7 // convert double to 32-bit int into s15
25 vmov r0, s15 // move s15 to result register
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| H A D | floatsidfvfp.S | 22 vmov s15, r0 // move int to float register s15
23 vcvt.f64.s32 d7, s15 // convert 32-bit int in s15 to double in d7
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| H A D | floatunssidfvfp.S | 22 vmov s15, r0 // move int to float register s15
23 vcvt.f64.u32 d7, s15 // convert 32-bit int in s15 to double in d7
|
| H A D | gesf2vfp.S | 23 vmov s15, r1 // move from GPR 1 to float register
24 vcmp.f32 s14, s15
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| H A D | gtsf2vfp.S | 23 vmov s15, r1 // move from GPR 1 to float register
24 vcmp.f32 s14, s15
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| H A D | lesf2vfp.S | 23 vmov s15, r1 // move from GPR 1 to float register
24 vcmp.f32 s14, s15
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| H A D | ltsf2vfp.S | 23 vmov s15, r1 // move from GPR 1 to float register
24 vcmp.f32 s14, s15
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| H A D | mulsf3vfp.S | 22 vmov s15, r1 // move second param from r1 into float register
23 vmul.f32 s13, s14, s15
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| H A D | nesf2vfp.S | 23 vmov s15, r1 // move from GPR 1 to float register
24 vcmp.f32 s14, s15
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| H A D | subsf3vfp.S | 23 vmov s15, r1 // move second param from r1 into float register
24 vsub.f32 s14, s14, s15
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| H A D | truncdfsf2vfp.S | 23 vcvt.f32.f64 s15, d7 // convert double to single (trucate precision)
24 vmov r0, s15 // return result in r0
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| H A D | unordsf2vfp.S | 23 vmov s15, r1 // move from GPR 1 to float register
24 vcmp.f32 s14, s15
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| /external/chromium-trace/trace-viewer/src/tracing/trace_model/ |
| H A D | object_instance_test.js | 50 var s15 = instance.addSnapshot(15, 'a');
53 assertEquals(s15, instance.getSnapshotAt(10));
59 var s15 = instance.addSnapshot(15, 'a');
62 assertEquals(s15, instance.getSnapshotAt(20));
|
| /external/llvm/test/MC/AArch64/ |
| H A D | neon-scalar-extract-narrow.s | 10 sqxtun h21, s15
14 // CHECK: sqxtun h21, s15 // encoding: [0xf5,0x29,0x61,0x7e]
|
| H A D | neon-scalar-mul.s | 29 fmulx s20, s22, s15
32 // CHECK: fmulx s20, s22, s15 // encoding: [0xd4,0xde,0x2f,0x5e]
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| /external/valgrind/main/none/tests/arm/ |
| H A D | vfpv4_fma.c | 109 TESTINSN_bin_f32("vfma.f32 s10, s13, s15", s10, s13, i32, f2u(NAN), s15, i32, f2u(0.0));
110 TESTINSN_bin_f32("vfma.f32 s10, s13, s15", s10, s13, i32, f2u(NAN), s15, i32, f2u(NAN));
115 TESTINSN_bin_f32("vfma.f32 s30, s15, s2", s30, s15, i32, f2u(-45667.24), s2, i32, f2u(-248562.76));
118 TESTINSN_bin_f32("vfma.f32 s29, s15, s7", s29, s15, i32, f2u(214), s7, i32, f2u(1752065));
128 TESTINSN_bin_f32("vfma.f32 s20, s13, s15", s20, s13, i32, f2u(-INFINITY), s15, i3
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