Searched refs:v7m (Results 1 - 5 of 5) sorted by relevance

/external/qemu/target-arm/
H A Dmachine.c103 qemu_put_be32(f, env->v7m.other_sp);
104 qemu_put_be32(f, env->v7m.vecbase);
105 qemu_put_be32(f, env->v7m.basepri);
106 qemu_put_be32(f, env->v7m.control);
107 qemu_put_be32(f, env->v7m.current_sp);
108 qemu_put_be32(f, env->v7m.exception);
230 env->v7m.other_sp = qemu_get_be32(f);
231 env->v7m.vecbase = qemu_get_be32(f);
232 env->v7m.basepri = qemu_get_be32(f);
233 env->v7m
[all...]
H A Dcpu.h199 } v7m; member in struct:CPUARMState
354 | env->v7m.exception;
379 env->v7m.exception = val & 0x1ff;
890 privmode = !((env->v7m.exception == 0) && (env->v7m.control & 1));
H A Dhelper.c755 if (env->v7m.current_sp != process) {
756 tmp = env->v7m.other_sp;
757 env->v7m.other_sp = env->regs[13];
759 env->v7m.current_sp = process;
769 if (env->v7m.exception != 0)
770 armv7m_nvic_complete_irq(env->nvic, env->v7m.exception);
801 if (env->v7m.current_sp)
803 if (env->v7m.exception == 0)
835 env->v7m.exception = armv7m_nvic_acknowledge_irq(env->nvic);
864 addr = ldl_phys(env->v7m
[all...]
/external/qemu/hw/arm/
H A Darmv7m_nvic.c188 return cpu_single_env->v7m.vecbase;
321 cpu_single_env->v7m.vecbase = value & 0xffffff80;
/external/llvm/test/MC/ARM/
H A Dthumb2-mclass.s7 @ These tests test instruction encodings specific to v6m & v7m (FeatureMClass).

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