Searched refs:VIA_MAX_CACHELINE_SIZE (Results 1 - 1 of 1) sorted by relevance

/hardware/intel/img/libdrm/shared-core/
H A Dvia_drm.h55 #define VIA_MAX_CACHELINE_SIZE 64 macro
58 (VIA_MAX_CACHELINE_SIZE - 1)) & \
59 ~(VIA_MAX_CACHELINE_SIZE - 1)) + \
60 VIA_MAX_CACHELINE_SIZE*(lockNo)))
202 char XvMCLockArea[VIA_MAX_CACHELINE_SIZE * (VIA_NR_XVMC_LOCKS + 1)];

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