Searched refs:divider (Results 1 - 5 of 5) sorted by relevance

/hardware/invensense/60xx/mlsdk/mllite/
H A Dmldl_cfg.h95 unsigned char divider; member in struct:mldl_cfg
319 return 8000L / (mldl_cfg->divider + 1);
321 return 1000L / (mldl_cfg->divider + 1);
327 return (long) (1000000L * (mldl_cfg->divider + 1)) / 8000L;
329 return (long) (1000000L * (mldl_cfg->divider + 1)) / 1000L;
H A Dmldl.h131 inv_error_t inv_dl_cfg_sampling(unsigned char lpf, unsigned char divider);
H A Dmldl.c450 * 2) output sampling divider.
452 * The output sampling rate is determined by the divider and the low
455 * divider is 8kHz; for all other settings it is 1kHz.
456 * The 8-bit divider will divide this frequency to get the resulting
458 * For example, if the filter setting is not 256Hz and the divider is
465 * sample rate divider settig.
476 * @param divider Output sampling rate divider, 0 to 255.
480 inv_error_t inv_dl_cfg_sampling(unsigned char lpf, unsigned char divider) argument
488 mldlCfg.divider
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H A Dmldl_cfg_mpu.c71 MPL_LOGD("mldl_cfg.divider = %02x\n", mldl_cfg->divider);
/hardware/invensense/6515/libsensors_iio/software/simple_apps/playback/linux/
H A Dand_constructor.c295 unsigned char divider; local
308 divider = 4; // 4 means 200Hz DMP
311 inv_set_gyro_sample_rate(1000L*(divider+1)*(fifo_divider+1));
314 inv_set_quat_sample_rate(1000L*(divider+1)*(fifo_divider+1));
317 inv_set_compass_sample_rate(1000L*(divider+1)*(fifo_divider+1));
320 inv_set_accel_sample_rate(1000L*(divider+1)*(fifo_divider+1));
329 divider = fifo_dmp_cfg.sample_divider;
346 divider = 9;
348 inv_set_gyro_sample_rate(1000L*(divider+1));
350 inv_set_compass_sample_rate(1000L*(divider
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