Searched refs:dRow7 (Results 1 - 5 of 5) sorted by relevance
| /frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm_neon/vc/m4p2/src/ |
| H A D | omxVCM4P2_MCReconBlock_s.s | 71 VLD1 dRow7, [pSrc], srcStep
80 VST1 dRow7, [pDst@64], dstStep
125 VLD1 {dRow7, dRow7Shft}, [pSrc], srcStep
126 VEXT dRow7Shft, dRow7, dRow7Shft, #1
140 $M_VHADDR dRow7, dRow7, dRow7Shft
142 VST1 dRow7, [pDst@64], dstStep
179 VLD1 dRow7, [pSrc], srcStep
192 $M_VHADDR dRow6, dRow6, dRow7
194 $M_VHADDR dRow7, dRow
321 dRow7 DN D14.U8 define
[all...] |
| /frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm_neon/vc/m4p10/src/ |
| H A D | omxVCM4P10_FilterDeblockingChroma_VerEdge_I_s.s | 70 dRow7 DN D11.U8 define
167 VLD1 dRow7, [pTmp], step
177 ;// dRow7 = [q3r7 q2r7 q1r7 q0r7 p0r7 p1r7 p2r7 p3r7]
183 VZIP.8 dRow6, dRow7
188 VZIP.16 dRow5, dRow7
192 VZIP.32 dRow3, dRow7
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| H A D | omxVCM4P10_FilterDeblockingLuma_VerEdge_I_s.s | 72 dRow7 DN D11.U8 define
75 ;// dRow4 - dP_2, dRow5 - dQ_1, dRow6 - dP_0, dRow7 - dQ_3
260 VLD1 dRow7, [pTmp], pTmpStep
272 ;// dRow7 = [q3r7 q2r7 q1r7 q0r7 p0r7 p1r7 p2r7 p3r7]
276 VZIP.8 dRow6, dRow7
280 VZIP.16 dRow5, dRow7
286 VZIP.32 dRow3, dRow7
291 ;// dRow4 - dP_2, dRow5 - dQ_1, dRow6 - dP_0, dRow7 - dQ_3
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| /frameworks/av/media/libstagefright/codecs/on2/h264dec/source/arm_neon_asm/ |
| H A D | h264bsdWriteMacroblock.s | 59 dRow7 DN D7.U8 define
145 VST1 {dRow7}, [cb@64]
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| /frameworks/av/media/libstagefright/codecs/on2/h264dec/source/arm_neon_asm_gcc/ |
| H A D | h264bsdWriteMacroblock.S | 61 #define dRow7 D7.U8 define
147 VST1 {dRow7}, [cb,:64]
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