/art/compiler/dex/portable/ |
H A D | mir_to_gbc.cc | 104 if (loc.fp) 109 if (loc.fp) { 225 if (loc.fp) { 231 if (loc.fp) { 253 if (loc.fp) { 259 if (loc.fp) { 495 if (info->result.fp) { 502 } else if (info->result.fp) { 641 DCHECK_EQ(rl_src1.fp, rl_src2.fp); [all...] |
/art/compiler/dex/quick/arm/ |
H A D | int_arm.cc | 1329 if (rl_dest.wide || rl_dest.fp || constant_index) { 1431 if (rl_src.wide || rl_src.fp || constant_index) {
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/art/compiler/dex/quick/arm64/ |
H A D | int_arm64.cc | 1137 if (rl_dest.wide || rl_dest.fp || constant_index) { 1248 if (rl_src.wide || rl_src.fp || constant_index) { 1476 // Otherwise, spill both core and fp regs at the same time. 1480 // non-zero fp spills), but is more flexible, as the offsets are guaranteed small. 1482 // Some demonstrative fill cases : (c) = core, (f) = fp 1596 // number of fp spills.
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H A D | target_arm64.cc | 572 // On arm64, fp register load/store is atomic only for single bytes. 838 RegStorage reg = mapper->GetNextReg(arg_locs[in_position].fp, 860 if (loc->fp) { 975 // if ((v_map->core_location == kLocPhysReg) && !t_loc->fp) { 977 // } else if ((v_map->fp_location == kLocPhysReg) && t_loc->fp) {
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/art/compiler/dex/quick/ |
H A D | codegen_util.cc | 66 if (rl_src.fp) { 72 if (rl_src.fp) { 1062 // Combine vmap tables - core regs, then fp regs - into vmap_table. 1079 // fp regs already sorted.
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H A D | gen_common.cc | 221 DCHECK(!rl_src1.fp); 222 DCHECK(!rl_src2.fp); 287 DCHECK(!rl_src.fp); 700 // FIXME: pGetXXStatic always return an int or int64 regardless of rl_dest.fp. 758 // FIXME: pGetXXInstance always return an int or int64 regardless of rl_dest.fp.
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H A D | gen_invoke.cc | 124 LoadValueDirectFixed(arg0, TargetReg(arg0.fp ? kFArg0 : kArg0, arg0)); 126 LoadValueDirectWideFixed(arg0, TargetReg(arg0.fp ? kFArg0 : kArg0, kWide)); 224 RegStorage arg0_reg = TargetReg((arg0.fp) ? kFArg0 : kArg0, arg0); 227 if (arg1.fp == arg0.fp) { 228 arg1_reg = TargetReg((arg1.fp) ? kFArg1 : kArg1, arg1); 230 arg1_reg = TargetReg((arg1.fp) ? kFArg0 : kArg0, arg1); 247 LoadValueDirectFixed(arg0, TargetReg(arg0.fp ? kFArg0 : kArg0, kNotWide)); 250 LoadValueDirectFixed(arg1, TargetReg(arg1.fp ? kFArg2 : kArg1, kNotWide)); 256 LoadValueDirectWideFixed(arg1, TargetReg(arg1.fp [all...] |
H A D | gen_loadstore.cc | 44 if (rl_dest.fp) { 150 RegStorage new_reg = AllocTypedTemp(rl_src.fp, op_kind); 162 rl_src.reg = AllocTypedTemp(rl_src.fp, op_kind); 237 RegStorage new_regs = AllocTypedTempWide(rl_src.fp, op_kind); 250 rl_src.reg = AllocTypedTempWide(rl_src.fp, op_kind);
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H A D | mir_to_lir-inl.h | 271 inline void Mir2Lir::CheckRegStorage(RegStorage rs, WidenessCheck wide, RefCheck ref, FPCheck fp) 274 CheckRegStorageImpl(rs, wide, ref, fp, kFailOnSizeError, kReportSizeError);
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H A D | mir_to_lir.cc | 44 if (loc.fp) { 45 DCHECK(!loc.ref) << "At most, one of ref/fp may be set"; 125 // Assume that no ABI allows splitting a wide fp reg between a narrow fp reg and memory, 249 r_result = wide ? AllocTypedTempWide(rl_dest.fp, reg_class) 250 : AllocTypedTemp(rl_dest.fp, reg_class); 1274 void Mir2Lir::CheckRegStorageImpl(RegStorage rs, WidenessCheck wide, RefCheck ref, FPCheck fp, argument 1297 if (fp == FPCheck::kCheckFP && cu_->instruction_set != kArm) { 1300 CHECK(false) << "Reg storage not float for fp."; 1302 LOG(WARNING) << "Reg storage not float for fp [all...] |
H A D | mir_to_lir.h | 1662 void CheckRegStorageImpl(RegStorage rs, WidenessCheck wide, RefCheck ref, FPCheck fp, bool fail, 1674 void CheckRegStorage(RegStorage rs, WidenessCheck wide, RefCheck ref, FPCheck fp) const;
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H A D | ralloc_util.cc | 1085 RegStorage new_regs = AllocTypedTempWide(loc.fp, reg_class); 1100 loc.reg = AllocTypedTempWide(loc.fp, reg_class); 1126 RegStorage new_reg = AllocTypedTemp(loc.fp, reg_class); 1139 loc.reg = AllocTypedTemp(loc.fp, reg_class); 1154 RefCounts* counts = loc.fp ? fp_counts : core_counts; 1157 if (loc.fp) { 1225 * preference to fp doubles - which must be allocated sequential 1226 * physical single fp registers starting with an even-numbered 1272 // Promote fp regs 1318 int reg_num = curr->fp [all...] |
/art/compiler/dex/quick/x86/ |
H A D | fp_x86.cc | 78 DCHECK(rl_dest.fp); 80 DCHECK(rl_src1.fp); 82 DCHECK(rl_src2.fp); 327 DCHECK(rl_dest.fp);
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H A D | target_x86.cc | 769 // On x86, atomic 64-bit load/store requires an fp register. 770 // Smaller aligned load/store is atomic for both core and fp registers. 939 << (loc.fp ? " F" : " ") 2411 RegStorage reg = mapper->GetNextReg(arg_locs[in_position].fp, 2496 * being promoted to both core and fp regs. To account for this,
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H A D | utility_x86.cc | 1027 if ((loc.location == kLocPhysReg) && (loc.fp != loc.reg.IsFloat())) { 1041 if ((loc.location == kLocPhysReg) && (loc.fp != loc.reg.IsFloat())) {
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/art/compiler/dex/ |
H A D | reg_location.h | 47 unsigned fp:1; // Floating point? member in struct:art::RegLocation
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H A D | vreg_analysis.cc | 24 if (is_fp && !reg_location_[index].fp) { 25 reg_location_[index].fp = true; 34 if (!reg_location_[index].fp) { 35 reg_location_[index].fp = true; 346 bool defined_fp = rl_temp.defined && rl_temp.fp; 353 defined_fp |= rl_temp.defined && rl_temp.fp; 363 * (which relies on the distinction between core a fp usages). 369 << " has both fp and core/ref uses for same def."; 414 table[i].fp ? 'F' : table[i].ref ? 'R' :'C', 426 table[i].fp [all...] |
/art/compiler/utils/ |
H A D | assembler_thumb_test.cc | 196 FILE *fp = popen(cmd, "r"); local 197 ASSERT_TRUE(fp != nullptr); 204 while (!feof(fp)) { 206 char *s = fgets(testline, sizeof(testline), fp); 218 fclose(fp);
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/art/runtime/arch/mips/ |
H A D | quick_entrypoints_mips.S | 331 lw $fp, 120($a0) 484 addiu $sp, $sp, -16 # spill s0, s1, fp, ra 488 sw $fp, 8($sp) 494 move $fp, $sp # save sp in fp 506 lw $a0, 16($fp) # restore method* 513 move $sp, $fp # restore the stack 518 lw $fp, 8($sp)
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/art/runtime/hprof/ |
H A D | hprof.cc | 189 int StartNewRecord(FILE* fp, uint8_t tag, uint32_t time) { argument 195 fp_ = fp;
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/art/test/023-many-interfaces/ |
H A D | iface-gen.c | 13 FILE* fp; local 20 fp = fopen(nameBuf, "w"); 21 if (fp == NULL) { 26 fprintf(fp, "interface Interface%03d {\n", i); 28 fprintf(fp, " int func%03d();\n", i); 29 fprintf(fp, "}\n"); 30 fclose(fp); 33 fp = fopen("func-decl", "w"); 34 fprintf(fp, " implements\n"); 36 fprintf(fp, " Interfac [all...] |
/art/test/303-verification-stress/ |
H A D | classes-gen.c | 13 FILE* fp; local 21 fp = fopen(nameBuf, "w"); 22 if (fp == NULL) { 27 fprintf(fp, "public class Test%03d {\n", i); 28 fprintf(fp, " static String[] array = new String[%d];\n", array_size); 29 fprintf(fp, " static {\n", array_size); 31 fprintf(fp, " array[%d] = \"string_%04d\";\n", k, k); 33 fprintf(fp, " }\n", array_size); 34 fprintf(fp, "}\n"); 35 fclose(fp); [all...] |