Searched refs:reg_id (Results 1 - 12 of 12) sorted by relevance

/art/compiler/utils/arm64/
H A Dmanaged_register_arm64.h207 explicit Arm64ManagedRegister(int reg_id) : ManagedRegister(reg_id) {} argument
209 static Arm64ManagedRegister FromRegId(int reg_id) { argument
210 Arm64ManagedRegister reg(reg_id);
/art/compiler/utils/mips/
H A Dmanaged_register_mips.h207 explicit MipsManagedRegister(int reg_id) : ManagedRegister(reg_id) {} argument
209 static MipsManagedRegister FromRegId(int reg_id) { argument
210 MipsManagedRegister reg(reg_id);
/art/compiler/utils/x86/
H A Dmanaged_register_x86.h204 explicit X86ManagedRegister(int reg_id) : ManagedRegister(reg_id) {} argument
206 static X86ManagedRegister FromRegId(int reg_id) { argument
207 X86ManagedRegister reg(reg_id);
/art/compiler/utils/x86_64/
H A Dmanaged_register_x86_64.h190 explicit X86_64ManagedRegister(int reg_id) : ManagedRegister(reg_id) {} argument
192 static X86_64ManagedRegister FromRegId(int reg_id) { argument
193 X86_64ManagedRegister reg(reg_id);
/art/compiler/dex/quick/
H A Dlocal_optimizations.cc92 inline void Mir2Lir::EliminateLoad(LIR* lir, int reg_id) { argument
93 DCHECK(RegStorage::SameRegType(lir->operands[0], reg_id));
97 if (lir->operands[0] == reg_id) {
103 switch (reg_id & RegStorage::kShapeTypeMask) {
106 src_reg = RegStorage::Solo32(reg_id);
110 src_reg = RegStorage::Solo64(reg_id);
114 src_reg = RegStorage::FloatSolo32(reg_id);
118 src_reg = RegStorage::FloatSolo64(reg_id);
H A Dcodegen_util.cc171 void Mir2Lir::AnnotateDalvikRegAccess(LIR* lir, int reg_id, bool is_load, argument
180 lir->flags.alias_info = ENCODE_ALIAS_INFO(reg_id, is64bit);
H A Dmir_to_lir.h668 void AnnotateDalvikRegAccess(LIR* lir, int reg_id, bool is_load, bool is64bit);
672 void EliminateLoad(LIR* lir, int reg_id);
/art/compiler/utils/
H A Dmanaged_register.h74 explicit ManagedRegister(int reg_id) : id_(reg_id) { } argument
/art/compiler/utils/arm/
H A Dmanaged_register_arm.h253 explicit ArmManagedRegister(int reg_id) : ManagedRegister(reg_id) {} argument
255 static ArmManagedRegister FromRegId(int reg_id) { argument
256 ArmManagedRegister reg(reg_id);
/art/compiler/dex/quick/arm/
H A Dtarget_arm.cc303 int reg_id = i; local
305 reg_id = rs_rARM_LR.GetRegNum();
307 reg_id = rs_rARM_PC.GetRegNum();
310 snprintf(buf + strlen(buf), buf_size - strlen(buf), ", r%d", reg_id);
313 snprintf(buf, buf_size, "r%d", reg_id);
/art/compiler/dex/quick/x86/
H A Dint_x86.cc991 int reg_id = DECODE_ALIAS_INFO_REG(last_lir_insn_->flags.alias_info) - push_offset / 4u; local
992 AnnotateDalvikRegAccess(last_lir_insn_, reg_id, true, false);
998 int reg_id = DECODE_ALIAS_INFO_REG(last_lir_insn_->flags.alias_info) - push_offset / 4u; local
999 AnnotateDalvikRegAccess(last_lir_insn_, reg_id, true, false);
H A Dtarget_x86.cc1364 int reg_id = DECODE_ALIAS_INFO_REG(last_lir_insn_->flags.alias_info) - 1; local
1365 AnnotateDalvikRegAccess(last_lir_insn_, reg_id, true, false);

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