/art/runtime/arch/arm/ |
H A D | registers_arm.cc | 38 if (rhs >= S0 && rhs < kNumberOfSRegisters) {
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H A D | registers_arm.h | 57 S0 = 0, enumerator in enum:art::arm::SRegister
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H A D | quick_method_frame_info_arm.h | 36 (1 << art::arm::S0) | (1 << art::arm::S1) | (1 << art::arm::S2) | (1 << art::arm::S3) |
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/art/runtime/arch/arm64/ |
H A D | registers_arm64.cc | 66 if (rhs >= S0 && rhs < kNumberOfSRegisters) {
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H A D | registers_arm64.h | 154 S0 = 0, enumerator in enum:art::arm64::SRegister
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/art/compiler/utils/arm/ |
H A D | managed_register_arm_test.cc | 69 ArmManagedRegister reg = ArmManagedRegister::FromSRegister(S0); 76 EXPECT_EQ(S0, reg.AsSRegister()); 134 EXPECT_EQ(S0, reg.AsOverlappingDRegisterLow()); 136 EXPECT_TRUE(reg.Equals(ArmManagedRegister::FromSRegisterPair(S0))); 294 EXPECT_TRUE(!no_reg.Equals(ArmManagedRegister::FromSRegister(S0))); 302 EXPECT_TRUE(!reg_R0.Equals(ArmManagedRegister::FromSRegister(S0))); 310 EXPECT_TRUE(!reg_R1.Equals(ArmManagedRegister::FromSRegister(S0))); 320 EXPECT_TRUE(!reg_R8.Equals(ArmManagedRegister::FromSRegister(S0))); 326 ArmManagedRegister reg_S0 = ArmManagedRegister::FromSRegister(S0); 330 EXPECT_TRUE(reg_S0.Equals(ArmManagedRegister::FromSRegister(S0))); [all...] |
H A D | assembler_arm32.cc | 280 EmitVFPsss(cond, B23 | B21 | B20 | B6, sd, S0, sm); 297 sd, S0, S0); 392 EmitVFPsss(cond, B23 | B21 | B20 | B7 | B6, sd, S0, sm); 402 EmitVFPsss(cond, B23 | B21 | B20 | B16 | B6, sd, S0, sm); 412 EmitVFPsss(cond, B23 | B21 | B20 | B16 | B7 | B6, sd, S0, sm); 431 EmitVFPsss(cond, B23 | B21 | B20 | B19 | B18 | B16 | B7 | B6, sd, S0, sm); 441 EmitVFPsss(cond, B23 | B21 | B20 | B19 | B7 | B6, sd, S0, sm); 451 EmitVFPsss(cond, B23 | B21 | B20 | B19 | B18 | B7 | B6, sd, S0, sm); 461 EmitVFPsss(cond, B23 | B21 | B20 | B19 | B6, sd, S0, s [all...] |
H A D | assembler_thumb2.cc | 372 sd, S0, S0); 395 EmitVFPsss(cond, B23 | B21 | B20 | B6, sd, S0, sm); 477 EmitVFPsss(cond, B23 | B21 | B20 | B7 | B6, sd, S0, sm); 487 EmitVFPsss(cond, B23 | B21 | B20 | B16 | B6, sd, S0, sm); 497 EmitVFPsss(cond, B23 | B21 | B20 | B16 | B7 | B6, sd, S0, sm); 516 EmitVFPsss(cond, B23 | B21 | B20 | B19 | B18 | B16 | B7 | B6, sd, S0, sm); 526 EmitVFPsss(cond, B23 | B21 | B20 | B19 | B7 | B6, sd, S0, sm); 536 EmitVFPsss(cond, B23 | B21 | B20 | B19 | B18 | B7 | B6, sd, S0, sm); 546 EmitVFPsss(cond, B23 | B21 | B20 | B19 | B6, sd, S0, s [all...] |
H A D | assembler_arm.cc | 49 if (rhs >= S0 && rhs < kNumberOfSRegisters) {
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/art/compiler/utils/arm64/ |
H A D | managed_register_arm64_test.cc | 170 Arm64ManagedRegister sreg = Arm64ManagedRegister::FromSRegister(S0); 178 EXPECT_EQ(S0, reg.AsOverlappingDRegisterLow()); 220 Arm64ManagedRegister reg = Arm64ManagedRegister::FromSRegister(S0); 228 EXPECT_EQ(S0, reg.AsSRegister()); 230 EXPECT_TRUE(reg.Equals(Arm64ManagedRegister::FromSRegister(S0))); 277 EXPECT_TRUE(!no_reg.Equals(Arm64ManagedRegister::FromSRegister(S0))); 284 EXPECT_TRUE(!reg_X0.Equals(Arm64ManagedRegister::FromSRegister(S0))); 293 EXPECT_TRUE(!reg_X1.Equals(Arm64ManagedRegister::FromSRegister(S0))); 303 EXPECT_TRUE(!reg_X31.Equals(Arm64ManagedRegister::FromSRegister(S0))); 311 EXPECT_TRUE(!reg_SP.Equals(Arm64ManagedRegister::FromSRegister(S0))); [all...] |
/art/runtime/arch/mips/ |
H A D | quick_method_frame_info_mips.h | 33 (1 << art::mips::S0) | (1 << art::mips::S1);
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H A D | registers_mips.h | 46 S0 = 16, // Saved values. enumerator in enum:art::mips::Register
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/art/compiler/jni/quick/arm64/ |
H A D | calling_convention_arm64.cc | 37 S0, S1, S2, S3, S4, S5, S6, S7 51 return Arm64ManagedRegister::FromSRegister(S0); 108 int fp_reg_index = 0; // D0/S0.
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/art/compiler/utils/ |
H A D | assembler_thumb_test.cc | 1013 __ vadds(S0, S1, S2); 1014 __ vsubs(S0, S1, S2); 1015 __ vmuls(S0, S1, S2); 1016 __ vmlas(S0, S1, S2); 1017 __ vmlss(S0, S1, S2); 1018 __ vdivs(S0, S1, S2); 1019 __ vabss(S0, S1); 1020 __ vnegs(S0, S1); 1021 __ vsqrts(S0, S1); 1070 __ vcmps(S0, S [all...] |