| /external/valgrind/main/VEX/priv/ |
| H A D | host_ppc_defs.c | 3143 static UChar* mkFormD ( UChar* p, UInt opc1, argument
3147 vassert(opc1 < 0x40);
3151 theInstr = ((opc1<<26) | (r1<<21) | (r2<<16) | (imm));
3155 static UChar* mkFormMD ( UChar* p, UInt opc1, UInt r1, UInt r2, argument
3159 vassert(opc1 < 0x40);
3166 theInstr = ((opc1<<26) | (r1<<21) | (r2<<16) |
3172 static UChar* mkFormX ( UChar* p, UInt opc1, UInt r1, UInt r2, argument
3176 vassert(opc1 < 0x40);
3182 theInstr = ((opc1<<26) | (r1<<21) | (r2<<16) |
3187 static UChar* mkFormXO ( UChar* p, UInt opc1, UIn argument
3203 mkFormXL( UChar* p, UInt opc1, UInt f1, UInt f2, UInt f3, UInt opc2, UInt b0 ) argument
3253 mkFormXS( UChar* p, UInt opc1, UInt r1, UInt r2, UInt imm, UInt opc2, UInt b0 ) argument
3298 mkFormM( UChar* p, UInt opc1, UInt r1, UInt r2, UInt f3, UInt MB, UInt ME, UInt Rc ) argument
3314 mkFormA( UChar* p, UInt opc1, UInt r1, UInt r2, UInt r3, UInt r4, UInt opc2, UInt b0 ) argument
3330 mkFormZ22( UChar* p, UInt opc1, UInt r1, UInt r2, UInt constant, UInt opc2, UInt b0 ) argument
3345 mkFormZ23( UChar* p, UInt opc1, UInt r1, UInt r2, UInt r3, UInt rmc, UInt opc2, UInt b0 ) argument
3361 doAMode_IR( UChar* p, UInt opc1, UInt rSD, PPCAMode* am, Bool mode64 ) argument
3381 doAMode_RR( UChar* p, UInt opc1, UInt opc2, UInt rSD, PPCAMode* am, Bool mode64 ) argument
3568 UInt opc1, sz = mode64 ? 8 : 4; local
3589 UInt opc1, sz = mode64 ? 8 : 4; local
3620 UInt opc1; local
3637 UInt opc1; local
3670 mkFormVX( UChar* p, UInt opc1, UInt r1, UInt r2, UInt r3, UInt opc2 ) argument
3683 mkFormVXR( UChar* p, UInt opc1, UInt r1, UInt r2, UInt r3, UInt Rc, UInt opc2 ) argument
3698 mkFormVA( UChar* p, UInt opc1, UInt r1, UInt r2, UInt r3, UInt r4, UInt opc2 ) argument
4354 UInt opc1, opc2, sz = i->Pin.Load.sz; local
4444 UInt opc1, opc2, sz = i->Pin.Store.sz; local
[all...] |
| H A D | guest_ppc_toIR.c | 3211 UChar opc1 = ifieldOPC(theInstr); local
3231 switch (opc1) {
3828 vex_printf("dis_int_arith(ppc)(opc1)\n");
3848 UChar opc1 = ifieldOPC(theInstr); local
3872 switch (opc1) {
3954 vex_printf("dis_int_cmp(ppc)(opc1)\n");
3968 UChar opc1 = ifieldOPC(theInstr); local
3986 switch (opc1) {
4328 vex_printf("dis_int_logic(ppc)(opc1)\n");
4346 UChar opc1 local
4475 UChar opc1 = ifieldOPC(theInstr); local
4725 UChar opc1 = ifieldOPC(theInstr); local
5016 UChar opc1 = ifieldOPC(theInstr); local
5234 UChar opc1 = ifieldOPC(theInstr); local
5377 UChar opc1 = ifieldOPC(theInstr); local
5548 UChar opc1 = ifieldOPC(theInstr); local
5758 UChar opc1 = ifieldOPC(theInstr); local
5943 UChar opc1 = ifieldOPC(theInstr); local
6091 UChar opc1 = ifieldOPC(theInstr); local
6377 UChar opc1 = ifieldOPC(theInstr); local
6643 UChar opc1 = ifieldOPC(theInstr); local
6737 UChar opc1 = ifieldOPC(theInstr); local
7141 UChar opc1 = ifieldOPC(theInstr); local
7439 UChar opc1 = ifieldOPC(theInstr); local
7577 UChar opc1 = ifieldOPC(theInstr); local
7708 UChar opc1 = ifieldOPC(theInstr); local
7946 UChar opc1 = ifieldOPC(theInstr); local
8425 UChar opc1 = ifieldOPC(theInstr); local
8493 UChar opc1 = ifieldOPC(theInstr); local
8592 UChar opc1 = ifieldOPC(theInstr); local
8805 UChar opc1 = ifieldOPC(theInstr); local
8941 UChar opc1 = ifieldOPC(theInstr); local
9042 UChar opc1 = ifieldOPC(theInstr); local
10555 UInt opc1 = ifieldOPC( theInstr ); local
10633 UInt opc1 = ifieldOPC( theInstr ); local
10823 UInt opc1 = ifieldOPC( theInstr ); local
11933 UInt opc1 = ifieldOPC( theInstr ); local
12129 UChar opc1 = ifieldOPC(theInstr); local
12180 UChar opc1 = ifieldOPC(theInstr); local
12226 UChar opc1 = ifieldOPC( theInstr ); local
12724 UChar opc1 = ifieldOPC( theInstr ); local
12967 UChar opc1 = ifieldOPC( theInstr ); local
13294 UChar opc1 = ifieldOPC( theInstr ); local
13757 UChar opc1 = ifieldOPC( theInstr ); local
14224 UChar opc1 = ifieldOPC( theInstr ); local
14553 UChar opc1 = ifieldOPC( theInstr ); local
14677 UChar opc1 = ifieldOPC( theInstr ); local
14773 UChar opc1 = ifieldOPC( theInstr ); local
14983 UChar opc1 = ifieldOPC( theInstr ); local
15054 UChar opc1 = ifieldOPC( theInstr ); local
15180 UChar opc1 = ifieldOPC( theInstr ); local
15287 UChar opc1 = ifieldOPC( theInstr ); local
15407 UChar opc1 = ifieldOPC(theInstr); local
15539 UChar opc1 = ifieldOPC(theInstr); local
15625 UChar opc1 = ifieldOPC(theInstr); local
16132 UChar opc1 = ifieldOPC(theInstr); local
16210 UChar opc1 = ifieldOPC(theInstr); local
16320 UChar opc1 = ifieldOPC(theInstr); local
16586 UChar opc1 = ifieldOPC(theInstr); local
16640 UChar opc1 = ifieldOPC(theInstr); local
16798 UChar opc1 = ifieldOPC(theInstr); local
17019 UChar opc1 = ifieldOPC(theInstr); local
17339 UChar opc1 = ifieldOPC(theInstr); local
17400 UChar opc1 = ifieldOPC(theInstr); local
17523 UChar opc1 = ifieldOPC(theInstr); local
17725 UChar opc1 = ifieldOPC(theInstr); local
17771 UChar opc1 = ifieldOPC(theInstr); local
17888 UChar opc1 = ifieldOPC(theInstr); local
17982 UChar opc1 = ifieldOPC(theInstr); local
18492 UChar opc1; local
[all...] |
| H A D | host_mips_defs.c | 2486 static UChar *mkFormS(UChar * p, UInt opc1, UInt rRD, UInt rRS, UInt rRT, argument
2490 vassert(opc1 <= 0x3F);
2497 theInstr = ((opc1 << 26) | (rRS << 21) | (rRT << 16) | (rRD << 11) |
2503 static UChar *doAMode_IR(UChar * p, UInt opc1, UInt rSD, MIPSAMode * am, argument
2518 if (opc1 < 40) {
2528 p = mkFormI(p, opc1, rA, r_dst, idx);
2530 if (opc1 >= 40) {
2543 static UChar *doAMode_RR(UChar * p, UInt opc1, UInt rSD, MIPSAMode * am, argument
2557 if (opc1 < 40) {
2572 p = mkFormI(p, opc1, r
[all...] |
| H A D | host_arm_defs.c | 3853 UInt opc, opc1, opc2; local
3906 opc1 = (opc >> 2) & 3;
3908 insn = XXXXXXXX(0xE, X1110, BITS4(0,(opc1 >> 1),(opc1 & 1),0),
3947 opc1 = (opc >> 2) & 3;
3949 insn = XXXXXXXX(0xE, X1110, BITS4(1,(opc1 >> 1),(opc1 & 1),1),
3995 opc1 = (opc >> 2) & 3;
3997 insn = XXXXXXXX(0xE, X1110, BITS4(0,(opc1 >> 1),(opc1
[all...] |
| H A D | guest_mips_toIR.c | 2065 UChar opc1 = get_opcode(theInstr); local
2093 switch (opc1) {
2176 UChar opc1 = get_opcode(theInstr); local
2191 switch(opc1){
2293 } /* opc1 0x1C ends here*/
2359 } /* opc1 = 0x1F & opc2 = 0xA (LX) ends here*/
2361 } /* opc1 = 0x1F ends here*/
2364 } /* main opc1 switch ends here */
11825 /* We don't know what it is. Set opc1/opc2 so decode_failure
|
| /external/chromium_org/sandbox/win/src/ |
| H A D | policy_low_level_unittest.cc | 394 size_t opc1 = pr_pipe.GetOpcodeCount(); local
395 EXPECT_EQ(3, opc1);
459 ++opc1;
470 EXPECT_EQ((opc1 + opc2 + opc3), tc2);
471 EXPECT_EQ((opc1 + opc4), tc3);
|
| /external/qemu/target-arm/ |
| H A D | cpu.h | 466 * Crn, Crm, opc1, opc2 fields
469 * We allow 4 bits for opc1 because MRRC/MCRR have a 4 bit field.
472 #define ENCODE_CP_REG(cp, is64, crn, crm, opc1, opc2) \
474 ((crm) << 7) | ((opc1) << 3) | (opc2))
510 * same (cp, is64, crn, crm, opc1, opc2) tuple: either the new or the
603 /* Location of register: coprocessor number and (crn,crm,opc1,opc2)
604 * tuple. Any of crm, opc1 and opc2 may be CP_ANY to indicate a
607 * callbacks will be passed an ARMCPRegInfo with the crn/crm/opc1/opc2
610 * For 64 bit registers, only crm and opc1 are relevant; crn and opc2
616 uint8_t opc1; member in struct:ARMCPRegInfo
[all...] |
| /external/llvm/lib/Target/ARM/Disassembler/ |
| H A D | ARMDisassembler.cpp | 4971 unsigned opc1 = fieldFromInstruction(Val, 4, 4); local
4983 Inst.addOperand(MCOperand::CreateImm(opc1));
|