102031b185b4653e6c72e21f7a51238b903f6d638buzbee/* 202031b185b4653e6c72e21f7a51238b903f6d638buzbee * Copyright (C) 2011 The Android Open Source Project 302031b185b4653e6c72e21f7a51238b903f6d638buzbee * 402031b185b4653e6c72e21f7a51238b903f6d638buzbee * Licensed under the Apache License, Version 2.0 (the "License"); 502031b185b4653e6c72e21f7a51238b903f6d638buzbee * you may not use this file except in compliance with the License. 602031b185b4653e6c72e21f7a51238b903f6d638buzbee * You may obtain a copy of the License at 702031b185b4653e6c72e21f7a51238b903f6d638buzbee * 802031b185b4653e6c72e21f7a51238b903f6d638buzbee * http://www.apache.org/licenses/LICENSE-2.0 902031b185b4653e6c72e21f7a51238b903f6d638buzbee * 1002031b185b4653e6c72e21f7a51238b903f6d638buzbee * Unless required by applicable law or agreed to in writing, software 1102031b185b4653e6c72e21f7a51238b903f6d638buzbee * distributed under the License is distributed on an "AS IS" BASIS, 1202031b185b4653e6c72e21f7a51238b903f6d638buzbee * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 1302031b185b4653e6c72e21f7a51238b903f6d638buzbee * See the License for the specific language governing permissions and 1402031b185b4653e6c72e21f7a51238b903f6d638buzbee * limitations under the License. 1502031b185b4653e6c72e21f7a51238b903f6d638buzbee */ 1602031b185b4653e6c72e21f7a51238b903f6d638buzbee 17fc0e3219edc9a5bf81b166e82fd5db2796eb6a0dBrian Carlstrom#ifndef ART_COMPILER_DEX_QUICK_ARM_CODEGEN_ARM_H_ 18fc0e3219edc9a5bf81b166e82fd5db2796eb6a0dBrian Carlstrom#define ART_COMPILER_DEX_QUICK_ARM_CODEGEN_ARM_H_ 1902031b185b4653e6c72e21f7a51238b903f6d638buzbee 20107c31e598b649a8bb8d959d6a0377937e63e624Ian Rogers#include "arm_lir.h" 217940e44f4517de5e2634a7e07d58d0fb26160513Brian Carlstrom#include "dex/compiler_internals.h" 2202031b185b4653e6c72e21f7a51238b903f6d638buzbee 2302031b185b4653e6c72e21f7a51238b903f6d638buzbeenamespace art { 2402031b185b4653e6c72e21f7a51238b903f6d638buzbee 25e2143c0a4af68c08e811885eb2f3ea5bfdb21ab6Ian Rogersclass ArmMir2Lir FINAL : public Mir2Lir { 2602031b185b4653e6c72e21f7a51238b903f6d638buzbee public: 27862a76027076c341c26aa6cd4a30a7cdd6dc2143buzbee ArmMir2Lir(CompilationUnit* cu, MIRGraph* mir_graph, ArenaAllocator* arena); 281fd3346740dfb7f47be9922312b68a4227fada96buzbee 2902031b185b4653e6c72e21f7a51238b903f6d638buzbee // Required for target - codegen helpers. 3011b63d13f0a3be0f74390b66b58614a37f9aa6c1buzbee bool SmallLiteralDivRem(Instruction::Code dalvik_opcode, bool is_div, RegLocation rl_src, 312700f7e1edbcd2518f4978e4cd0e05a4149f91b6buzbee RegLocation rl_dest, int lit); 32e2143c0a4af68c08e811885eb2f3ea5bfdb21ab6Ian Rogers bool EasyMultiply(RegLocation rl_src, RegLocation rl_dest, int lit) OVERRIDE; 33b373e091eac39b1a79c11f2dcbd610af01e9e8a9Dave Allison LIR* CheckSuspendUsingLoad() OVERRIDE; 34984305917bf57b3f8d92965e4715a0370cc5bcfbAndreas Gampe RegStorage LoadHelper(QuickEntrypointEnum trampoline) OVERRIDE; 353bf7c60a86d49bf8c05c5d2ac5ca8e9f80bd9824Vladimir Marko LIR* LoadBaseDisp(RegStorage r_base, int displacement, RegStorage r_dest, 363c12c512faf6837844d5465b23b9410889e5eb11Andreas Gampe OpSize size, VolatileKind is_volatile) OVERRIDE; 372700f7e1edbcd2518f4978e4cd0e05a4149f91b6buzbee LIR* LoadBaseIndexed(RegStorage r_base, RegStorage r_index, RegStorage r_dest, int scale, 383bf7c60a86d49bf8c05c5d2ac5ca8e9f80bd9824Vladimir Marko OpSize size) OVERRIDE; 392700f7e1edbcd2518f4978e4cd0e05a4149f91b6buzbee LIR* LoadConstantNoClobber(RegStorage r_dest, int value); 402700f7e1edbcd2518f4978e4cd0e05a4149f91b6buzbee LIR* LoadConstantWide(RegStorage r_dest, int64_t value); 413bf7c60a86d49bf8c05c5d2ac5ca8e9f80bd9824Vladimir Marko LIR* StoreBaseDisp(RegStorage r_base, int displacement, RegStorage r_src, 423c12c512faf6837844d5465b23b9410889e5eb11Andreas Gampe OpSize size, VolatileKind is_volatile) OVERRIDE; 432700f7e1edbcd2518f4978e4cd0e05a4149f91b6buzbee LIR* StoreBaseIndexed(RegStorage r_base, RegStorage r_index, RegStorage r_src, int scale, 443bf7c60a86d49bf8c05c5d2ac5ca8e9f80bd9824Vladimir Marko OpSize size) OVERRIDE; 452700f7e1edbcd2518f4978e4cd0e05a4149f91b6buzbee void MarkGCCard(RegStorage val_reg, RegStorage tgt_addr_reg); 4602031b185b4653e6c72e21f7a51238b903f6d638buzbee 4702031b185b4653e6c72e21f7a51238b903f6d638buzbee // Required for target - register utilities. 482700f7e1edbcd2518f4978e4cd0e05a4149f91b6buzbee RegStorage TargetReg(SpecialTargetRegister reg); 492700f7e1edbcd2518f4978e4cd0e05a4149f91b6buzbee RegStorage GetArgMappingToPhysicalReg(int arg_num); 508d3a117b374352a1853fae9b7306afeaaa9e3b91Ian Rogers RegLocation GetReturnAlt(); 518d3a117b374352a1853fae9b7306afeaaa9e3b91Ian Rogers RegLocation GetReturnWideAlt(); 528d3a117b374352a1853fae9b7306afeaaa9e3b91Ian Rogers RegLocation LocCReturn(); 53a0cd2d701f29e0bc6275f1b13c0edfd4ec391879buzbee RegLocation LocCReturnRef(); 548d3a117b374352a1853fae9b7306afeaaa9e3b91Ian Rogers RegLocation LocCReturnDouble(); 558d3a117b374352a1853fae9b7306afeaaa9e3b91Ian Rogers RegLocation LocCReturnFloat(); 568d3a117b374352a1853fae9b7306afeaaa9e3b91Ian Rogers RegLocation LocCReturnWide(); 578dea81ca9c0201ceaa88086b927a5838a06a3e69Vladimir Marko ResourceMask GetRegMaskCommon(const RegStorage& reg) const OVERRIDE; 588d3a117b374352a1853fae9b7306afeaaa9e3b91Ian Rogers void AdjustSpillMask(); 5931c2aac7137b69d5622eea09597500731fbee2efVladimir Marko void ClobberCallerSave(); 608d3a117b374352a1853fae9b7306afeaaa9e3b91Ian Rogers void FreeCallTemps(); 618d3a117b374352a1853fae9b7306afeaaa9e3b91Ian Rogers void LockCallTemps(); 62091cc408e9dc87e60fb64c61e186bea568fc3d3abuzbee void MarkPreservedSingle(int v_reg, RegStorage reg); 63091cc408e9dc87e60fb64c61e186bea568fc3d3abuzbee void MarkPreservedDouble(int v_reg, RegStorage reg); 648d3a117b374352a1853fae9b7306afeaaa9e3b91Ian Rogers void CompilerInitializeRegAlloc(); 6502031b185b4653e6c72e21f7a51238b903f6d638buzbee 6602031b185b4653e6c72e21f7a51238b903f6d638buzbee // Required for target - miscellaneous. 67b48819db07f9a0992a72173380c24249d7fc648abuzbee void AssembleLIR(); 68306f017dd883c0bf806d239d97e0bca3194afbd7Vladimir Marko uint32_t LinkFixupInsns(LIR* head_lir, LIR* tail_lir, CodeOffset offset); 69b48819db07f9a0992a72173380c24249d7fc648abuzbee int AssignInsnOffsets(); 70b48819db07f9a0992a72173380c24249d7fc648abuzbee void AssignOffsets(); 71306f017dd883c0bf806d239d97e0bca3194afbd7Vladimir Marko static uint8_t* EncodeLIRs(uint8_t* write_pos, LIR* lir); 728dea81ca9c0201ceaa88086b927a5838a06a3e69Vladimir Marko void DumpResourceMask(LIR* lir, const ResourceMask& mask, const char* prefix) OVERRIDE; 738dea81ca9c0201ceaa88086b927a5838a06a3e69Vladimir Marko void SetupTargetResourceMasks(LIR* lir, uint64_t flags, 748dea81ca9c0201ceaa88086b927a5838a06a3e69Vladimir Marko ResourceMask* use_mask, ResourceMask* def_mask) OVERRIDE; 758d3a117b374352a1853fae9b7306afeaaa9e3b91Ian Rogers const char* GetTargetInstFmt(int opcode); 768d3a117b374352a1853fae9b7306afeaaa9e3b91Ian Rogers const char* GetTargetInstName(int opcode); 778d3a117b374352a1853fae9b7306afeaaa9e3b91Ian Rogers std::string BuildInsnString(const char* fmt, LIR* lir, unsigned char* base_addr); 788dea81ca9c0201ceaa88086b927a5838a06a3e69Vladimir Marko ResourceMask GetPCUseDefEncoding() const OVERRIDE; 798d3a117b374352a1853fae9b7306afeaaa9e3b91Ian Rogers uint64_t GetTargetInstFlags(int opcode); 805aa6e04061ced68cca8111af1e9c19781b8a9c5dIan Rogers size_t GetInsnSize(LIR* lir) OVERRIDE; 818d3a117b374352a1853fae9b7306afeaaa9e3b91Ian Rogers bool IsUnconditionalBranch(LIR* lir); 8202031b185b4653e6c72e21f7a51238b903f6d638buzbee 83674744e635ddbdfb311fbd25b5a27356560d30c3Vladimir Marko // Get the register class for load/store of a field. 84674744e635ddbdfb311fbd25b5a27356560d30c3Vladimir Marko RegisterClass RegClassForFieldLoadStore(OpSize size, bool is_volatile) OVERRIDE; 85674744e635ddbdfb311fbd25b5a27356560d30c3Vladimir Marko 8602031b185b4653e6c72e21f7a51238b903f6d638buzbee // Required for target - Dalvik-level generators. 87c76c614d681d187d815760eb909e5faf488a3c35Andreas Gampe void GenArithOpLong(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1, 88c76c614d681d187d815760eb909e5faf488a3c35Andreas Gampe RegLocation rl_src2) OVERRIDE; 898d3a117b374352a1853fae9b7306afeaaa9e3b91Ian Rogers void GenArithImmOpLong(Instruction::Code opcode, RegLocation rl_dest, 908d3a117b374352a1853fae9b7306afeaaa9e3b91Ian Rogers RegLocation rl_src1, RegLocation rl_src2); 918d3a117b374352a1853fae9b7306afeaaa9e3b91Ian Rogers void GenArrayGet(int opt_flags, OpSize size, RegLocation rl_array, 928d3a117b374352a1853fae9b7306afeaaa9e3b91Ian Rogers RegLocation rl_index, RegLocation rl_dest, int scale); 93a9a8254c920ce8e22210abfc16c9842ce0aea28fIan Rogers void GenArrayPut(int opt_flags, OpSize size, RegLocation rl_array, RegLocation rl_index, 94a9a8254c920ce8e22210abfc16c9842ce0aea28fIan Rogers RegLocation rl_src, int scale, bool card_mark); 958d3a117b374352a1853fae9b7306afeaaa9e3b91Ian Rogers void GenShiftImmOpLong(Instruction::Code opcode, RegLocation rl_dest, 968d3a117b374352a1853fae9b7306afeaaa9e3b91Ian Rogers RegLocation rl_src1, RegLocation rl_shift); 972700f7e1edbcd2518f4978e4cd0e05a4149f91b6buzbee void GenArithOpDouble(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1, 982700f7e1edbcd2518f4978e4cd0e05a4149f91b6buzbee RegLocation rl_src2); 992700f7e1edbcd2518f4978e4cd0e05a4149f91b6buzbee void GenArithOpFloat(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1, 1002700f7e1edbcd2518f4978e4cd0e05a4149f91b6buzbee RegLocation rl_src2); 1018d3a117b374352a1853fae9b7306afeaaa9e3b91Ian Rogers void GenCmpFP(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1, 1028d3a117b374352a1853fae9b7306afeaaa9e3b91Ian Rogers RegLocation rl_src2); 1038d3a117b374352a1853fae9b7306afeaaa9e3b91Ian Rogers void GenConversion(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src); 1045030d3ee8c6fe10394912ede107cbc8df63b7b16Vladimir Marko bool GenInlinedAbsFloat(CallInfo* info) OVERRIDE; 1055030d3ee8c6fe10394912ede107cbc8df63b7b16Vladimir Marko bool GenInlinedAbsDouble(CallInfo* info) OVERRIDE; 1061c282e2b9a9b432e132b2c332f861cad9feb4a73Vladimir Marko bool GenInlinedCas(CallInfo* info, bool is_long, bool is_object); 10723abec955e2e733999a1e2c30e4e384e46e5dde4Serban Constantinescu bool GenInlinedMinMax(CallInfo* info, bool is_min, bool is_long); 1088d3a117b374352a1853fae9b7306afeaaa9e3b91Ian Rogers bool GenInlinedSqrt(CallInfo* info); 109e508a2090b19fe705fbc6b99d76474037a74bbfbVladimir Marko bool GenInlinedPeek(CallInfo* info, OpSize size); 110e508a2090b19fe705fbc6b99d76474037a74bbfbVladimir Marko bool GenInlinedPoke(CallInfo* info, OpSize size); 111fa9c8ec37c66574654e448513e1bb59af7cb9365Zheng Xu bool GenInlinedArrayCopyCharArray(CallInfo* info) OVERRIDE; 1122700f7e1edbcd2518f4978e4cd0e05a4149f91b6buzbee RegLocation GenDivRem(RegLocation rl_dest, RegStorage reg_lo, RegStorage reg_hi, bool is_div); 1132700f7e1edbcd2518f4978e4cd0e05a4149f91b6buzbee RegLocation GenDivRemLit(RegLocation rl_dest, RegStorage reg_lo, int lit, bool is_div); 1148d3a117b374352a1853fae9b7306afeaaa9e3b91Ian Rogers void GenCmpLong(RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2); 115e643a179cf5585ba6bafdd4fa51730d9f50c06f6Mingyao Yang void GenDivZeroCheckWide(RegStorage reg); 1168d3a117b374352a1853fae9b7306afeaaa9e3b91Ian Rogers void GenEntrySequence(RegLocation* ArgLocs, RegLocation rl_method); 1178d3a117b374352a1853fae9b7306afeaaa9e3b91Ian Rogers void GenExitSequence(); 1183bc01748ef1c3e43361bdf520947a9d656658bf8Razvan A Lupusoru void GenSpecialExitSequence(); 1190d82948094d9a198e01aa95f64012bdedd5b6fc9buzbee void GenFillArrayData(DexOffset table_offset, RegLocation rl_src); 1208d3a117b374352a1853fae9b7306afeaaa9e3b91Ian Rogers void GenFusedFPCmpBranch(BasicBlock* bb, MIR* mir, bool gt_bias, bool is_double); 1218d3a117b374352a1853fae9b7306afeaaa9e3b91Ian Rogers void GenFusedLongCmpBranch(BasicBlock* bb, MIR* mir); 1228d3a117b374352a1853fae9b7306afeaaa9e3b91Ian Rogers void GenSelect(BasicBlock* bb, MIR* mir); 12390969af6deb19b1dbe356d62fe68d8f5698d3d8fAndreas Gampe void GenSelectConst32(RegStorage left_op, RegStorage right_op, ConditionCode code, 12490969af6deb19b1dbe356d62fe68d8f5698d3d8fAndreas Gampe int32_t true_val, int32_t false_val, RegStorage rs_dest, 12590969af6deb19b1dbe356d62fe68d8f5698d3d8fAndreas Gampe int dest_reg_class) OVERRIDE; 126b14329f90f725af0f67c45dfcb94933a426d63ceAndreas Gampe bool GenMemBarrier(MemBarrierKind barrier_kind); 1278d3a117b374352a1853fae9b7306afeaaa9e3b91Ian Rogers void GenMonitorEnter(int opt_flags, RegLocation rl_src); 1288d3a117b374352a1853fae9b7306afeaaa9e3b91Ian Rogers void GenMonitorExit(int opt_flags, RegLocation rl_src); 1298d3a117b374352a1853fae9b7306afeaaa9e3b91Ian Rogers void GenMoveException(RegLocation rl_dest); 1308d3a117b374352a1853fae9b7306afeaaa9e3b91Ian Rogers void GenMultiplyByTwoBitMultiplier(RegLocation rl_src, RegLocation rl_result, int lit, 1312700f7e1edbcd2518f4978e4cd0e05a4149f91b6buzbee int first_bit, int second_bit); 1328d3a117b374352a1853fae9b7306afeaaa9e3b91Ian Rogers void GenNegDouble(RegLocation rl_dest, RegLocation rl_src); 1338d3a117b374352a1853fae9b7306afeaaa9e3b91Ian Rogers void GenNegFloat(RegLocation rl_dest, RegLocation rl_src); 1348c18c2aaedb171f9b03ec49c94b0e33449dc411bAndreas Gampe void GenLargePackedSwitch(MIR* mir, DexOffset table_offset, RegLocation rl_src); 1358c18c2aaedb171f9b03ec49c94b0e33449dc411bAndreas Gampe void GenLargeSparseSwitch(MIR* mir, DexOffset table_offset, RegLocation rl_src); 13602031b185b4653e6c72e21f7a51238b903f6d638buzbee 13702031b185b4653e6c72e21f7a51238b903f6d638buzbee // Required for target - single operation generators. 1388d3a117b374352a1853fae9b7306afeaaa9e3b91Ian Rogers LIR* OpUnconditionalBranch(LIR* target); 1392700f7e1edbcd2518f4978e4cd0e05a4149f91b6buzbee LIR* OpCmpBranch(ConditionCode cond, RegStorage src1, RegStorage src2, LIR* target); 1402700f7e1edbcd2518f4978e4cd0e05a4149f91b6buzbee LIR* OpCmpImmBranch(ConditionCode cond, RegStorage reg, int check_value, LIR* target); 1418d3a117b374352a1853fae9b7306afeaaa9e3b91Ian Rogers LIR* OpCondBranch(ConditionCode cc, LIR* target); 1422700f7e1edbcd2518f4978e4cd0e05a4149f91b6buzbee LIR* OpDecAndBranch(ConditionCode c_code, RegStorage reg, LIR* target); 1432700f7e1edbcd2518f4978e4cd0e05a4149f91b6buzbee LIR* OpFpRegCopy(RegStorage r_dest, RegStorage r_src); 1448d3a117b374352a1853fae9b7306afeaaa9e3b91Ian Rogers LIR* OpIT(ConditionCode cond, const char* guide); 145b14329f90f725af0f67c45dfcb94933a426d63ceAndreas Gampe void UpdateIT(LIR* it, const char* new_guide); 1463da67a558f1fd3d8a157d8044d521753f3f99ac8Dave Allison void OpEndIT(LIR* it); 1472700f7e1edbcd2518f4978e4cd0e05a4149f91b6buzbee LIR* OpMem(OpKind op, RegStorage r_base, int disp); 1482700f7e1edbcd2518f4978e4cd0e05a4149f91b6buzbee LIR* OpPcRelLoad(RegStorage reg, LIR* target); 1492700f7e1edbcd2518f4978e4cd0e05a4149f91b6buzbee LIR* OpReg(OpKind op, RegStorage r_dest_src); 1507a11ab09f93f54b1c07c0bf38dd65ed322e86bc6buzbee void OpRegCopy(RegStorage r_dest, RegStorage r_src); 1512700f7e1edbcd2518f4978e4cd0e05a4149f91b6buzbee LIR* OpRegCopyNoInsert(RegStorage r_dest, RegStorage r_src); 1522700f7e1edbcd2518f4978e4cd0e05a4149f91b6buzbee LIR* OpRegImm(OpKind op, RegStorage r_dest_src1, int value); 1532700f7e1edbcd2518f4978e4cd0e05a4149f91b6buzbee LIR* OpRegReg(OpKind op, RegStorage r_dest_src1, RegStorage r_src2); 1542700f7e1edbcd2518f4978e4cd0e05a4149f91b6buzbee LIR* OpMovRegMem(RegStorage r_dest, RegStorage r_base, int offset, MoveType move_type); 1552700f7e1edbcd2518f4978e4cd0e05a4149f91b6buzbee LIR* OpMovMemReg(RegStorage r_base, int offset, RegStorage r_src, MoveType move_type); 1562700f7e1edbcd2518f4978e4cd0e05a4149f91b6buzbee LIR* OpCondRegReg(OpKind op, ConditionCode cc, RegStorage r_dest, RegStorage r_src); 1572700f7e1edbcd2518f4978e4cd0e05a4149f91b6buzbee LIR* OpRegRegImm(OpKind op, RegStorage r_dest, RegStorage r_src1, int value); 1582700f7e1edbcd2518f4978e4cd0e05a4149f91b6buzbee LIR* OpRegRegReg(OpKind op, RegStorage r_dest, RegStorage r_src1, RegStorage r_src2); 1598d3a117b374352a1853fae9b7306afeaaa9e3b91Ian Rogers LIR* OpTestSuspend(LIR* target); 1602700f7e1edbcd2518f4978e4cd0e05a4149f91b6buzbee LIR* OpVldm(RegStorage r_base, int count); 1612700f7e1edbcd2518f4978e4cd0e05a4149f91b6buzbee LIR* OpVstm(RegStorage r_base, int count); 1622700f7e1edbcd2518f4978e4cd0e05a4149f91b6buzbee void OpRegCopyWide(RegStorage dest, RegStorage src); 16302031b185b4653e6c72e21f7a51238b903f6d638buzbee 1643bf7c60a86d49bf8c05c5d2ac5ca8e9f80bd9824Vladimir Marko LIR* LoadBaseDispBody(RegStorage r_base, int displacement, RegStorage r_dest, OpSize size); 1652700f7e1edbcd2518f4978e4cd0e05a4149f91b6buzbee LIR* StoreBaseDispBody(RegStorage r_base, int displacement, RegStorage r_src, OpSize size); 166e2143c0a4af68c08e811885eb2f3ea5bfdb21ab6Ian Rogers LIR* OpRegRegRegShift(OpKind op, RegStorage r_dest, RegStorage r_src1, RegStorage r_src2, 167e2143c0a4af68c08e811885eb2f3ea5bfdb21ab6Ian Rogers int shift); 168e2143c0a4af68c08e811885eb2f3ea5bfdb21ab6Ian Rogers LIR* OpRegRegShift(OpKind op, RegStorage r_dest_src1, RegStorage r_src2, int shift); 16902031b185b4653e6c72e21f7a51238b903f6d638buzbee static const ArmEncodingMap EncodingMap[kArmLast]; 1701fd3346740dfb7f47be9922312b68a4227fada96buzbee int EncodeShift(int code, int amount); 1711fd3346740dfb7f47be9922312b68a4227fada96buzbee int ModifiedImmediate(uint32_t value); 1721fd3346740dfb7f47be9922312b68a4227fada96buzbee ArmConditionCode ArmConditionEncoding(ConditionCode code); 1734ef3e45d7c6ec3c482a1a48f4df470811aa3cf0abuzbee bool InexpensiveConstantInt(int32_t value); 1744ef3e45d7c6ec3c482a1a48f4df470811aa3cf0abuzbee bool InexpensiveConstantFloat(int32_t value); 1754ef3e45d7c6ec3c482a1a48f4df470811aa3cf0abuzbee bool InexpensiveConstantLong(int64_t value); 1764ef3e45d7c6ec3c482a1a48f4df470811aa3cf0abuzbee bool InexpensiveConstantDouble(int64_t value); 177b5860fb459f1ed71f39d8a87b45bee6727d79fe8buzbee RegStorage AllocPreservedDouble(int s_reg); 178b5860fb459f1ed71f39d8a87b45bee6727d79fe8buzbee RegStorage AllocPreservedSingle(int s_reg); 1794ef3e45d7c6ec3c482a1a48f4df470811aa3cf0abuzbee 18059a42afc2b23d2e241a7e301e2cd68a94fba51e5Serguei Katkov bool WideGPRsAreAliases() OVERRIDE { 18159a42afc2b23d2e241a7e301e2cd68a94fba51e5Serguei Katkov return false; // Wide GPRs are formed by pairing. 18259a42afc2b23d2e241a7e301e2cd68a94fba51e5Serguei Katkov } 18359a42afc2b23d2e241a7e301e2cd68a94fba51e5Serguei Katkov bool WideFPRsAreAliases() OVERRIDE { 18459a42afc2b23d2e241a7e301e2cd68a94fba51e5Serguei Katkov return false; // Wide FPRs are formed by pairing. 18559a42afc2b23d2e241a7e301e2cd68a94fba51e5Serguei Katkov } 18659a42afc2b23d2e241a7e301e2cd68a94fba51e5Serguei Katkov 187984305917bf57b3f8d92965e4715a0370cc5bcfbAndreas Gampe LIR* InvokeTrampoline(OpKind op, RegStorage r_tgt, QuickEntrypointEnum trampoline) OVERRIDE; 18863999683329612292d534e6be09dbde9480f1250Serban Constantinescu size_t GetInstructionOffset(LIR* lir); 189984305917bf57b3f8d92965e4715a0370cc5bcfbAndreas Gampe 1904ef3e45d7c6ec3c482a1a48f4df470811aa3cf0abuzbee private: 191c76c614d681d187d815760eb909e5faf488a3c35Andreas Gampe void GenNegLong(RegLocation rl_dest, RegLocation rl_src); 192c76c614d681d187d815760eb909e5faf488a3c35Andreas Gampe void GenMulLong(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1, 193c76c614d681d187d815760eb909e5faf488a3c35Andreas Gampe RegLocation rl_src2); 1941fd3346740dfb7f47be9922312b68a4227fada96buzbee void GenFusedLongCmpImmBranch(BasicBlock* bb, RegLocation rl_src1, int64_t val, 1951fd3346740dfb7f47be9922312b68a4227fada96buzbee ConditionCode ccode); 1961fd3346740dfb7f47be9922312b68a4227fada96buzbee LIR* LoadFPConstantValue(int r_dest, int value); 19737573977769e9068874506050c62acd4e324d246Vladimir Marko LIR* LoadStoreUsingInsnWithOffsetImm8Shl2(ArmOpcode opcode, RegStorage r_base, 19837573977769e9068874506050c62acd4e324d246Vladimir Marko int displacement, RegStorage r_src_dest, 19937573977769e9068874506050c62acd4e324d246Vladimir Marko RegStorage r_work = RegStorage::InvalidReg()); 200b48819db07f9a0992a72173380c24249d7fc648abuzbee void ReplaceFixup(LIR* prev_lir, LIR* orig_lir, LIR* new_lir); 201b48819db07f9a0992a72173380c24249d7fc648abuzbee void InsertFixupBefore(LIR* prev_lir, LIR* orig_lir, LIR* new_lir); 202b48819db07f9a0992a72173380c24249d7fc648abuzbee void AssignDataOffsets(); 2032700f7e1edbcd2518f4978e4cd0e05a4149f91b6buzbee RegLocation GenDivRem(RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2, 2042700f7e1edbcd2518f4978e4cd0e05a4149f91b6buzbee bool is_div, bool check_zero); 2052bf31e67694da24a19fc1f328285cebb1a4b9964Mark Mendell RegLocation GenDivRemLit(RegLocation rl_dest, RegLocation rl_src1, int lit, bool is_div); 206e2143c0a4af68c08e811885eb2f3ea5bfdb21ab6Ian Rogers typedef struct { 207e2143c0a4af68c08e811885eb2f3ea5bfdb21ab6Ian Rogers OpKind op; 208e2143c0a4af68c08e811885eb2f3ea5bfdb21ab6Ian Rogers uint32_t shift; 209e2143c0a4af68c08e811885eb2f3ea5bfdb21ab6Ian Rogers } EasyMultiplyOp; 210e2143c0a4af68c08e811885eb2f3ea5bfdb21ab6Ian Rogers bool GetEasyMultiplyOp(int lit, EasyMultiplyOp* op); 211e2143c0a4af68c08e811885eb2f3ea5bfdb21ab6Ian Rogers bool GetEasyMultiplyTwoOps(int lit, EasyMultiplyOp* ops); 212e2143c0a4af68c08e811885eb2f3ea5bfdb21ab6Ian Rogers void GenEasyMultiplyTwoOps(RegStorage r_dest, RegStorage r_src, EasyMultiplyOp* ops); 2138dea81ca9c0201ceaa88086b927a5838a06a3e69Vladimir Marko 2148dea81ca9c0201ceaa88086b927a5838a06a3e69Vladimir Marko static constexpr ResourceMask GetRegMaskArm(RegStorage reg); 2158dea81ca9c0201ceaa88086b927a5838a06a3e69Vladimir Marko static constexpr ResourceMask EncodeArmRegList(int reg_list); 2168dea81ca9c0201ceaa88086b927a5838a06a3e69Vladimir Marko static constexpr ResourceMask EncodeArmRegFpcsList(int reg_list); 21702031b185b4653e6c72e21f7a51238b903f6d638buzbee}; 21802031b185b4653e6c72e21f7a51238b903f6d638buzbee 21902031b185b4653e6c72e21f7a51238b903f6d638buzbee} // namespace art 22002031b185b4653e6c72e21f7a51238b903f6d638buzbee 221fc0e3219edc9a5bf81b166e82fd5db2796eb6a0dBrian Carlstrom#endif // ART_COMPILER_DEX_QUICK_ARM_CODEGEN_ARM_H_ 222