1198084289b68143fd4ea72dec91515eec00d700fChristopher Ferris/*
2198084289b68143fd4ea72dec91515eec00d700fChristopher Ferris * This file is subject to the terms and conditions of the GNU General Public
3198084289b68143fd4ea72dec91515eec00d700fChristopher Ferris * License.  See the file "COPYING" in the main directory of this archive
4198084289b68143fd4ea72dec91515eec00d700fChristopher Ferris * for more details.
5198084289b68143fd4ea72dec91515eec00d700fChristopher Ferris *
6198084289b68143fd4ea72dec91515eec00d700fChristopher Ferris * Copyright (C) 1994, 95, 96, 97, 98, 99, 2000 by Ralf Baechle
7198084289b68143fd4ea72dec91515eec00d700fChristopher Ferris * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
8198084289b68143fd4ea72dec91515eec00d700fChristopher Ferris */
9198084289b68143fd4ea72dec91515eec00d700fChristopher Ferris#ifndef _UAPI_ASM_PTRACE_H
10198084289b68143fd4ea72dec91515eec00d700fChristopher Ferris#define _UAPI_ASM_PTRACE_H
11198084289b68143fd4ea72dec91515eec00d700fChristopher Ferris
12198084289b68143fd4ea72dec91515eec00d700fChristopher Ferris/* 0 - 31 are integer registers, 32 - 63 are fp registers.  */
13198084289b68143fd4ea72dec91515eec00d700fChristopher Ferris#define FPR_BASE	32
14198084289b68143fd4ea72dec91515eec00d700fChristopher Ferris#define PC		64
15198084289b68143fd4ea72dec91515eec00d700fChristopher Ferris#define CAUSE		65
16198084289b68143fd4ea72dec91515eec00d700fChristopher Ferris#define BADVADDR	66
17198084289b68143fd4ea72dec91515eec00d700fChristopher Ferris#define MMHI		67
18198084289b68143fd4ea72dec91515eec00d700fChristopher Ferris#define MMLO		68
19198084289b68143fd4ea72dec91515eec00d700fChristopher Ferris#define FPC_CSR		69
20198084289b68143fd4ea72dec91515eec00d700fChristopher Ferris#define FPC_EIR		70
21198084289b68143fd4ea72dec91515eec00d700fChristopher Ferris#define DSP_BASE	71		/* 3 more hi / lo register pairs */
22198084289b68143fd4ea72dec91515eec00d700fChristopher Ferris#define DSP_CONTROL	77
23198084289b68143fd4ea72dec91515eec00d700fChristopher Ferris#define ACX		78
24198084289b68143fd4ea72dec91515eec00d700fChristopher Ferris
25198084289b68143fd4ea72dec91515eec00d700fChristopher Ferris#ifndef __KERNEL__
26198084289b68143fd4ea72dec91515eec00d700fChristopher Ferris/*
27198084289b68143fd4ea72dec91515eec00d700fChristopher Ferris * This struct defines the way the registers are stored on the stack during a
28198084289b68143fd4ea72dec91515eec00d700fChristopher Ferris * system call/exception. As usual the registers k0/k1 aren't being saved.
29198084289b68143fd4ea72dec91515eec00d700fChristopher Ferris */
30198084289b68143fd4ea72dec91515eec00d700fChristopher Ferrisstruct pt_regs {
31198084289b68143fd4ea72dec91515eec00d700fChristopher Ferris	/* Saved main processor registers. */
32198084289b68143fd4ea72dec91515eec00d700fChristopher Ferris	unsigned long regs[32];
33198084289b68143fd4ea72dec91515eec00d700fChristopher Ferris
34198084289b68143fd4ea72dec91515eec00d700fChristopher Ferris	/* Saved special registers. */
35198084289b68143fd4ea72dec91515eec00d700fChristopher Ferris	unsigned long cp0_status;
36198084289b68143fd4ea72dec91515eec00d700fChristopher Ferris	unsigned long hi;
37198084289b68143fd4ea72dec91515eec00d700fChristopher Ferris	unsigned long lo;
38198084289b68143fd4ea72dec91515eec00d700fChristopher Ferris	unsigned long cp0_badvaddr;
39198084289b68143fd4ea72dec91515eec00d700fChristopher Ferris	unsigned long cp0_cause;
40198084289b68143fd4ea72dec91515eec00d700fChristopher Ferris	unsigned long cp0_epc;
41198084289b68143fd4ea72dec91515eec00d700fChristopher Ferris} __attribute__ ((aligned (8)));
42198084289b68143fd4ea72dec91515eec00d700fChristopher Ferris#endif /* __KERNEL__ */
43198084289b68143fd4ea72dec91515eec00d700fChristopher Ferris
44198084289b68143fd4ea72dec91515eec00d700fChristopher Ferris/* Arbitrarily choose the same ptrace numbers as used by the Sparc code. */
45198084289b68143fd4ea72dec91515eec00d700fChristopher Ferris#define PTRACE_GETREGS		12
46198084289b68143fd4ea72dec91515eec00d700fChristopher Ferris#define PTRACE_SETREGS		13
47198084289b68143fd4ea72dec91515eec00d700fChristopher Ferris#define PTRACE_GETFPREGS		14
48198084289b68143fd4ea72dec91515eec00d700fChristopher Ferris#define PTRACE_SETFPREGS		15
49198084289b68143fd4ea72dec91515eec00d700fChristopher Ferris/* #define PTRACE_GETFPXREGS		18 */
50198084289b68143fd4ea72dec91515eec00d700fChristopher Ferris/* #define PTRACE_SETFPXREGS		19 */
51198084289b68143fd4ea72dec91515eec00d700fChristopher Ferris
52198084289b68143fd4ea72dec91515eec00d700fChristopher Ferris#define PTRACE_OLDSETOPTIONS	21
53198084289b68143fd4ea72dec91515eec00d700fChristopher Ferris
54198084289b68143fd4ea72dec91515eec00d700fChristopher Ferris#define PTRACE_GET_THREAD_AREA	25
55198084289b68143fd4ea72dec91515eec00d700fChristopher Ferris#define PTRACE_SET_THREAD_AREA	26
56198084289b68143fd4ea72dec91515eec00d700fChristopher Ferris
57198084289b68143fd4ea72dec91515eec00d700fChristopher Ferris/* Calls to trace a 64bit program from a 32bit program.	 */
58198084289b68143fd4ea72dec91515eec00d700fChristopher Ferris#define PTRACE_PEEKTEXT_3264	0xc0
59198084289b68143fd4ea72dec91515eec00d700fChristopher Ferris#define PTRACE_PEEKDATA_3264	0xc1
60198084289b68143fd4ea72dec91515eec00d700fChristopher Ferris#define PTRACE_POKETEXT_3264	0xc2
61198084289b68143fd4ea72dec91515eec00d700fChristopher Ferris#define PTRACE_POKEDATA_3264	0xc3
62198084289b68143fd4ea72dec91515eec00d700fChristopher Ferris#define PTRACE_GET_THREAD_AREA_3264	0xc4
63198084289b68143fd4ea72dec91515eec00d700fChristopher Ferris
64198084289b68143fd4ea72dec91515eec00d700fChristopher Ferris/* Read and write watchpoint registers.	 */
65198084289b68143fd4ea72dec91515eec00d700fChristopher Ferrisenum pt_watch_style {
66198084289b68143fd4ea72dec91515eec00d700fChristopher Ferris	pt_watch_style_mips32,
67198084289b68143fd4ea72dec91515eec00d700fChristopher Ferris	pt_watch_style_mips64
68198084289b68143fd4ea72dec91515eec00d700fChristopher Ferris};
69198084289b68143fd4ea72dec91515eec00d700fChristopher Ferrisstruct mips32_watch_regs {
70198084289b68143fd4ea72dec91515eec00d700fChristopher Ferris	unsigned int watchlo[8];
71198084289b68143fd4ea72dec91515eec00d700fChristopher Ferris	/* Lower 16 bits of watchhi. */
72198084289b68143fd4ea72dec91515eec00d700fChristopher Ferris	unsigned short watchhi[8];
73198084289b68143fd4ea72dec91515eec00d700fChristopher Ferris	/* Valid mask and I R W bits.
74198084289b68143fd4ea72dec91515eec00d700fChristopher Ferris	 * bit 0 -- 1 if W bit is usable.
75198084289b68143fd4ea72dec91515eec00d700fChristopher Ferris	 * bit 1 -- 1 if R bit is usable.
76198084289b68143fd4ea72dec91515eec00d700fChristopher Ferris	 * bit 2 -- 1 if I bit is usable.
77198084289b68143fd4ea72dec91515eec00d700fChristopher Ferris	 * bits 3 - 11 -- Valid watchhi mask bits.
78198084289b68143fd4ea72dec91515eec00d700fChristopher Ferris	 */
79198084289b68143fd4ea72dec91515eec00d700fChristopher Ferris	unsigned short watch_masks[8];
80198084289b68143fd4ea72dec91515eec00d700fChristopher Ferris	/* The number of valid watch register pairs.  */
81198084289b68143fd4ea72dec91515eec00d700fChristopher Ferris	unsigned int num_valid;
82198084289b68143fd4ea72dec91515eec00d700fChristopher Ferris} __attribute__((aligned(8)));
83198084289b68143fd4ea72dec91515eec00d700fChristopher Ferris
84198084289b68143fd4ea72dec91515eec00d700fChristopher Ferrisstruct mips64_watch_regs {
85198084289b68143fd4ea72dec91515eec00d700fChristopher Ferris	unsigned long long watchlo[8];
86198084289b68143fd4ea72dec91515eec00d700fChristopher Ferris	unsigned short watchhi[8];
87198084289b68143fd4ea72dec91515eec00d700fChristopher Ferris	unsigned short watch_masks[8];
88198084289b68143fd4ea72dec91515eec00d700fChristopher Ferris	unsigned int num_valid;
89198084289b68143fd4ea72dec91515eec00d700fChristopher Ferris} __attribute__((aligned(8)));
90198084289b68143fd4ea72dec91515eec00d700fChristopher Ferris
91198084289b68143fd4ea72dec91515eec00d700fChristopher Ferrisstruct pt_watch_regs {
92198084289b68143fd4ea72dec91515eec00d700fChristopher Ferris	enum pt_watch_style style;
93198084289b68143fd4ea72dec91515eec00d700fChristopher Ferris	union {
94198084289b68143fd4ea72dec91515eec00d700fChristopher Ferris		struct mips32_watch_regs mips32;
95198084289b68143fd4ea72dec91515eec00d700fChristopher Ferris		struct mips64_watch_regs mips64;
96198084289b68143fd4ea72dec91515eec00d700fChristopher Ferris	};
97198084289b68143fd4ea72dec91515eec00d700fChristopher Ferris};
98198084289b68143fd4ea72dec91515eec00d700fChristopher Ferris
99198084289b68143fd4ea72dec91515eec00d700fChristopher Ferris#define PTRACE_GET_WATCH_REGS	0xd0
100198084289b68143fd4ea72dec91515eec00d700fChristopher Ferris#define PTRACE_SET_WATCH_REGS	0xd1
101198084289b68143fd4ea72dec91515eec00d700fChristopher Ferris
102198084289b68143fd4ea72dec91515eec00d700fChristopher Ferris
103198084289b68143fd4ea72dec91515eec00d700fChristopher Ferris#endif /* _UAPI_ASM_PTRACE_H */
104