ARMSubtarget.cpp revision 654d5440a477b1f6c89b051107e041a331f78e27 
1//===-- ARMSubtarget.cpp - ARM Subtarget Information ------------*- C++ -*-===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file implements the ARM specific subclass of TargetSubtarget.
11//
12//===----------------------------------------------------------------------===//
13
14#include "ARMSubtarget.h"
15#include "ARMGenSubtarget.inc"
16#include "llvm/GlobalValue.h"
17#include "llvm/Target/TargetOptions.h"
18#include "llvm/Support/CommandLine.h"
19#include "llvm/ADT/SmallVector.h"
20using namespace llvm;
21
22static cl::opt<bool>
23ReserveR9("arm-reserve-r9", cl::Hidden,
24          cl::desc("Reserve R9, making it unavailable as GPR"));
25
26static cl::opt<bool>
27UseMOVT("arm-use-movt",
28        cl::init(true), cl::Hidden);
29
30static cl::opt<bool>
31StrictAlign("arm-strict-align", cl::Hidden,
32            cl::desc("Disallow all unaligned memory accesses"));
33
34ARMSubtarget::ARMSubtarget(const std::string &TT, const std::string &FS,
35                           bool isT)
36  : ARMArchVersion(V4)
37  , ARMProcFamily(Others)
38  , ARMFPUType(None)
39  , UseNEONForSinglePrecisionFP(false)
40  , SlowVMLx(false)
41  , SlowFPBrcc(false)
42  , IsThumb(isT)
43  , ThumbMode(Thumb1)
44  , NoARM(false)
45  , PostRAScheduler(false)
46  , IsR9Reserved(ReserveR9)
47  , UseMovt(UseMOVT)
48  , HasFP16(false)
49  , HasHardwareDivide(false)
50  , HasT2ExtractPack(false)
51  , HasDataBarrier(false)
52  , Pref32BitThumb(false)
53  , FPOnlySP(false)
54  , AllowsUnalignedMem(false)
55  , stackAlignment(4)
56  , CPUString("generic")
57  , TargetType(isELF) // Default to ELF unless otherwise specified.
58  , TargetABI(ARM_ABI_APCS) {
59  // Default to soft float ABI
60  if (FloatABIType == FloatABI::Default)
61    FloatABIType = FloatABI::Soft;
62
63  // Determine default and user specified characteristics
64
65  // Parse features string.
66  CPUString = ParseSubtargetFeatures(FS, CPUString);
67
68  // When no arch is specified either by CPU or by attributes, make the default
69  // ARMv4T.
70  if (CPUString == "generic" && (FS.empty() || FS == "generic"))
71    ARMArchVersion = V4T;
72
73  // Set the boolean corresponding to the current target triple, or the default
74  // if one cannot be determined, to true.
75  unsigned Len = TT.length();
76  unsigned Idx = 0;
77
78  if (Len >= 5 && TT.substr(0, 4) == "armv")
79    Idx = 4;
80  else if (Len >= 6 && TT.substr(0, 5) == "thumb") {
81    IsThumb = true;
82    if (Len >= 7 && TT[5] == 'v')
83      Idx = 6;
84  }
85  if (Idx) {
86    unsigned SubVer = TT[Idx];
87    if (SubVer >= '7' && SubVer <= '9') {
88      ARMArchVersion = V7A;
89      if (Len >= Idx+2 && TT[Idx+1] == 'm')
90        ARMArchVersion = V7M;
91    } else if (SubVer == '6') {
92      ARMArchVersion = V6;
93      if (Len >= Idx+3 && TT[Idx+1] == 't' && TT[Idx+2] == '2')
94        ARMArchVersion = V6T2;
95    } else if (SubVer == '5') {
96      ARMArchVersion = V5T;
97      if (Len >= Idx+3 && TT[Idx+1] == 't' && TT[Idx+2] == 'e')
98        ARMArchVersion = V5TE;
99    } else if (SubVer == '4') {
100      if (Len >= Idx+2 && TT[Idx+1] == 't')
101        ARMArchVersion = V4T;
102      else
103        ARMArchVersion = V4;
104    }
105  }
106
107  // Thumb2 implies at least V6T2.
108  if (ARMArchVersion >= V6T2)
109    ThumbMode = Thumb2;
110  else if (ThumbMode >= Thumb2)
111    ARMArchVersion = V6T2;
112
113  if (Len >= 10) {
114    if (TT.find("-darwin") != std::string::npos)
115      // arm-darwin
116      TargetType = isDarwin;
117  }
118
119  if (TT.find("eabi") != std::string::npos)
120    TargetABI = ARM_ABI_AAPCS;
121
122  if (isAAPCS_ABI())
123    stackAlignment = 8;
124
125  if (isTargetDarwin())
126    IsR9Reserved = ReserveR9 | (ARMArchVersion < V6);
127
128  if (!isThumb() || hasThumb2())
129    PostRAScheduler = true;
130
131  // v6+ may or may not support unaligned mem access depending on the system
132  // configuration.
133  if (!StrictAlign && hasV6Ops() && isTargetDarwin())
134    AllowsUnalignedMem = true;
135}
136
137/// GVIsIndirectSymbol - true if the GV will be accessed via an indirect symbol.
138bool
139ARMSubtarget::GVIsIndirectSymbol(const GlobalValue *GV,
140                                 Reloc::Model RelocM) const {
141  if (RelocM == Reloc::Static)
142    return false;
143
144  // Materializable GVs (in JIT lazy compilation mode) do not require an extra
145  // load from stub.
146  bool isDecl = GV->isDeclaration() && !GV->isMaterializable();
147
148  if (!isTargetDarwin()) {
149    // Extra load is needed for all externally visible.
150    if (GV->hasLocalLinkage() || GV->hasHiddenVisibility())
151      return false;
152    return true;
153  } else {
154    if (RelocM == Reloc::PIC_) {
155      // If this is a strong reference to a definition, it is definitely not
156      // through a stub.
157      if (!isDecl && !GV->isWeakForLinker())
158        return false;
159
160      // Unless we have a symbol with hidden visibility, we have to go through a
161      // normal $non_lazy_ptr stub because this symbol might be resolved late.
162      if (!GV->hasHiddenVisibility())  // Non-hidden $non_lazy_ptr reference.
163        return true;
164
165      // If symbol visibility is hidden, we have a stub for common symbol
166      // references and external declarations.
167      if (isDecl || GV->hasCommonLinkage())
168        // Hidden $non_lazy_ptr reference.
169        return true;
170
171      return false;
172    } else {
173      // If this is a strong reference to a definition, it is definitely not
174      // through a stub.
175      if (!isDecl && !GV->isWeakForLinker())
176        return false;
177
178      // Unless we have a symbol with hidden visibility, we have to go through a
179      // normal $non_lazy_ptr stub because this symbol might be resolved late.
180      if (!GV->hasHiddenVisibility())  // Non-hidden $non_lazy_ptr reference.
181        return true;
182    }
183  }
184
185  return false;
186}
187
188unsigned ARMSubtarget::getMispredictionPenalty() const {
189  // If we have a reasonable estimate of the pipeline depth, then we can
190  // estimate the penalty of a misprediction based on that.
191  if (isCortexA8())
192    return 13;
193  else if (isCortexA9())
194    return 8;
195
196  // Otherwise, just return a sensible default.
197  return 10;
198}
199
200bool ARMSubtarget::enablePostRAScheduler(
201           CodeGenOpt::Level OptLevel,
202           TargetSubtarget::AntiDepBreakMode& Mode,
203           RegClassVector& CriticalPathRCs) const {
204  Mode = TargetSubtarget::ANTIDEP_CRITICAL;
205  CriticalPathRCs.clear();
206  CriticalPathRCs.push_back(&ARM::GPRRegClass);
207  return PostRAScheduler && OptLevel >= CodeGenOpt::Default;
208}
209