1//===-- Mips16FrameLowering.cpp - Mips16 Frame Information ----------------===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This file contains the Mips16 implementation of TargetFrameLowering class. 11// 12//===----------------------------------------------------------------------===// 13 14#include "Mips16FrameLowering.h" 15#include "MCTargetDesc/MipsBaseInfo.h" 16#include "Mips16InstrInfo.h" 17#include "MipsInstrInfo.h" 18#include "MipsRegisterInfo.h" 19#include "MipsSubtarget.h" 20#include "llvm/CodeGen/MachineFrameInfo.h" 21#include "llvm/CodeGen/MachineFunction.h" 22#include "llvm/CodeGen/MachineInstrBuilder.h" 23#include "llvm/CodeGen/MachineModuleInfo.h" 24#include "llvm/CodeGen/MachineRegisterInfo.h" 25#include "llvm/IR/DataLayout.h" 26#include "llvm/IR/Function.h" 27#include "llvm/Support/CommandLine.h" 28#include "llvm/Target/TargetOptions.h" 29 30using namespace llvm; 31 32Mips16FrameLowering::Mips16FrameLowering(const MipsSubtarget &STI) 33 : MipsFrameLowering(STI, STI.stackAlignment()) {} 34 35void Mips16FrameLowering::emitPrologue(MachineFunction &MF) const { 36 MachineBasicBlock &MBB = MF.front(); 37 MachineFrameInfo *MFI = MF.getFrameInfo(); 38 const Mips16InstrInfo &TII = 39 *static_cast<const Mips16InstrInfo*>(MF.getTarget().getInstrInfo()); 40 MachineBasicBlock::iterator MBBI = MBB.begin(); 41 DebugLoc dl = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc(); 42 uint64_t StackSize = MFI->getStackSize(); 43 44 // No need to allocate space on the stack. 45 if (StackSize == 0 && !MFI->adjustsStack()) return; 46 47 MachineModuleInfo &MMI = MF.getMMI(); 48 const MCRegisterInfo *MRI = MMI.getContext().getRegisterInfo(); 49 MachineLocation DstML, SrcML; 50 51 // Adjust stack. 52 TII.makeFrame(Mips::SP, StackSize, MBB, MBBI); 53 54 // emit ".cfi_def_cfa_offset StackSize" 55 unsigned CFIIndex = MMI.addFrameInst( 56 MCCFIInstruction::createDefCfaOffset(nullptr, -StackSize)); 57 BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION)) 58 .addCFIIndex(CFIIndex); 59 60 const std::vector<CalleeSavedInfo> &CSI = MFI->getCalleeSavedInfo(); 61 62 if (CSI.size()) { 63 const std::vector<CalleeSavedInfo> &CSI = MFI->getCalleeSavedInfo(); 64 65 for (std::vector<CalleeSavedInfo>::const_iterator I = CSI.begin(), 66 E = CSI.end(); I != E; ++I) { 67 int64_t Offset = MFI->getObjectOffset(I->getFrameIdx()); 68 unsigned Reg = I->getReg(); 69 unsigned DReg = MRI->getDwarfRegNum(Reg, true); 70 unsigned CFIIndex = MMI.addFrameInst( 71 MCCFIInstruction::createOffset(nullptr, DReg, Offset)); 72 BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION)) 73 .addCFIIndex(CFIIndex); 74 } 75 } 76 if (hasFP(MF)) 77 BuildMI(MBB, MBBI, dl, TII.get(Mips::MoveR3216), Mips::S0) 78 .addReg(Mips::SP).setMIFlag(MachineInstr::FrameSetup); 79 80} 81 82void Mips16FrameLowering::emitEpilogue(MachineFunction &MF, 83 MachineBasicBlock &MBB) const { 84 MachineBasicBlock::iterator MBBI = MBB.getLastNonDebugInstr(); 85 MachineFrameInfo *MFI = MF.getFrameInfo(); 86 const Mips16InstrInfo &TII = 87 *static_cast<const Mips16InstrInfo*>(MF.getTarget().getInstrInfo()); 88 DebugLoc dl = MBBI->getDebugLoc(); 89 uint64_t StackSize = MFI->getStackSize(); 90 91 if (!StackSize) 92 return; 93 94 if (hasFP(MF)) 95 BuildMI(MBB, MBBI, dl, TII.get(Mips::Move32R16), Mips::SP) 96 .addReg(Mips::S0); 97 98 // Adjust stack. 99 // assumes stacksize multiple of 8 100 TII.restoreFrame(Mips::SP, StackSize, MBB, MBBI); 101} 102 103bool Mips16FrameLowering:: 104spillCalleeSavedRegisters(MachineBasicBlock &MBB, 105 MachineBasicBlock::iterator MI, 106 const std::vector<CalleeSavedInfo> &CSI, 107 const TargetRegisterInfo *TRI) const { 108 MachineFunction *MF = MBB.getParent(); 109 MachineBasicBlock *EntryBlock = MF->begin(); 110 111 // 112 // Registers RA, S0,S1 are the callee saved registers and they 113 // will be saved with the "save" instruction 114 // during emitPrologue 115 // 116 for (unsigned i = 0, e = CSI.size(); i != e; ++i) { 117 // Add the callee-saved register as live-in. Do not add if the register is 118 // RA and return address is taken, because it has already been added in 119 // method MipsTargetLowering::LowerRETURNADDR. 120 // It's killed at the spill, unless the register is RA and return address 121 // is taken. 122 unsigned Reg = CSI[i].getReg(); 123 bool IsRAAndRetAddrIsTaken = (Reg == Mips::RA) 124 && MF->getFrameInfo()->isReturnAddressTaken(); 125 if (!IsRAAndRetAddrIsTaken) 126 EntryBlock->addLiveIn(Reg); 127 } 128 129 return true; 130} 131 132bool Mips16FrameLowering::restoreCalleeSavedRegisters(MachineBasicBlock &MBB, 133 MachineBasicBlock::iterator MI, 134 const std::vector<CalleeSavedInfo> &CSI, 135 const TargetRegisterInfo *TRI) const { 136 // 137 // Registers RA,S0,S1 are the callee saved registers and they will be restored 138 // with the restore instruction during emitEpilogue. 139 // We need to override this virtual function, otherwise llvm will try and 140 // restore the registers on it's on from the stack. 141 // 142 143 return true; 144} 145 146// Eliminate ADJCALLSTACKDOWN, ADJCALLSTACKUP pseudo instructions 147void Mips16FrameLowering:: 148eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB, 149 MachineBasicBlock::iterator I) const { 150 if (!hasReservedCallFrame(MF)) { 151 int64_t Amount = I->getOperand(0).getImm(); 152 153 if (I->getOpcode() == Mips::ADJCALLSTACKDOWN) 154 Amount = -Amount; 155 156 const Mips16InstrInfo &TII = 157 *static_cast<const Mips16InstrInfo*>(MF.getTarget().getInstrInfo()); 158 159 TII.adjustStackPtr(Mips::SP, Amount, MBB, I); 160 } 161 162 MBB.erase(I); 163} 164 165bool 166Mips16FrameLowering::hasReservedCallFrame(const MachineFunction &MF) const { 167 const MachineFrameInfo *MFI = MF.getFrameInfo(); 168 // Reserve call frame if the size of the maximum call frame fits into 15-bit 169 // immediate field and there are no variable sized objects on the stack. 170 return isInt<15>(MFI->getMaxCallFrameSize()) && !MFI->hasVarSizedObjects(); 171} 172 173void Mips16FrameLowering:: 174processFunctionBeforeCalleeSavedScan(MachineFunction &MF, 175 RegScavenger *RS) const { 176 const Mips16InstrInfo &TII = 177 *static_cast<const Mips16InstrInfo*>(MF.getTarget().getInstrInfo()); 178 const MipsRegisterInfo &RI = TII.getRegisterInfo(); 179 const BitVector Reserved = RI.getReservedRegs(MF); 180 bool SaveS2 = Reserved[Mips::S2]; 181 if (SaveS2) 182 MF.getRegInfo().setPhysRegUsed(Mips::S2); 183 if (hasFP(MF)) 184 MF.getRegInfo().setPhysRegUsed(Mips::S0); 185} 186 187const MipsFrameLowering * 188llvm::createMips16FrameLowering(const MipsSubtarget &ST) { 189 return new Mips16FrameLowering(ST); 190} 191