SIRegisterInfo.cpp revision 3406d882c02a6cd1e16f4636351c23dcb68d785f
1f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard//===-- SIRegisterInfo.cpp - SI Register Information ---------------------===// 2f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard// 3f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard// The LLVM Compiler Infrastructure 4f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard// 5f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard// This file is distributed under the University of Illinois Open Source 6f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard// License. See LICENSE.TXT for details. 7f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard// 8f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard//===----------------------------------------------------------------------===// 9f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard// 10f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard/// \file 11f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard/// \brief SI implementation of the TargetRegisterInfo class. 12f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard// 13f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard//===----------------------------------------------------------------------===// 14f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 15f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 16f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard#include "SIRegisterInfo.h" 17f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard#include "AMDGPUTargetMachine.h" 18f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 19f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellardusing namespace llvm; 20f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 21b5632b5b456db647b42239cbd4d8b58c82290c4eBill WendlingSIRegisterInfo::SIRegisterInfo(AMDGPUTargetMachine &tm) 22b5632b5b456db647b42239cbd4d8b58c82290c4eBill Wendling: AMDGPURegisterInfo(tm), 23b5632b5b456db647b42239cbd4d8b58c82290c4eBill Wendling TM(tm) 24f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard { } 25f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 26f98f2ce29e6e2996fa58f38979143eceaa818335Tom StellardBitVector SIRegisterInfo::getReservedRegs(const MachineFunction &MF) const { 27f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard BitVector Reserved(getNumRegs()); 28f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard return Reserved; 29f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard} 30f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 31c53270f885e8d778cfe0e741e07d7def2b66884aChristian Konigunsigned SIRegisterInfo::getRegPressureLimit(const TargetRegisterClass *RC, 32c53270f885e8d778cfe0e741e07d7def2b66884aChristian Konig MachineFunction &MF) const { 33c53270f885e8d778cfe0e741e07d7def2b66884aChristian Konig return RC->getNumRegs(); 34c53270f885e8d778cfe0e741e07d7def2b66884aChristian Konig} 35c53270f885e8d778cfe0e741e07d7def2b66884aChristian Konig 36f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellardconst TargetRegisterClass * 37f98f2ce29e6e2996fa58f38979143eceaa818335Tom StellardSIRegisterInfo::getISARegClass(const TargetRegisterClass * rc) const { 38f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard switch (rc->getID()) { 39f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard case AMDGPU::GPRF32RegClassID: 40f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard return &AMDGPU::VReg_32RegClass; 41f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard default: return rc; 42f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard } 43f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard} 44f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 45f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellardconst TargetRegisterClass * SIRegisterInfo::getCFGStructurizerRegClass( 46f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard MVT VT) const { 47f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard switch(VT.SimpleTy) { 48f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard default: 49f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard case MVT::i32: return &AMDGPU::VReg_32RegClass; 50f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard } 51f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard} 523406d882c02a6cd1e16f4636351c23dcb68d785fTom Stellard 533406d882c02a6cd1e16f4636351c23dcb68d785fTom Stellardconst TargetRegisterClass *SIRegisterInfo::getPhysRegClass(unsigned Reg) const { 543406d882c02a6cd1e16f4636351c23dcb68d785fTom Stellard assert(!TargetRegisterInfo::isVirtualRegister(Reg)); 553406d882c02a6cd1e16f4636351c23dcb68d785fTom Stellard 563406d882c02a6cd1e16f4636351c23dcb68d785fTom Stellard const TargetRegisterClass *BaseClasses[] = { 573406d882c02a6cd1e16f4636351c23dcb68d785fTom Stellard &AMDGPU::VReg_32RegClass, 583406d882c02a6cd1e16f4636351c23dcb68d785fTom Stellard &AMDGPU::SReg_32RegClass, 593406d882c02a6cd1e16f4636351c23dcb68d785fTom Stellard &AMDGPU::VReg_64RegClass, 603406d882c02a6cd1e16f4636351c23dcb68d785fTom Stellard &AMDGPU::SReg_64RegClass, 613406d882c02a6cd1e16f4636351c23dcb68d785fTom Stellard &AMDGPU::SReg_128RegClass, 623406d882c02a6cd1e16f4636351c23dcb68d785fTom Stellard &AMDGPU::SReg_256RegClass 633406d882c02a6cd1e16f4636351c23dcb68d785fTom Stellard }; 643406d882c02a6cd1e16f4636351c23dcb68d785fTom Stellard 653406d882c02a6cd1e16f4636351c23dcb68d785fTom Stellard for (unsigned i = 0, e = sizeof(BaseClasses) / 663406d882c02a6cd1e16f4636351c23dcb68d785fTom Stellard sizeof(const TargetRegisterClass*); i != e; ++i) { 673406d882c02a6cd1e16f4636351c23dcb68d785fTom Stellard if (BaseClasses[i]->contains(Reg)) { 683406d882c02a6cd1e16f4636351c23dcb68d785fTom Stellard return BaseClasses[i]; 693406d882c02a6cd1e16f4636351c23dcb68d785fTom Stellard } 703406d882c02a6cd1e16f4636351c23dcb68d785fTom Stellard } 713406d882c02a6cd1e16f4636351c23dcb68d785fTom Stellard return NULL; 723406d882c02a6cd1e16f4636351c23dcb68d785fTom Stellard} 73