r300_state.c revision 8f990f928b1d6cb395ea4f3d4c1d7e3a670f1ad6
1/* 2 * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com> 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * on the rights to use, copy, modify, merge, publish, distribute, sub 8 * license, and/or sell copies of the Software, and to permit persons to whom 9 * the Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, 19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 21 * USE OR OTHER DEALINGS IN THE SOFTWARE. */ 22 23#include "util/u_math.h" 24#include "util/u_pack_color.h" 25 26#include "util/u_debug.h" 27 28#include "pipe/p_config.h" 29#include "pipe/internal/p_winsys_screen.h" 30 31#include "r300_context.h" 32#include "r300_reg.h" 33#include "r300_state_inlines.h" 34#include "r300_fs.h" 35#include "r300_vs.h" 36 37/* r300_state: Functions used to intialize state context by translating 38 * Gallium state objects into semi-native r300 state objects. */ 39 40/* Create a new blend state based on the CSO blend state. 41 * 42 * This encompasses alpha blending, logic/raster ops, and blend dithering. */ 43static void* r300_create_blend_state(struct pipe_context* pipe, 44 const struct pipe_blend_state* state) 45{ 46 struct r300_blend_state* blend = CALLOC_STRUCT(r300_blend_state); 47 48 if (state->blend_enable) { 49 /* XXX for now, always do separate alpha... 50 * is it faster to do it with one reg? */ 51 blend->blend_control = R300_ALPHA_BLEND_ENABLE | 52 R300_SEPARATE_ALPHA_ENABLE | 53 R300_READ_ENABLE | 54 r300_translate_blend_function(state->rgb_func) | 55 (r300_translate_blend_factor(state->rgb_src_factor) << 56 R300_SRC_BLEND_SHIFT) | 57 (r300_translate_blend_factor(state->rgb_dst_factor) << 58 R300_DST_BLEND_SHIFT); 59 blend->alpha_blend_control = 60 r300_translate_blend_function(state->alpha_func) | 61 (r300_translate_blend_factor(state->alpha_src_factor) << 62 R300_SRC_BLEND_SHIFT) | 63 (r300_translate_blend_factor(state->alpha_dst_factor) << 64 R300_DST_BLEND_SHIFT); 65 } 66 67 /* PIPE_LOGICOP_* don't need to be translated, fortunately. */ 68 if (state->logicop_enable) { 69 blend->rop = R300_RB3D_ROPCNTL_ROP_ENABLE | 70 (state->logicop_func) << R300_RB3D_ROPCNTL_ROP_SHIFT; 71 } 72 73 if (state->dither) { 74 blend->dither = R300_RB3D_DITHER_CTL_DITHER_MODE_LUT | 75 R300_RB3D_DITHER_CTL_ALPHA_DITHER_MODE_LUT; 76 } 77 78 return (void*)blend; 79} 80 81/* Bind blend state. */ 82static void r300_bind_blend_state(struct pipe_context* pipe, 83 void* state) 84{ 85 struct r300_context* r300 = r300_context(pipe); 86 87 r300->blend_state = (struct r300_blend_state*)state; 88 r300->dirty_state |= R300_NEW_BLEND; 89} 90 91/* Free blend state. */ 92static void r300_delete_blend_state(struct pipe_context* pipe, 93 void* state) 94{ 95 FREE(state); 96} 97 98/* Set blend color. 99 * Setup both R300 and R500 registers, figure out later which one to write. */ 100static void r300_set_blend_color(struct pipe_context* pipe, 101 const struct pipe_blend_color* color) 102{ 103 struct r300_context* r300 = r300_context(pipe); 104 ubyte ur, ug, ub, ua; 105 106 ur = float_to_ubyte(color->color[0]); 107 ug = float_to_ubyte(color->color[1]); 108 ub = float_to_ubyte(color->color[2]); 109 ua = float_to_ubyte(color->color[3]); 110 111 util_pack_color(color->color, PIPE_FORMAT_A8R8G8B8_UNORM, 112 &r300->blend_color_state->blend_color); 113 114 /* XXX this is wrong */ 115 r300->blend_color_state->blend_color_red_alpha = ur | (ua << 16); 116 r300->blend_color_state->blend_color_green_blue = ub | (ug << 16); 117 118 r300->dirty_state |= R300_NEW_BLEND_COLOR; 119} 120 121static void r300_set_clip_state(struct pipe_context* pipe, 122 const struct pipe_clip_state* state) 123{ 124 struct r300_context* r300 = r300_context(pipe); 125 126 if (r300_screen(pipe->screen)->caps->has_tcl) { 127 r300->clip_state = *state; 128 r300->dirty_state |= R300_NEW_CLIP; 129 } else { 130 draw_flush(r300->draw); 131 draw_set_clip_state(r300->draw, state); 132 } 133} 134 135static void 136 r300_set_constant_buffer(struct pipe_context* pipe, 137 uint shader, uint index, 138 const struct pipe_constant_buffer* buffer) 139{ 140 struct r300_context* r300 = r300_context(pipe); 141 142 /* This entire chunk of code seems ever-so-slightly baked. 143 * It's as if I've got pipe_buffer* matryoshkas... */ 144 if (buffer && buffer->buffer && buffer->buffer->size) { 145 void* map = pipe->winsys->buffer_map(pipe->winsys, buffer->buffer, 146 PIPE_BUFFER_USAGE_CPU_READ); 147 memcpy(r300->shader_constants[shader].constants, 148 map, buffer->buffer->size); 149 pipe->winsys->buffer_unmap(pipe->winsys, buffer->buffer); 150 151 r300->shader_constants[shader].count = 152 buffer->buffer->size / (sizeof(float) * 4); 153 } else { 154 r300->shader_constants[shader].count = 0; 155 } 156 157 r300->dirty_state |= R300_NEW_CONSTANTS; 158} 159 160/* Create a new depth, stencil, and alpha state based on the CSO dsa state. 161 * 162 * This contains the depth buffer, stencil buffer, alpha test, and such. 163 * On the Radeon, depth and stencil buffer setup are intertwined, which is 164 * the reason for some of the strange-looking assignments across registers. */ 165static void* 166 r300_create_dsa_state(struct pipe_context* pipe, 167 const struct pipe_depth_stencil_alpha_state* state) 168{ 169 struct r300_dsa_state* dsa = CALLOC_STRUCT(r300_dsa_state); 170 171 /* Depth test setup. */ 172 if (state->depth.enabled) { 173 dsa->z_buffer_control |= R300_Z_ENABLE; 174 175 if (state->depth.writemask) { 176 dsa->z_buffer_control |= R300_Z_WRITE_ENABLE; 177 } 178 179 dsa->z_stencil_control |= 180 (r300_translate_depth_stencil_function(state->depth.func) << 181 R300_Z_FUNC_SHIFT); 182 } 183 184 /* Stencil buffer setup. */ 185 if (state->stencil[0].enabled) { 186 dsa->z_buffer_control |= R300_STENCIL_ENABLE; 187 dsa->z_stencil_control |= 188 (r300_translate_depth_stencil_function(state->stencil[0].func) << 189 R300_S_FRONT_FUNC_SHIFT) | 190 (r300_translate_stencil_op(state->stencil[0].fail_op) << 191 R300_S_FRONT_SFAIL_OP_SHIFT) | 192 (r300_translate_stencil_op(state->stencil[0].zpass_op) << 193 R300_S_FRONT_ZPASS_OP_SHIFT) | 194 (r300_translate_stencil_op(state->stencil[0].zfail_op) << 195 R300_S_FRONT_ZFAIL_OP_SHIFT); 196 197 dsa->stencil_ref_mask = (state->stencil[0].ref_value) | 198 (state->stencil[0].valuemask << R300_STENCILMASK_SHIFT) | 199 (state->stencil[0].writemask << R300_STENCILWRITEMASK_SHIFT); 200 201 if (state->stencil[1].enabled) { 202 dsa->z_buffer_control |= R300_STENCIL_FRONT_BACK; 203 dsa->z_stencil_control |= 204 (r300_translate_depth_stencil_function(state->stencil[1].func) << 205 R300_S_BACK_FUNC_SHIFT) | 206 (r300_translate_stencil_op(state->stencil[1].fail_op) << 207 R300_S_BACK_SFAIL_OP_SHIFT) | 208 (r300_translate_stencil_op(state->stencil[1].zpass_op) << 209 R300_S_BACK_ZPASS_OP_SHIFT) | 210 (r300_translate_stencil_op(state->stencil[1].zfail_op) << 211 R300_S_BACK_ZFAIL_OP_SHIFT); 212 213 dsa->stencil_ref_bf = (state->stencil[1].ref_value) | 214 (state->stencil[1].valuemask << R300_STENCILMASK_SHIFT) | 215 (state->stencil[1].writemask << R300_STENCILWRITEMASK_SHIFT); 216 } 217 } 218 219 /* Alpha test setup. */ 220 if (state->alpha.enabled) { 221 dsa->alpha_function = 222 r300_translate_alpha_function(state->alpha.func) | 223 R300_FG_ALPHA_FUNC_ENABLE; 224 dsa->alpha_reference = CLAMP(state->alpha.ref_value * 1023.0f, 225 0, 1023); 226 } else { 227 /* XXX need to fix this to be dynamically set 228 dsa->z_buffer_top = R300_ZTOP_ENABLE; */ 229 } 230 231 return (void*)dsa; 232} 233 234/* Bind DSA state. */ 235static void r300_bind_dsa_state(struct pipe_context* pipe, 236 void* state) 237{ 238 struct r300_context* r300 = r300_context(pipe); 239 240 r300->dsa_state = (struct r300_dsa_state*)state; 241 r300->dirty_state |= R300_NEW_DSA; 242} 243 244/* Free DSA state. */ 245static void r300_delete_dsa_state(struct pipe_context* pipe, 246 void* state) 247{ 248 FREE(state); 249} 250 251static void r300_set_edgeflags(struct pipe_context* pipe, 252 const unsigned* bitfield) 253{ 254 /* XXX you know it's bad when i915 has this blank too */ 255 /* XXX and even worse, I have no idea WTF the bitfield is */ 256} 257 258static void 259 r300_set_framebuffer_state(struct pipe_context* pipe, 260 const struct pipe_framebuffer_state* state) 261{ 262 struct r300_context* r300 = r300_context(pipe); 263 264 draw_flush(r300->draw); 265 266 r300->framebuffer_state = *state; 267 268 r300->dirty_state |= R300_NEW_FRAMEBUFFERS; 269} 270 271/* Create fragment shader state. */ 272static void* r300_create_fs_state(struct pipe_context* pipe, 273 const struct pipe_shader_state* shader) 274{ 275 struct r300_fragment_shader* fs = NULL; 276 277 fs = (struct r300_fragment_shader*)CALLOC_STRUCT(r300_fragment_shader); 278 279 /* Copy state directly into shader. */ 280 fs->state = *shader; 281 fs->state.tokens = tgsi_dup_tokens(shader->tokens); 282 283 tgsi_scan_shader(shader->tokens, &fs->info); 284 285 return (void*)fs; 286} 287 288/* Bind fragment shader state. */ 289static void r300_bind_fs_state(struct pipe_context* pipe, void* shader) 290{ 291 struct r300_context* r300 = r300_context(pipe); 292 struct r300_fragment_shader* fs = (struct r300_fragment_shader*)shader; 293 294 if (fs == NULL) { 295 r300->fs = NULL; 296 return; 297 } else if (!fs->translated) { 298 r300_translate_fragment_shader(r300, fs); 299 } 300 301 r300->fs = fs; 302 303 r300->dirty_state |= R300_NEW_FRAGMENT_SHADER; 304} 305 306/* Delete fragment shader state. */ 307static void r300_delete_fs_state(struct pipe_context* pipe, void* shader) 308{ 309 struct r300_fragment_shader* fs = (struct r300_fragment_shader*)shader; 310 rc_constants_destroy(&fs->code.constants); 311 FREE(fs->state.tokens); 312 FREE(shader); 313} 314 315static void r300_set_polygon_stipple(struct pipe_context* pipe, 316 const struct pipe_poly_stipple* state) 317{ 318 /* XXX no idea how to set this up, but not terribly important */ 319} 320 321/* Create a new rasterizer state based on the CSO rasterizer state. 322 * 323 * This is a very large chunk of state, and covers most of the graphics 324 * backend (GB), geometry assembly (GA), and setup unit (SU) blocks. 325 * 326 * In a not entirely unironic sidenote, this state has nearly nothing to do 327 * with the actual block on the Radeon called the rasterizer (RS). */ 328static void* r300_create_rs_state(struct pipe_context* pipe, 329 const struct pipe_rasterizer_state* state) 330{ 331 struct r300_rs_state* rs = CALLOC_STRUCT(r300_rs_state); 332 333 /* Copy rasterizer state for Draw. */ 334 rs->rs = *state; 335 336 rs->enable_vte = !state->bypass_vs_clip_and_viewport; 337 338#ifdef PIPE_ARCH_LITTLE_ENDIAN 339 rs->vap_control_status = R300_VC_NO_SWAP; 340#else 341 rs->vap_control_status = R300_VC_32BIT_SWAP; 342#endif 343 344 /* If bypassing TCL, or if no TCL engine is present, turn off the HW TCL. 345 * Else, enable HW TCL and force Draw's TCL off. */ 346 if (state->bypass_vs_clip_and_viewport || 347 !r300_screen(pipe->screen)->caps->has_tcl) { 348 rs->vap_control_status |= R300_VAP_TCL_BYPASS; 349 } else { 350 rs->rs.bypass_vs_clip_and_viewport = TRUE; 351 } 352 353 rs->point_size = pack_float_16_6x(state->point_size) | 354 (pack_float_16_6x(state->point_size) << R300_POINTSIZE_X_SHIFT); 355 356 rs->point_minmax = 357 ((int)(state->point_size_min * 6.0) << 358 R300_GA_POINT_MINMAX_MIN_SHIFT) | 359 ((int)(state->point_size_max * 6.0) << 360 R300_GA_POINT_MINMAX_MAX_SHIFT); 361 362 rs->line_control = pack_float_16_6x(state->line_width) | 363 R300_GA_LINE_CNTL_END_TYPE_COMP; 364 365 /* Radeons don't think in "CW/CCW", they think in "front/back". */ 366 if (state->front_winding == PIPE_WINDING_CW) { 367 rs->cull_mode = R300_FRONT_FACE_CW; 368 369 if (state->offset_cw) { 370 rs->polygon_offset_enable |= R300_FRONT_ENABLE; 371 } 372 if (state->offset_ccw) { 373 rs->polygon_offset_enable |= R300_BACK_ENABLE; 374 } 375 } else { 376 rs->cull_mode = R300_FRONT_FACE_CCW; 377 378 if (state->offset_ccw) { 379 rs->polygon_offset_enable |= R300_FRONT_ENABLE; 380 } 381 if (state->offset_cw) { 382 rs->polygon_offset_enable |= R300_BACK_ENABLE; 383 } 384 } 385 if (state->front_winding & state->cull_mode) { 386 rs->cull_mode |= R300_CULL_FRONT; 387 } 388 if (~(state->front_winding) & state->cull_mode) { 389 rs->cull_mode |= R300_CULL_BACK; 390 } 391 392 if (rs->polygon_offset_enable) { 393 rs->depth_offset_front = rs->depth_offset_back = 394 fui(state->offset_units); 395 rs->depth_scale_front = rs->depth_scale_back = 396 fui(state->offset_scale); 397 } 398 399 if (state->line_stipple_enable) { 400 rs->line_stipple_config = 401 R300_GA_LINE_STIPPLE_CONFIG_LINE_RESET_LINE | 402 (fui((float)state->line_stipple_factor) & 403 R300_GA_LINE_STIPPLE_CONFIG_STIPPLE_SCALE_MASK); 404 /* XXX this might need to be scaled up */ 405 rs->line_stipple_value = state->line_stipple_pattern; 406 } 407 408 if (state->flatshade) { 409 rs->color_control = R300_SHADE_MODEL_FLAT; 410 } else { 411 rs->color_control = R300_SHADE_MODEL_SMOOTH; 412 } 413 414 if (!state->flatshade_first) { 415 rs->color_control |= R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_LAST; 416 } 417 418 return (void*)rs; 419} 420 421/* Bind rasterizer state. */ 422static void r300_bind_rs_state(struct pipe_context* pipe, void* state) 423{ 424 struct r300_context* r300 = r300_context(pipe); 425 struct r300_rs_state* rs = (struct r300_rs_state*)state; 426 427 draw_flush(r300->draw); 428 draw_set_rasterizer_state(r300->draw, &rs->rs); 429 430 r300->rs_state = rs; 431 r300->dirty_state |= R300_NEW_RASTERIZER; 432 r300->dirty_state |= R300_NEW_SCISSOR; 433 r300->dirty_state |= R300_NEW_VIEWPORT; 434} 435 436/* Free rasterizer state. */ 437static void r300_delete_rs_state(struct pipe_context* pipe, void* state) 438{ 439 FREE(state); 440} 441 442static void* 443 r300_create_sampler_state(struct pipe_context* pipe, 444 const struct pipe_sampler_state* state) 445{ 446 struct r300_context* r300 = r300_context(pipe); 447 struct r300_sampler_state* sampler = CALLOC_STRUCT(r300_sampler_state); 448 int lod_bias; 449 450 sampler->filter0 |= 451 (r300_translate_wrap(state->wrap_s) << R300_TX_WRAP_S_SHIFT) | 452 (r300_translate_wrap(state->wrap_t) << R300_TX_WRAP_T_SHIFT) | 453 (r300_translate_wrap(state->wrap_r) << R300_TX_WRAP_R_SHIFT); 454 455 sampler->filter0 |= r300_translate_tex_filters(state->min_img_filter, 456 state->mag_img_filter, 457 state->min_mip_filter); 458 459 lod_bias = CLAMP((int)(state->lod_bias * 32), -(1 << 9), (1 << 9) - 1); 460 461 sampler->filter1 |= lod_bias << R300_LOD_BIAS_SHIFT; 462 463 sampler->filter1 |= r300_anisotropy(state->max_anisotropy); 464 465 util_pack_color(state->border_color, PIPE_FORMAT_A8R8G8B8_UNORM, 466 &sampler->border_color); 467 468 /* R500-specific fixups and optimizations */ 469 if (r300_screen(r300->context.screen)->caps->is_r500) { 470 sampler->filter1 |= R500_BORDER_FIX; 471 } 472 473 return (void*)sampler; 474} 475 476static void r300_bind_sampler_states(struct pipe_context* pipe, 477 unsigned count, 478 void** states) 479{ 480 struct r300_context* r300 = r300_context(pipe); 481 int i; 482 483 if (count > 8) { 484 return; 485 } 486 487 for (i = 0; i < count; i++) { 488 if (r300->sampler_states[i] != states[i]) { 489 r300->sampler_states[i] = (struct r300_sampler_state*)states[i]; 490 r300->dirty_state |= (R300_NEW_SAMPLER << i); 491 } 492 } 493 494 r300->sampler_count = count; 495} 496 497static void r300_delete_sampler_state(struct pipe_context* pipe, void* state) 498{ 499 FREE(state); 500} 501 502static void r300_set_sampler_textures(struct pipe_context* pipe, 503 unsigned count, 504 struct pipe_texture** texture) 505{ 506 struct r300_context* r300 = r300_context(pipe); 507 int i; 508 509 /* XXX magic num */ 510 if (count > 8) { 511 return; 512 } 513 514 for (i = 0; i < count; i++) { 515 if (r300->textures[i] != (struct r300_texture*)texture[i]) { 516 pipe_texture_reference((struct pipe_texture**)&r300->textures[i], 517 texture[i]); 518 r300->dirty_state |= (R300_NEW_TEXTURE << i); 519 } 520 } 521 522 for (i = count; i < 8; i++) { 523 if (r300->textures[i]) { 524 pipe_texture_reference((struct pipe_texture**)&r300->textures[i], 525 NULL); 526 r300->dirty_state |= (R300_NEW_TEXTURE << i); 527 } 528 } 529 530 r300->texture_count = count; 531} 532 533static void r300_set_scissor_state(struct pipe_context* pipe, 534 const struct pipe_scissor_state* state) 535{ 536 struct r300_context* r300 = r300_context(pipe); 537 538 if (r300_screen(r300->context.screen)->caps->is_r500) { 539 r300->scissor_state->scissor_top_left = 540 (state->minx << R300_SCISSORS_X_SHIFT) | 541 (state->miny << R300_SCISSORS_Y_SHIFT); 542 r300->scissor_state->scissor_bottom_right = 543 ((state->maxx - 1) << R300_SCISSORS_X_SHIFT) | 544 ((state->maxy - 1) << R300_SCISSORS_Y_SHIFT); 545 } else { 546 /* Offset of 1440 in non-R500 chipsets. */ 547 r300->scissor_state->scissor_top_left = 548 ((state->minx + 1440) << R300_SCISSORS_X_SHIFT) | 549 ((state->miny + 1440) << R300_SCISSORS_Y_SHIFT); 550 r300->scissor_state->scissor_bottom_right = 551 (((state->maxx - 1) + 1440) << R300_SCISSORS_X_SHIFT) | 552 (((state->maxy - 1) + 1440) << R300_SCISSORS_Y_SHIFT); 553 } 554 555 r300->dirty_state |= R300_NEW_SCISSOR; 556} 557 558static void r300_set_viewport_state(struct pipe_context* pipe, 559 const struct pipe_viewport_state* state) 560{ 561 struct r300_context* r300 = r300_context(pipe); 562 563 /* Do the transform in HW. */ 564 r300->viewport_state->vte_control = R300_VTX_W0_FMT; 565 566 if (state->scale[0] != 1.0f) { 567 assert(state->scale[0] != 0.0f); 568 r300->viewport_state->xscale = state->scale[0]; 569 r300->viewport_state->vte_control |= R300_VPORT_X_SCALE_ENA; 570 } 571 if (state->scale[1] != 1.0f) { 572 assert(state->scale[1] != 0.0f); 573 r300->viewport_state->yscale = state->scale[1]; 574 r300->viewport_state->vte_control |= R300_VPORT_Y_SCALE_ENA; 575 } 576 if (state->scale[2] != 1.0f) { 577 assert(state->scale[2] != 0.0f); 578 r300->viewport_state->zscale = state->scale[2]; 579 r300->viewport_state->vte_control |= R300_VPORT_Z_SCALE_ENA; 580 } 581 if (state->translate[0] != 0.0f) { 582 r300->viewport_state->xoffset = state->translate[0]; 583 r300->viewport_state->vte_control |= R300_VPORT_X_OFFSET_ENA; 584 } 585 if (state->translate[1] != 0.0f) { 586 r300->viewport_state->yoffset = state->translate[1]; 587 r300->viewport_state->vte_control |= R300_VPORT_Y_OFFSET_ENA; 588 } 589 if (state->translate[2] != 0.0f) { 590 r300->viewport_state->zoffset = state->translate[2]; 591 r300->viewport_state->vte_control |= R300_VPORT_Z_OFFSET_ENA; 592 } 593 594 r300->dirty_state |= R300_NEW_VIEWPORT; 595} 596 597static void r300_set_vertex_buffers(struct pipe_context* pipe, 598 unsigned count, 599 const struct pipe_vertex_buffer* buffers) 600{ 601 struct r300_context* r300 = r300_context(pipe); 602 603 memcpy(r300->vertex_buffers, buffers, 604 sizeof(struct pipe_vertex_buffer) * count); 605 606 r300->vertex_buffer_count = count; 607 608 draw_flush(r300->draw); 609 draw_set_vertex_buffers(r300->draw, count, buffers); 610} 611 612static void r300_set_vertex_elements(struct pipe_context* pipe, 613 unsigned count, 614 const struct pipe_vertex_element* elements) 615{ 616 struct r300_context* r300 = r300_context(pipe); 617 618 draw_flush(r300->draw); 619 draw_set_vertex_elements(r300->draw, count, elements); 620} 621 622static void* r300_create_vs_state(struct pipe_context* pipe, 623 const struct pipe_shader_state* shader) 624{ 625 struct r300_context* r300 = r300_context(pipe); 626 627 if (r300_screen(pipe->screen)->caps->has_tcl) { 628 struct r300_vertex_shader* vs = CALLOC_STRUCT(r300_vertex_shader); 629 /* Copy state directly into shader. */ 630 vs->state = *shader; 631 vs->state.tokens = tgsi_dup_tokens(shader->tokens); 632 633 tgsi_scan_shader(shader->tokens, &vs->info); 634 635 /* Appease Draw. */ 636 vs->draw = draw_create_vertex_shader(r300->draw, shader); 637 638 return (void*)vs; 639 } else { 640 return draw_create_vertex_shader(r300->draw, shader); 641 } 642} 643 644static void r300_bind_vs_state(struct pipe_context* pipe, void* shader) 645{ 646 struct r300_context* r300 = r300_context(pipe); 647 648 draw_flush(r300->draw); 649 650 if (r300_screen(pipe->screen)->caps->has_tcl) { 651 struct r300_vertex_shader* vs = (struct r300_vertex_shader*)shader; 652 653 if (vs == NULL) { 654 r300->vs = NULL; 655 return; 656 } else if (!vs->translated) { 657 r300_translate_vertex_shader(r300, vs); 658 } 659 660 draw_bind_vertex_shader(r300->draw, vs->draw); 661 r300->vs = vs; 662 r300->dirty_state |= R300_NEW_VERTEX_SHADER; 663 } else { 664 draw_bind_vertex_shader(r300->draw, 665 (struct draw_vertex_shader*)shader); 666 } 667} 668 669static void r300_delete_vs_state(struct pipe_context* pipe, void* shader) 670{ 671 struct r300_context* r300 = r300_context(pipe); 672 673 if (r300_screen(pipe->screen)->caps->has_tcl) { 674 struct r300_vertex_shader* vs = (struct r300_vertex_shader*)shader; 675 676 rc_constants_destroy(&vs->code.constants); 677 draw_delete_vertex_shader(r300->draw, vs->draw); 678 FREE(vs->state.tokens); 679 FREE(shader); 680 } else { 681 draw_delete_vertex_shader(r300->draw, 682 (struct draw_vertex_shader*)shader); 683 } 684} 685 686void r300_init_state_functions(struct r300_context* r300) 687{ 688 r300->context.create_blend_state = r300_create_blend_state; 689 r300->context.bind_blend_state = r300_bind_blend_state; 690 r300->context.delete_blend_state = r300_delete_blend_state; 691 692 r300->context.set_blend_color = r300_set_blend_color; 693 694 r300->context.set_clip_state = r300_set_clip_state; 695 696 r300->context.set_constant_buffer = r300_set_constant_buffer; 697 698 r300->context.create_depth_stencil_alpha_state = r300_create_dsa_state; 699 r300->context.bind_depth_stencil_alpha_state = r300_bind_dsa_state; 700 r300->context.delete_depth_stencil_alpha_state = r300_delete_dsa_state; 701 702 r300->context.set_edgeflags = r300_set_edgeflags; 703 704 r300->context.set_framebuffer_state = r300_set_framebuffer_state; 705 706 r300->context.create_fs_state = r300_create_fs_state; 707 r300->context.bind_fs_state = r300_bind_fs_state; 708 r300->context.delete_fs_state = r300_delete_fs_state; 709 710 r300->context.set_polygon_stipple = r300_set_polygon_stipple; 711 712 r300->context.create_rasterizer_state = r300_create_rs_state; 713 r300->context.bind_rasterizer_state = r300_bind_rs_state; 714 r300->context.delete_rasterizer_state = r300_delete_rs_state; 715 716 r300->context.create_sampler_state = r300_create_sampler_state; 717 r300->context.bind_sampler_states = r300_bind_sampler_states; 718 r300->context.delete_sampler_state = r300_delete_sampler_state; 719 720 r300->context.set_sampler_textures = r300_set_sampler_textures; 721 722 r300->context.set_scissor_state = r300_set_scissor_state; 723 724 r300->context.set_viewport_state = r300_set_viewport_state; 725 726 r300->context.set_vertex_buffers = r300_set_vertex_buffers; 727 r300->context.set_vertex_elements = r300_set_vertex_elements; 728 729 r300->context.create_vs_state = r300_create_vs_state; 730 r300->context.bind_vs_state = r300_bind_vs_state; 731 r300->context.delete_vs_state = r300_delete_vs_state; 732} 733