r300_state.c revision c1bee7bdea470b6b5dcebef9aacc8fe4feca687c
1/*
2 * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE. */
22
23#include "util/u_debug.h"
24#include "util/u_math.h"
25#include "util/u_pack_color.h"
26
27#include "tgsi/tgsi_parse.h"
28
29#include "pipe/p_config.h"
30#include "pipe/internal/p_winsys_screen.h"
31
32#include "r300_context.h"
33#include "r300_reg.h"
34#include "r300_state_inlines.h"
35#include "r300_fs.h"
36#include "r300_vs.h"
37
38/* r300_state: Functions used to intialize state context by translating
39 * Gallium state objects into semi-native r300 state objects. */
40
41/* Create a new blend state based on the CSO blend state.
42 *
43 * This encompasses alpha blending, logic/raster ops, and blend dithering. */
44static void* r300_create_blend_state(struct pipe_context* pipe,
45                                     const struct pipe_blend_state* state)
46{
47    struct r300_blend_state* blend = CALLOC_STRUCT(r300_blend_state);
48
49    {
50	unsigned eqRGB = state->rgb_func;
51	unsigned srcRGB = state->rgb_src_factor;
52	unsigned dstRGB = state->rgb_dst_factor;
53
54	unsigned eqA = state->alpha_func;
55	unsigned srcA = state->alpha_src_factor;
56	unsigned dstA = state->alpha_dst_factor;
57
58	if (srcA != srcRGB ||
59	    dstA != dstRGB ||
60	    eqA != eqRGB) {
61	    blend->alpha_blend_control =
62		r300_translate_blend_function(eqA) |
63		(r300_translate_blend_factor(srcA) <<
64                    R300_SRC_BLEND_SHIFT) |
65                (r300_translate_blend_factor(dstA) <<
66		 R300_DST_BLEND_SHIFT);
67	    blend->blend_control |= R300_ALPHA_BLEND_ENABLE |
68		R300_SEPARATE_ALPHA_ENABLE;
69	} else {
70	    blend->alpha_blend_control = R300_COMB_FCN_ADD_CLAMP |
71		(R300_BLEND_GL_ONE << R300_SRC_BLEND_SHIFT) |
72		(R300_BLEND_GL_ZERO << R300_DST_BLEND_SHIFT);
73	}
74    }
75    if (state->blend_enable) {
76        /* XXX for now, always do separate alpha...
77         * is it faster to do it with one reg? */
78        blend->blend_control |= R300_READ_ENABLE |
79                r300_translate_blend_function(state->rgb_func) |
80                (r300_translate_blend_factor(state->rgb_src_factor) <<
81                    R300_SRC_BLEND_SHIFT) |
82                (r300_translate_blend_factor(state->rgb_dst_factor) <<
83                    R300_DST_BLEND_SHIFT);
84    } else {
85	blend->blend_control =
86	    R300_COMB_FCN_ADD_CLAMP |
87	    (R300_BLEND_GL_ONE << R300_SRC_BLEND_SHIFT) |
88	    (R300_BLEND_GL_ZERO << R300_DST_BLEND_SHIFT);
89    }
90
91    /* PIPE_LOGICOP_* don't need to be translated, fortunately. */
92    if (state->logicop_enable) {
93        blend->rop = R300_RB3D_ROPCNTL_ROP_ENABLE |
94                (state->logicop_func) << R300_RB3D_ROPCNTL_ROP_SHIFT;
95    }
96
97    if (state->dither) {
98        blend->dither = R300_RB3D_DITHER_CTL_DITHER_MODE_LUT |
99                R300_RB3D_DITHER_CTL_ALPHA_DITHER_MODE_LUT;
100    }
101
102    return (void*)blend;
103}
104
105/* Bind blend state. */
106static void r300_bind_blend_state(struct pipe_context* pipe,
107                                  void* state)
108{
109    struct r300_context* r300 = r300_context(pipe);
110
111    r300->blend_state = (struct r300_blend_state*)state;
112    r300->dirty_state |= R300_NEW_BLEND;
113}
114
115/* Free blend state. */
116static void r300_delete_blend_state(struct pipe_context* pipe,
117                                    void* state)
118{
119    FREE(state);
120}
121
122/* Set blend color.
123 * Setup both R300 and R500 registers, figure out later which one to write. */
124static void r300_set_blend_color(struct pipe_context* pipe,
125                                 const struct pipe_blend_color* color)
126{
127    struct r300_context* r300 = r300_context(pipe);
128    ubyte ur, ug, ub, ua;
129
130    ur = float_to_ubyte(color->color[0]);
131    ug = float_to_ubyte(color->color[1]);
132    ub = float_to_ubyte(color->color[2]);
133    ua = float_to_ubyte(color->color[3]);
134
135    util_pack_color(color->color, PIPE_FORMAT_A8R8G8B8_UNORM,
136            &r300->blend_color_state->blend_color);
137
138    /* XXX this is wrong */
139    r300->blend_color_state->blend_color_red_alpha = ur | (ua << 16);
140    r300->blend_color_state->blend_color_green_blue = ub | (ug << 16);
141
142    r300->dirty_state |= R300_NEW_BLEND_COLOR;
143}
144
145static void r300_set_clip_state(struct pipe_context* pipe,
146                                const struct pipe_clip_state* state)
147{
148    struct r300_context* r300 = r300_context(pipe);
149
150    if (r300_screen(pipe->screen)->caps->has_tcl) {
151        r300->clip_state = *state;
152        r300->dirty_state |= R300_NEW_CLIP;
153    } else {
154        draw_flush(r300->draw);
155        draw_set_clip_state(r300->draw, state);
156    }
157}
158
159static void
160    r300_set_constant_buffer(struct pipe_context* pipe,
161                             uint shader, uint index,
162                             const struct pipe_constant_buffer* buffer)
163{
164    struct r300_context* r300 = r300_context(pipe);
165
166    /* This entire chunk of code seems ever-so-slightly baked.
167     * It's as if I've got pipe_buffer* matryoshkas... */
168    if (buffer && buffer->buffer && buffer->buffer->size) {
169        void* map = pipe->winsys->buffer_map(pipe->winsys, buffer->buffer,
170                                             PIPE_BUFFER_USAGE_CPU_READ);
171        memcpy(r300->shader_constants[shader].constants,
172            map, buffer->buffer->size);
173        pipe->winsys->buffer_unmap(pipe->winsys, buffer->buffer);
174
175        r300->shader_constants[shader].count =
176            buffer->buffer->size / (sizeof(float) * 4);
177    } else {
178        r300->shader_constants[shader].count = 0;
179    }
180
181    r300->dirty_state |= R300_NEW_CONSTANTS;
182}
183
184/* Create a new depth, stencil, and alpha state based on the CSO dsa state.
185 *
186 * This contains the depth buffer, stencil buffer, alpha test, and such.
187 * On the Radeon, depth and stencil buffer setup are intertwined, which is
188 * the reason for some of the strange-looking assignments across registers. */
189static void*
190        r300_create_dsa_state(struct pipe_context* pipe,
191                              const struct pipe_depth_stencil_alpha_state* state)
192{
193    struct r300_context* r300 = r300_context(pipe);
194    struct r300_dsa_state* dsa = CALLOC_STRUCT(r300_dsa_state);
195
196    /* Depth test setup. */
197    if (state->depth.enabled) {
198        dsa->z_buffer_control |= R300_Z_ENABLE;
199
200        if (state->depth.writemask) {
201            dsa->z_buffer_control |= R300_Z_WRITE_ENABLE;
202        }
203
204        dsa->z_stencil_control |=
205            (r300_translate_depth_stencil_function(state->depth.func) <<
206                R300_Z_FUNC_SHIFT);
207    }
208
209    /* Stencil buffer setup. */
210    if (state->stencil[0].enabled) {
211        dsa->z_buffer_control |= R300_STENCIL_ENABLE;
212        dsa->z_stencil_control |=
213            (r300_translate_depth_stencil_function(state->stencil[0].func) <<
214                R300_S_FRONT_FUNC_SHIFT) |
215            (r300_translate_stencil_op(state->stencil[0].fail_op) <<
216                R300_S_FRONT_SFAIL_OP_SHIFT) |
217            (r300_translate_stencil_op(state->stencil[0].zpass_op) <<
218                R300_S_FRONT_ZPASS_OP_SHIFT) |
219            (r300_translate_stencil_op(state->stencil[0].zfail_op) <<
220                R300_S_FRONT_ZFAIL_OP_SHIFT);
221
222        dsa->stencil_ref_mask = (state->stencil[0].ref_value) |
223                (state->stencil[0].valuemask << R300_STENCILMASK_SHIFT) |
224                (state->stencil[0].writemask << R300_STENCILWRITEMASK_SHIFT);
225
226        if (state->stencil[1].enabled) {
227            dsa->z_buffer_control |= R300_STENCIL_FRONT_BACK;
228            dsa->z_stencil_control |=
229            (r300_translate_depth_stencil_function(state->stencil[1].func) <<
230                R300_S_BACK_FUNC_SHIFT) |
231            (r300_translate_stencil_op(state->stencil[1].fail_op) <<
232                R300_S_BACK_SFAIL_OP_SHIFT) |
233            (r300_translate_stencil_op(state->stencil[1].zpass_op) <<
234                R300_S_BACK_ZPASS_OP_SHIFT) |
235            (r300_translate_stencil_op(state->stencil[1].zfail_op) <<
236                R300_S_BACK_ZFAIL_OP_SHIFT);
237
238            dsa->stencil_ref_bf = (state->stencil[1].ref_value) |
239                (state->stencil[1].valuemask << R300_STENCILMASK_SHIFT) |
240                (state->stencil[1].writemask << R300_STENCILWRITEMASK_SHIFT);
241        }
242    }
243
244    /* Alpha test setup. */
245    if (state->alpha.enabled) {
246        dsa->alpha_function =
247            r300_translate_alpha_function(state->alpha.func) |
248            R300_FG_ALPHA_FUNC_ENABLE;
249        dsa->alpha_reference = CLAMP(state->alpha.ref_value * 1023.0f,
250                                     0, 1023);
251    }
252
253    dsa->z_buffer_top = R300_ZTOP_ENABLE;
254    /* XXX TODO: add frag prog rules for ztop disable */
255    if (state->alpha.enabled && state->alpha.func != PIPE_FUNC_ALWAYS)
256	dsa->z_buffer_top = R300_ZTOP_DISABLE;
257    if (!is_empty_list(&r300->query_list))
258	dsa->z_buffer_top = R300_ZTOP_DISABLE;
259
260    return (void*)dsa;
261}
262
263/* Bind DSA state. */
264static void r300_bind_dsa_state(struct pipe_context* pipe,
265                                void* state)
266{
267    struct r300_context* r300 = r300_context(pipe);
268
269    r300->dsa_state = (struct r300_dsa_state*)state;
270    r300->dirty_state |= R300_NEW_DSA;
271}
272
273/* Free DSA state. */
274static void r300_delete_dsa_state(struct pipe_context* pipe,
275                                  void* state)
276{
277    FREE(state);
278}
279
280static void r300_set_edgeflags(struct pipe_context* pipe,
281                               const unsigned* bitfield)
282{
283    /* XXX you know it's bad when i915 has this blank too */
284    /* XXX and even worse, I have no idea WTF the bitfield is */
285}
286
287static void
288    r300_set_framebuffer_state(struct pipe_context* pipe,
289                               const struct pipe_framebuffer_state* state)
290{
291    struct r300_context* r300 = r300_context(pipe);
292
293    draw_flush(r300->draw);
294
295    r300->framebuffer_state = *state;
296
297    r300->dirty_state |= R300_NEW_FRAMEBUFFERS;
298}
299
300/* Create fragment shader state. */
301static void* r300_create_fs_state(struct pipe_context* pipe,
302                                  const struct pipe_shader_state* shader)
303{
304    struct r300_fragment_shader* fs = NULL;
305
306    fs = (struct r300_fragment_shader*)CALLOC_STRUCT(r300_fragment_shader);
307
308    /* Copy state directly into shader. */
309    fs->state = *shader;
310    fs->state.tokens = tgsi_dup_tokens(shader->tokens);
311
312    tgsi_scan_shader(shader->tokens, &fs->info);
313
314    return (void*)fs;
315}
316
317/* Bind fragment shader state. */
318static void r300_bind_fs_state(struct pipe_context* pipe, void* shader)
319{
320    struct r300_context* r300 = r300_context(pipe);
321    struct r300_fragment_shader* fs = (struct r300_fragment_shader*)shader;
322
323    if (fs == NULL) {
324        r300->fs = NULL;
325        return;
326    } else if (!fs->translated) {
327        r300_translate_fragment_shader(r300, fs);
328    }
329
330    r300->fs = fs;
331
332    r300->dirty_state |= R300_NEW_FRAGMENT_SHADER;
333}
334
335/* Delete fragment shader state. */
336static void r300_delete_fs_state(struct pipe_context* pipe, void* shader)
337{
338    struct r300_fragment_shader* fs = (struct r300_fragment_shader*)shader;
339    rc_constants_destroy(&fs->code.constants);
340    FREE(fs->state.tokens);
341    FREE(shader);
342}
343
344static void r300_set_polygon_stipple(struct pipe_context* pipe,
345                                     const struct pipe_poly_stipple* state)
346{
347    /* XXX no idea how to set this up, but not terribly important */
348}
349
350/* Create a new rasterizer state based on the CSO rasterizer state.
351 *
352 * This is a very large chunk of state, and covers most of the graphics
353 * backend (GB), geometry assembly (GA), and setup unit (SU) blocks.
354 *
355 * In a not entirely unironic sidenote, this state has nearly nothing to do
356 * with the actual block on the Radeon called the rasterizer (RS). */
357static void* r300_create_rs_state(struct pipe_context* pipe,
358                                  const struct pipe_rasterizer_state* state)
359{
360    struct r300_rs_state* rs = CALLOC_STRUCT(r300_rs_state);
361
362    /* Copy rasterizer state for Draw. */
363    rs->rs = *state;
364
365    rs->enable_vte = !state->bypass_vs_clip_and_viewport;
366
367#ifdef PIPE_ARCH_LITTLE_ENDIAN
368    rs->vap_control_status = R300_VC_NO_SWAP;
369#else
370    rs->vap_control_status = R300_VC_32BIT_SWAP;
371#endif
372
373    /* If bypassing TCL, or if no TCL engine is present, turn off the HW TCL.
374     * Else, enable HW TCL and force Draw's TCL off. */
375    if (state->bypass_vs_clip_and_viewport ||
376            !r300_screen(pipe->screen)->caps->has_tcl) {
377        rs->vap_control_status |= R300_VAP_TCL_BYPASS;
378    } else {
379        rs->rs.bypass_vs_clip_and_viewport = TRUE;
380    }
381
382    rs->point_size = pack_float_16_6x(state->point_size) |
383        (pack_float_16_6x(state->point_size) << R300_POINTSIZE_X_SHIFT);
384
385    rs->point_minmax =
386        ((int)(state->point_size_min * 6.0) <<
387         R300_GA_POINT_MINMAX_MIN_SHIFT) |
388        ((int)(state->point_size_max * 6.0) <<
389         R300_GA_POINT_MINMAX_MAX_SHIFT);
390
391    rs->line_control = pack_float_16_6x(state->line_width) |
392        R300_GA_LINE_CNTL_END_TYPE_COMP;
393
394    /* Radeons don't think in "CW/CCW", they think in "front/back". */
395    if (state->front_winding == PIPE_WINDING_CW) {
396        rs->cull_mode = R300_FRONT_FACE_CW;
397
398        if (state->offset_cw) {
399            rs->polygon_offset_enable |= R300_FRONT_ENABLE;
400        }
401        if (state->offset_ccw) {
402            rs->polygon_offset_enable |= R300_BACK_ENABLE;
403        }
404    } else {
405        rs->cull_mode = R300_FRONT_FACE_CCW;
406
407        if (state->offset_ccw) {
408            rs->polygon_offset_enable |= R300_FRONT_ENABLE;
409        }
410        if (state->offset_cw) {
411            rs->polygon_offset_enable |= R300_BACK_ENABLE;
412        }
413    }
414    if (state->front_winding & state->cull_mode) {
415        rs->cull_mode |= R300_CULL_FRONT;
416    }
417    if (~(state->front_winding) & state->cull_mode) {
418        rs->cull_mode |= R300_CULL_BACK;
419    }
420
421    if (rs->polygon_offset_enable) {
422        rs->depth_offset_front = rs->depth_offset_back =
423            fui(state->offset_units);
424        rs->depth_scale_front = rs->depth_scale_back =
425            fui(state->offset_scale);
426    }
427
428    if (state->line_stipple_enable) {
429        rs->line_stipple_config =
430            R300_GA_LINE_STIPPLE_CONFIG_LINE_RESET_LINE |
431            (fui((float)state->line_stipple_factor) &
432                R300_GA_LINE_STIPPLE_CONFIG_STIPPLE_SCALE_MASK);
433        /* XXX this might need to be scaled up */
434        rs->line_stipple_value = state->line_stipple_pattern;
435    }
436
437    if (state->flatshade) {
438        rs->color_control = R300_SHADE_MODEL_FLAT;
439    } else {
440        rs->color_control = R300_SHADE_MODEL_SMOOTH;
441    }
442
443    if (!state->flatshade_first) {
444        rs->color_control |= R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_LAST;
445    }
446
447    return (void*)rs;
448}
449
450/* Bind rasterizer state. */
451static void r300_bind_rs_state(struct pipe_context* pipe, void* state)
452{
453    struct r300_context* r300 = r300_context(pipe);
454    struct r300_rs_state* rs = (struct r300_rs_state*)state;
455
456    draw_flush(r300->draw);
457    draw_set_rasterizer_state(r300->draw, &rs->rs);
458
459    r300->rs_state = rs;
460    r300->dirty_state |= R300_NEW_RASTERIZER;
461    r300->dirty_state |= R300_NEW_RS_BLOCK;
462    r300->dirty_state |= R300_NEW_SCISSOR;
463    r300->dirty_state |= R300_NEW_VIEWPORT;
464}
465
466/* Free rasterizer state. */
467static void r300_delete_rs_state(struct pipe_context* pipe, void* state)
468{
469    FREE(state);
470}
471
472static void*
473        r300_create_sampler_state(struct pipe_context* pipe,
474                                  const struct pipe_sampler_state* state)
475{
476    struct r300_context* r300 = r300_context(pipe);
477    struct r300_sampler_state* sampler = CALLOC_STRUCT(r300_sampler_state);
478    int lod_bias;
479
480    sampler->filter0 |=
481        (r300_translate_wrap(state->wrap_s) << R300_TX_WRAP_S_SHIFT) |
482        (r300_translate_wrap(state->wrap_t) << R300_TX_WRAP_T_SHIFT) |
483        (r300_translate_wrap(state->wrap_r) << R300_TX_WRAP_R_SHIFT);
484
485    sampler->filter0 |= r300_translate_tex_filters(state->min_img_filter,
486                                                   state->mag_img_filter,
487                                                   state->min_mip_filter);
488
489    lod_bias = CLAMP((int)(state->lod_bias * 32), -(1 << 9), (1 << 9) - 1);
490
491    sampler->filter1 |= lod_bias << R300_LOD_BIAS_SHIFT;
492
493    sampler->filter1 |= r300_anisotropy(state->max_anisotropy);
494
495    util_pack_color(state->border_color, PIPE_FORMAT_A8R8G8B8_UNORM,
496                    &sampler->border_color);
497
498    /* R500-specific fixups and optimizations */
499    if (r300_screen(r300->context.screen)->caps->is_r500) {
500        sampler->filter1 |= R500_BORDER_FIX;
501    }
502
503    return (void*)sampler;
504}
505
506static void r300_bind_sampler_states(struct pipe_context* pipe,
507                                     unsigned count,
508                                     void** states)
509{
510    struct r300_context* r300 = r300_context(pipe);
511    int i;
512
513    if (count > 8) {
514        return;
515    }
516
517    for (i = 0; i < count; i++) {
518        if (r300->sampler_states[i] != states[i]) {
519            r300->sampler_states[i] = (struct r300_sampler_state*)states[i];
520            r300->dirty_state |= (R300_NEW_SAMPLER << i);
521        }
522    }
523
524    r300->sampler_count = count;
525}
526
527static void r300_delete_sampler_state(struct pipe_context* pipe, void* state)
528{
529    FREE(state);
530}
531
532static void r300_set_sampler_textures(struct pipe_context* pipe,
533                                      unsigned count,
534                                      struct pipe_texture** texture)
535{
536    struct r300_context* r300 = r300_context(pipe);
537    int i;
538
539    /* XXX magic num */
540    if (count > 8) {
541        return;
542    }
543
544    for (i = 0; i < count; i++) {
545        if (r300->textures[i] != (struct r300_texture*)texture[i]) {
546            pipe_texture_reference((struct pipe_texture**)&r300->textures[i],
547                texture[i]);
548            r300->dirty_state |= (R300_NEW_TEXTURE << i);
549        }
550    }
551
552    for (i = count; i < 8; i++) {
553        if (r300->textures[i]) {
554            pipe_texture_reference((struct pipe_texture**)&r300->textures[i],
555                NULL);
556            r300->dirty_state |= (R300_NEW_TEXTURE << i);
557        }
558    }
559
560    r300->texture_count = count;
561}
562
563static void r300_set_scissor_state(struct pipe_context* pipe,
564                                   const struct pipe_scissor_state* state)
565{
566    struct r300_context* r300 = r300_context(pipe);
567
568    if (r300_screen(r300->context.screen)->caps->is_r500) {
569        r300->scissor_state->scissor_top_left =
570            (state->minx << R300_SCISSORS_X_SHIFT) |
571            (state->miny << R300_SCISSORS_Y_SHIFT);
572        r300->scissor_state->scissor_bottom_right =
573            ((state->maxx - 1) << R300_SCISSORS_X_SHIFT) |
574            ((state->maxy - 1) << R300_SCISSORS_Y_SHIFT);
575    } else {
576        /* Offset of 1440 in non-R500 chipsets. */
577        r300->scissor_state->scissor_top_left =
578            ((state->minx + 1440) << R300_SCISSORS_X_SHIFT) |
579            ((state->miny + 1440) << R300_SCISSORS_Y_SHIFT);
580        r300->scissor_state->scissor_bottom_right =
581            (((state->maxx - 1) + 1440) << R300_SCISSORS_X_SHIFT) |
582            (((state->maxy - 1) + 1440) << R300_SCISSORS_Y_SHIFT);
583    }
584
585    r300->dirty_state |= R300_NEW_SCISSOR;
586}
587
588static void r300_set_viewport_state(struct pipe_context* pipe,
589                                    const struct pipe_viewport_state* state)
590{
591    struct r300_context* r300 = r300_context(pipe);
592
593    /* Do the transform in HW. */
594    r300->viewport_state->vte_control = R300_VTX_W0_FMT;
595
596    if (state->scale[0] != 1.0f) {
597        assert(state->scale[0] != 0.0f);
598        r300->viewport_state->xscale = state->scale[0];
599        r300->viewport_state->vte_control |= R300_VPORT_X_SCALE_ENA;
600    }
601    if (state->scale[1] != 1.0f) {
602        assert(state->scale[1] != 0.0f);
603        r300->viewport_state->yscale = state->scale[1];
604        r300->viewport_state->vte_control |= R300_VPORT_Y_SCALE_ENA;
605    }
606    if (state->scale[2] != 1.0f) {
607        assert(state->scale[2] != 0.0f);
608        r300->viewport_state->zscale = state->scale[2];
609        r300->viewport_state->vte_control |= R300_VPORT_Z_SCALE_ENA;
610    }
611    if (state->translate[0] != 0.0f) {
612        r300->viewport_state->xoffset = state->translate[0];
613        r300->viewport_state->vte_control |= R300_VPORT_X_OFFSET_ENA;
614    }
615    if (state->translate[1] != 0.0f) {
616        r300->viewport_state->yoffset = state->translate[1];
617        r300->viewport_state->vte_control |= R300_VPORT_Y_OFFSET_ENA;
618    }
619    if (state->translate[2] != 0.0f) {
620        r300->viewport_state->zoffset = state->translate[2];
621        r300->viewport_state->vte_control |= R300_VPORT_Z_OFFSET_ENA;
622    }
623
624    r300->dirty_state |= R300_NEW_VIEWPORT;
625}
626
627static void r300_set_vertex_buffers(struct pipe_context* pipe,
628                                    unsigned count,
629                                    const struct pipe_vertex_buffer* buffers)
630{
631    struct r300_context* r300 = r300_context(pipe);
632
633    memcpy(r300->vertex_buffers, buffers,
634        sizeof(struct pipe_vertex_buffer) * count);
635
636    r300->vertex_buffer_count = count;
637
638    draw_flush(r300->draw);
639    draw_set_vertex_buffers(r300->draw, count, buffers);
640}
641
642static void r300_set_vertex_elements(struct pipe_context* pipe,
643                                    unsigned count,
644                                    const struct pipe_vertex_element* elements)
645{
646    struct r300_context* r300 = r300_context(pipe);
647
648    draw_flush(r300->draw);
649    draw_set_vertex_elements(r300->draw, count, elements);
650}
651
652static void* r300_create_vs_state(struct pipe_context* pipe,
653                                  const struct pipe_shader_state* shader)
654{
655    struct r300_context* r300 = r300_context(pipe);
656
657    if (r300_screen(pipe->screen)->caps->has_tcl) {
658        struct r300_vertex_shader* vs = CALLOC_STRUCT(r300_vertex_shader);
659        /* Copy state directly into shader. */
660        vs->state = *shader;
661        vs->state.tokens = tgsi_dup_tokens(shader->tokens);
662
663        tgsi_scan_shader(shader->tokens, &vs->info);
664
665        /* Appease Draw. */
666        vs->draw = draw_create_vertex_shader(r300->draw, shader);
667
668        return (void*)vs;
669    } else {
670        return draw_create_vertex_shader(r300->draw, shader);
671    }
672}
673
674static void r300_bind_vs_state(struct pipe_context* pipe, void* shader)
675{
676    struct r300_context* r300 = r300_context(pipe);
677
678    draw_flush(r300->draw);
679
680    if (r300_screen(pipe->screen)->caps->has_tcl) {
681        struct r300_vertex_shader* vs = (struct r300_vertex_shader*)shader;
682
683        if (vs == NULL) {
684            r300->vs = NULL;
685            return;
686        } else if (!vs->translated) {
687            r300_translate_vertex_shader(r300, vs);
688        }
689
690        draw_bind_vertex_shader(r300->draw, vs->draw);
691        r300->vs = vs;
692        r300->dirty_state |= R300_NEW_VERTEX_SHADER;
693    } else {
694        draw_bind_vertex_shader(r300->draw,
695                (struct draw_vertex_shader*)shader);
696    }
697}
698
699static void r300_delete_vs_state(struct pipe_context* pipe, void* shader)
700{
701    struct r300_context* r300 = r300_context(pipe);
702
703    if (r300_screen(pipe->screen)->caps->has_tcl) {
704        struct r300_vertex_shader* vs = (struct r300_vertex_shader*)shader;
705
706        rc_constants_destroy(&vs->code.constants);
707        draw_delete_vertex_shader(r300->draw, vs->draw);
708        FREE(vs->state.tokens);
709        FREE(shader);
710    } else {
711        draw_delete_vertex_shader(r300->draw,
712                (struct draw_vertex_shader*)shader);
713    }
714}
715
716void r300_init_state_functions(struct r300_context* r300)
717{
718    r300->context.create_blend_state = r300_create_blend_state;
719    r300->context.bind_blend_state = r300_bind_blend_state;
720    r300->context.delete_blend_state = r300_delete_blend_state;
721
722    r300->context.set_blend_color = r300_set_blend_color;
723
724    r300->context.set_clip_state = r300_set_clip_state;
725
726    r300->context.set_constant_buffer = r300_set_constant_buffer;
727
728    r300->context.create_depth_stencil_alpha_state = r300_create_dsa_state;
729    r300->context.bind_depth_stencil_alpha_state = r300_bind_dsa_state;
730    r300->context.delete_depth_stencil_alpha_state = r300_delete_dsa_state;
731
732    r300->context.set_edgeflags = r300_set_edgeflags;
733
734    r300->context.set_framebuffer_state = r300_set_framebuffer_state;
735
736    r300->context.create_fs_state = r300_create_fs_state;
737    r300->context.bind_fs_state = r300_bind_fs_state;
738    r300->context.delete_fs_state = r300_delete_fs_state;
739
740    r300->context.set_polygon_stipple = r300_set_polygon_stipple;
741
742    r300->context.create_rasterizer_state = r300_create_rs_state;
743    r300->context.bind_rasterizer_state = r300_bind_rs_state;
744    r300->context.delete_rasterizer_state = r300_delete_rs_state;
745
746    r300->context.create_sampler_state = r300_create_sampler_state;
747    r300->context.bind_sampler_states = r300_bind_sampler_states;
748    r300->context.delete_sampler_state = r300_delete_sampler_state;
749
750    r300->context.set_sampler_textures = r300_set_sampler_textures;
751
752    r300->context.set_scissor_state = r300_set_scissor_state;
753
754    r300->context.set_viewport_state = r300_set_viewport_state;
755
756    r300->context.set_vertex_buffers = r300_set_vertex_buffers;
757    r300->context.set_vertex_elements = r300_set_vertex_elements;
758
759    r300->context.create_vs_state = r300_create_vs_state;
760    r300->context.bind_vs_state = r300_bind_vs_state;
761    r300->context.delete_vs_state = r300_delete_vs_state;
762}
763