r300_state.c revision d04c85d01bf37d480df8b9a21d9a79194d2e67f3
1/* 2 * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com> 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * on the rights to use, copy, modify, merge, publish, distribute, sub 8 * license, and/or sell copies of the Software, and to permit persons to whom 9 * the Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, 19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 21 * USE OR OTHER DEALINGS IN THE SOFTWARE. */ 22 23#include "util/u_math.h" 24#include "util/u_pack_color.h" 25 26#include "util/u_debug.h" 27#include "pipe/internal/p_winsys_screen.h" 28 29#include "r300_context.h" 30#include "r300_reg.h" 31#include "r300_state_inlines.h" 32#include "r300_state_shader.h" 33 34/* r300_state: Functions used to intialize state context by translating 35 * Gallium state objects into semi-native r300 state objects. */ 36 37/* Create a new blend state based on the CSO blend state. 38 * 39 * This encompasses alpha blending, logic/raster ops, and blend dithering. */ 40static void* r300_create_blend_state(struct pipe_context* pipe, 41 const struct pipe_blend_state* state) 42{ 43 struct r300_blend_state* blend = CALLOC_STRUCT(r300_blend_state); 44 45 if (state->blend_enable) { 46 /* XXX for now, always do separate alpha... 47 * is it faster to do it with one reg? */ 48 blend->blend_control = R300_ALPHA_BLEND_ENABLE | 49 R300_SEPARATE_ALPHA_ENABLE | 50 R300_READ_ENABLE | 51 r300_translate_blend_function(state->rgb_func) | 52 (r300_translate_blend_factor(state->rgb_src_factor) << 53 R300_SRC_BLEND_SHIFT) | 54 (r300_translate_blend_factor(state->rgb_dst_factor) << 55 R300_DST_BLEND_SHIFT); 56 blend->alpha_blend_control = 57 r300_translate_blend_function(state->alpha_func) | 58 (r300_translate_blend_factor(state->alpha_src_factor) << 59 R300_SRC_BLEND_SHIFT) | 60 (r300_translate_blend_factor(state->alpha_dst_factor) << 61 R300_DST_BLEND_SHIFT); 62 } 63 64 /* PIPE_LOGICOP_* don't need to be translated, fortunately. */ 65 if (state->logicop_enable) { 66 blend->rop = R300_RB3D_ROPCNTL_ROP_ENABLE | 67 (state->logicop_func) << R300_RB3D_ROPCNTL_ROP_SHIFT; 68 } 69 70 if (state->dither) { 71 blend->dither = R300_RB3D_DITHER_CTL_DITHER_MODE_LUT | 72 R300_RB3D_DITHER_CTL_ALPHA_DITHER_MODE_LUT; 73 } 74 75 return (void*)blend; 76} 77 78/* Bind blend state. */ 79static void r300_bind_blend_state(struct pipe_context* pipe, 80 void* state) 81{ 82 struct r300_context* r300 = r300_context(pipe); 83 84 r300->blend_state = (struct r300_blend_state*)state; 85 r300->dirty_state |= R300_NEW_BLEND; 86} 87 88/* Free blend state. */ 89static void r300_delete_blend_state(struct pipe_context* pipe, 90 void* state) 91{ 92 FREE(state); 93} 94 95/* Set blend color. 96 * Setup both R300 and R500 registers, figure out later which one to write. */ 97static void r300_set_blend_color(struct pipe_context* pipe, 98 const struct pipe_blend_color* color) 99{ 100 struct r300_context* r300 = r300_context(pipe); 101 ubyte ur, ug, ub, ua; 102 103 ur = float_to_ubyte(color->color[0]); 104 ug = float_to_ubyte(color->color[1]); 105 ub = float_to_ubyte(color->color[2]); 106 ua = float_to_ubyte(color->color[3]); 107 108 util_pack_color(color->color, PIPE_FORMAT_A8R8G8B8_UNORM, 109 &r300->blend_color_state->blend_color); 110 111 /* XXX this is wrong */ 112 r300->blend_color_state->blend_color_red_alpha = ur | (ua << 16); 113 r300->blend_color_state->blend_color_green_blue = ub | (ug << 16); 114 115 r300->dirty_state |= R300_NEW_BLEND_COLOR; 116} 117 118static void r300_set_clip_state(struct pipe_context* pipe, 119 const struct pipe_clip_state* state) 120{ 121 struct r300_context* r300 = r300_context(pipe); 122 /* XXX add HW TCL clipping setup */ 123 draw_flush(r300->draw); 124 draw_set_clip_state(r300->draw, state); 125} 126 127static void 128 r300_set_constant_buffer(struct pipe_context* pipe, 129 uint shader, uint index, 130 const struct pipe_constant_buffer* buffer) 131{ 132 struct r300_context* r300 = r300_context(pipe); 133 int i = r300->shader_constants[shader].user_count; 134 135 /* This entire chunk of code seems ever-so-slightly baked. 136 * It's as if I've got pipe_buffer* matryoshkas... */ 137 if (buffer && buffer->buffer && buffer->buffer->size) { 138 void* map = pipe->winsys->buffer_map(pipe->winsys, buffer->buffer, 139 PIPE_BUFFER_USAGE_CPU_READ); 140 memcpy(r300->shader_constants[shader].constants, 141 map, buffer->buffer->size); 142 pipe->winsys->buffer_unmap(pipe->winsys, buffer->buffer); 143 144 r300->shader_constants[shader].user_count = 145 buffer->buffer->size / (sizeof(float) * 4); 146 } else { 147 r300->shader_constants[shader].user_count = 0; 148 } 149 150 r300->dirty_state |= R300_NEW_CONSTANTS; 151 152 /* If the number of constants have changed, invalidate the shader. */ 153 if (r300->shader_constants[shader].user_count != i) { 154 if (shader == PIPE_SHADER_FRAGMENT && r300->fs && 155 r300->fs->uses_imms) { 156 r300->fs->translated = FALSE; 157 r300_translate_fragment_shader(r300, r300->fs); 158 } else if (shader == PIPE_SHADER_VERTEX && r300->vs && 159 r300->vs->uses_imms) { 160 r300->vs->translated = FALSE; 161 r300_translate_vertex_shader(r300, r300->vs); 162 } 163 } 164} 165 166/* Create a new depth, stencil, and alpha state based on the CSO dsa state. 167 * 168 * This contains the depth buffer, stencil buffer, alpha test, and such. 169 * On the Radeon, depth and stencil buffer setup are intertwined, which is 170 * the reason for some of the strange-looking assignments across registers. */ 171static void* 172 r300_create_dsa_state(struct pipe_context* pipe, 173 const struct pipe_depth_stencil_alpha_state* state) 174{ 175 struct r300_dsa_state* dsa = CALLOC_STRUCT(r300_dsa_state); 176 177 /* Depth test setup. */ 178 if (state->depth.enabled) { 179 dsa->z_buffer_control |= R300_Z_ENABLE; 180 181 if (state->depth.writemask) { 182 dsa->z_buffer_control |= R300_Z_WRITE_ENABLE; 183 } 184 185 dsa->z_stencil_control |= 186 (r300_translate_depth_stencil_function(state->depth.func) << 187 R300_Z_FUNC_SHIFT); 188 } 189 190 /* Stencil buffer setup. */ 191 if (state->stencil[0].enabled) { 192 dsa->z_buffer_control |= R300_STENCIL_ENABLE; 193 dsa->z_stencil_control |= 194 (r300_translate_depth_stencil_function(state->stencil[0].func) << 195 R300_S_FRONT_FUNC_SHIFT) | 196 (r300_translate_stencil_op(state->stencil[0].fail_op) << 197 R300_S_FRONT_SFAIL_OP_SHIFT) | 198 (r300_translate_stencil_op(state->stencil[0].zpass_op) << 199 R300_S_FRONT_ZPASS_OP_SHIFT) | 200 (r300_translate_stencil_op(state->stencil[0].zfail_op) << 201 R300_S_FRONT_ZFAIL_OP_SHIFT); 202 203 dsa->stencil_ref_mask = (state->stencil[0].ref_value) | 204 (state->stencil[0].valuemask << R300_STENCILMASK_SHIFT) | 205 (state->stencil[0].writemask << R300_STENCILWRITEMASK_SHIFT); 206 207 if (state->stencil[1].enabled) { 208 dsa->z_buffer_control |= R300_STENCIL_FRONT_BACK; 209 dsa->z_stencil_control |= 210 (r300_translate_depth_stencil_function(state->stencil[1].func) << 211 R300_S_BACK_FUNC_SHIFT) | 212 (r300_translate_stencil_op(state->stencil[1].fail_op) << 213 R300_S_BACK_SFAIL_OP_SHIFT) | 214 (r300_translate_stencil_op(state->stencil[1].zpass_op) << 215 R300_S_BACK_ZPASS_OP_SHIFT) | 216 (r300_translate_stencil_op(state->stencil[1].zfail_op) << 217 R300_S_BACK_ZFAIL_OP_SHIFT); 218 219 dsa->stencil_ref_bf = (state->stencil[1].ref_value) | 220 (state->stencil[1].valuemask << R300_STENCILMASK_SHIFT) | 221 (state->stencil[1].writemask << R300_STENCILWRITEMASK_SHIFT); 222 } 223 } 224 225 /* Alpha test setup. */ 226 if (state->alpha.enabled) { 227 dsa->alpha_function = 228 r300_translate_alpha_function(state->alpha.func) | 229 R300_FG_ALPHA_FUNC_ENABLE; 230 dsa->alpha_reference = CLAMP(state->alpha.ref_value * 1023.0f, 231 0, 1023); 232 } else { 233 dsa->z_buffer_top = R300_ZTOP_ENABLE; 234 } 235 236 return (void*)dsa; 237} 238 239/* Bind DSA state. */ 240static void r300_bind_dsa_state(struct pipe_context* pipe, 241 void* state) 242{ 243 struct r300_context* r300 = r300_context(pipe); 244 245 r300->dsa_state = (struct r300_dsa_state*)state; 246 r300->dirty_state |= R300_NEW_DSA; 247} 248 249/* Free DSA state. */ 250static void r300_delete_dsa_state(struct pipe_context* pipe, 251 void* state) 252{ 253 FREE(state); 254} 255 256static void r300_set_edgeflags(struct pipe_context* pipe, 257 const unsigned* bitfield) 258{ 259 /* XXX you know it's bad when i915 has this blank too */ 260 /* XXX and even worse, I have no idea WTF the bitfield is */ 261} 262 263static void 264 r300_set_framebuffer_state(struct pipe_context* pipe, 265 const struct pipe_framebuffer_state* state) 266{ 267 struct r300_context* r300 = r300_context(pipe); 268 269 draw_flush(r300->draw); 270 271 r300->framebuffer_state = *state; 272 273 r300->dirty_state |= R300_NEW_FRAMEBUFFERS; 274} 275 276/* Create fragment shader state. */ 277static void* r300_create_fs_state(struct pipe_context* pipe, 278 const struct pipe_shader_state* shader) 279{ 280 struct r300_context* r300 = r300_context(pipe); 281 struct r3xx_fragment_shader* fs = NULL; 282 283 if (r300_screen(r300->context.screen)->caps->is_r500) { 284 fs = 285 (struct r3xx_fragment_shader*)CALLOC_STRUCT(r500_fragment_shader); 286 } else { 287 fs = 288 (struct r3xx_fragment_shader*)CALLOC_STRUCT(r300_fragment_shader); 289 } 290 291 /* Copy state directly into shader. */ 292 fs->state = *shader; 293 fs->state.tokens = tgsi_dup_tokens(shader->tokens); 294 295 tgsi_scan_shader(shader->tokens, &fs->info); 296 297 return (void*)fs; 298} 299 300/* Bind fragment shader state. */ 301static void r300_bind_fs_state(struct pipe_context* pipe, void* shader) 302{ 303 struct r300_context* r300 = r300_context(pipe); 304 struct r3xx_fragment_shader* fs = (struct r3xx_fragment_shader*)shader; 305 306 if (fs == NULL) { 307 r300->fs = NULL; 308 return; 309 } else if (!fs->translated) { 310 r300_translate_fragment_shader(r300, fs); 311 } 312 313 fs->translated = TRUE; 314 r300->fs = fs; 315 316 r300->dirty_state |= R300_NEW_FRAGMENT_SHADER; 317} 318 319/* Delete fragment shader state. */ 320static void r300_delete_fs_state(struct pipe_context* pipe, void* shader) 321{ 322 struct r3xx_fragment_shader* fs = (struct r3xx_fragment_shader*)shader; 323 FREE(fs->state.tokens); 324 FREE(shader); 325} 326 327static void r300_set_polygon_stipple(struct pipe_context* pipe, 328 const struct pipe_poly_stipple* state) 329{ 330 /* XXX no idea how to set this up, but not terribly important */ 331} 332 333/* Create a new rasterizer state based on the CSO rasterizer state. 334 * 335 * This is a very large chunk of state, and covers most of the graphics 336 * backend (GB), geometry assembly (GA), and setup unit (SU) blocks. 337 * 338 * In a not entirely unironic sidenote, this state has nearly nothing to do 339 * with the actual block on the Radeon called the rasterizer (RS). */ 340static void* r300_create_rs_state(struct pipe_context* pipe, 341 const struct pipe_rasterizer_state* state) 342{ 343 struct r300_rs_state* rs = CALLOC_STRUCT(r300_rs_state); 344 345 /* Copy rasterizer state for Draw. */ 346 rs->rs = *state; 347 348 rs->enable_vte = !state->bypass_vs_clip_and_viewport; 349 350 /* If bypassing TCL, or if no TCL engine is present, turn off the HW TCL. 351 * Else, enable HW TCL and force Draw's TCL off. */ 352 if (state->bypass_vs_clip_and_viewport || 353 !r300_screen(pipe->screen)->caps->has_tcl) { 354 rs->vap_control_status = R300_VAP_TCL_BYPASS; 355 } else { 356 rs->rs.bypass_vs_clip_and_viewport = TRUE; 357 rs->vap_control_status = 0; 358 } 359 360 rs->point_size = pack_float_16_6x(state->point_size) | 361 (pack_float_16_6x(state->point_size) << R300_POINTSIZE_X_SHIFT); 362 363 rs->point_minmax = 364 ((int)(state->point_size_min * 6.0) << 365 R300_GA_POINT_MINMAX_MIN_SHIFT) | 366 ((int)(state->point_size_max * 6.0) << 367 R300_GA_POINT_MINMAX_MAX_SHIFT); 368 369 rs->line_control = pack_float_16_6x(state->line_width) | 370 R300_GA_LINE_CNTL_END_TYPE_COMP; 371 372 /* Radeons don't think in "CW/CCW", they think in "front/back". */ 373 if (state->front_winding == PIPE_WINDING_CW) { 374 rs->cull_mode = R300_FRONT_FACE_CW; 375 376 if (state->offset_cw) { 377 rs->polygon_offset_enable |= R300_FRONT_ENABLE; 378 } 379 if (state->offset_ccw) { 380 rs->polygon_offset_enable |= R300_BACK_ENABLE; 381 } 382 } else { 383 rs->cull_mode = R300_FRONT_FACE_CCW; 384 385 if (state->offset_ccw) { 386 rs->polygon_offset_enable |= R300_FRONT_ENABLE; 387 } 388 if (state->offset_cw) { 389 rs->polygon_offset_enable |= R300_BACK_ENABLE; 390 } 391 } 392 if (state->front_winding & state->cull_mode) { 393 rs->cull_mode |= R300_CULL_FRONT; 394 } 395 if (~(state->front_winding) & state->cull_mode) { 396 rs->cull_mode |= R300_CULL_BACK; 397 } 398 399 if (rs->polygon_offset_enable) { 400 rs->depth_offset_front = rs->depth_offset_back = 401 fui(state->offset_units); 402 rs->depth_scale_front = rs->depth_scale_back = 403 fui(state->offset_scale); 404 } 405 406 if (state->line_stipple_enable) { 407 rs->line_stipple_config = 408 R300_GA_LINE_STIPPLE_CONFIG_LINE_RESET_LINE | 409 (fui((float)state->line_stipple_factor) & 410 R300_GA_LINE_STIPPLE_CONFIG_STIPPLE_SCALE_MASK); 411 /* XXX this might need to be scaled up */ 412 rs->line_stipple_value = state->line_stipple_pattern; 413 } 414 415 if (state->flatshade) { 416 rs->color_control = R300_SHADE_MODEL_FLAT; 417 } else { 418 rs->color_control = R300_SHADE_MODEL_SMOOTH; 419 } 420 421 return (void*)rs; 422} 423 424/* Bind rasterizer state. */ 425static void r300_bind_rs_state(struct pipe_context* pipe, void* state) 426{ 427 struct r300_context* r300 = r300_context(pipe); 428 struct r300_rs_state* rs = (struct r300_rs_state*)state; 429 430 draw_flush(r300->draw); 431 draw_set_rasterizer_state(r300->draw, &rs->rs); 432 433 r300->rs_state = rs; 434 r300->dirty_state |= R300_NEW_RASTERIZER; 435} 436 437/* Free rasterizer state. */ 438static void r300_delete_rs_state(struct pipe_context* pipe, void* state) 439{ 440 FREE(state); 441} 442 443static void* 444 r300_create_sampler_state(struct pipe_context* pipe, 445 const struct pipe_sampler_state* state) 446{ 447 struct r300_context* r300 = r300_context(pipe); 448 struct r300_sampler_state* sampler = CALLOC_STRUCT(r300_sampler_state); 449 int lod_bias; 450 451 sampler->filter0 |= 452 (r300_translate_wrap(state->wrap_s) << R300_TX_WRAP_S_SHIFT) | 453 (r300_translate_wrap(state->wrap_t) << R300_TX_WRAP_T_SHIFT) | 454 (r300_translate_wrap(state->wrap_r) << R300_TX_WRAP_R_SHIFT); 455 456 sampler->filter0 |= r300_translate_tex_filters(state->min_img_filter, 457 state->mag_img_filter, 458 state->min_mip_filter); 459 460 lod_bias = CLAMP((int)(state->lod_bias * 32), -(1 << 9), (1 << 9) - 1); 461 462 sampler->filter1 |= lod_bias << R300_LOD_BIAS_SHIFT; 463 464 sampler->filter1 |= r300_anisotropy(state->max_anisotropy); 465 466 util_pack_color(state->border_color, PIPE_FORMAT_A8R8G8B8_UNORM, 467 &sampler->border_color); 468 469 /* R500-specific fixups and optimizations */ 470 if (r300_screen(r300->context.screen)->caps->is_r500) { 471 sampler->filter1 |= R500_BORDER_FIX; 472 } 473 474 return (void*)sampler; 475} 476 477static void r300_bind_sampler_states(struct pipe_context* pipe, 478 unsigned count, 479 void** states) 480{ 481 struct r300_context* r300 = r300_context(pipe); 482 int i; 483 484 if (count > 8) { 485 return; 486 } 487 488 for (i = 0; i < count; i++) { 489 if (r300->sampler_states[i] != states[i]) { 490 r300->sampler_states[i] = (struct r300_sampler_state*)states[i]; 491 r300->dirty_state |= (R300_NEW_SAMPLER << i); 492 } 493 } 494 495 r300->sampler_count = count; 496} 497 498static void r300_delete_sampler_state(struct pipe_context* pipe, void* state) 499{ 500 FREE(state); 501} 502 503static void r300_set_sampler_textures(struct pipe_context* pipe, 504 unsigned count, 505 struct pipe_texture** texture) 506{ 507 struct r300_context* r300 = r300_context(pipe); 508 int i; 509 510 /* XXX magic num */ 511 if (count > 8) { 512 return; 513 } 514 515 for (i = 0; i < count; i++) { 516 if (r300->textures[i] != (struct r300_texture*)texture[i]) { 517 pipe_texture_reference((struct pipe_texture**)&r300->textures[i], 518 texture[i]); 519 r300->dirty_state |= (R300_NEW_TEXTURE << i); 520 } 521 } 522 523 for (i = count; i < 8; i++) { 524 if (r300->textures[i]) { 525 pipe_texture_reference((struct pipe_texture**)&r300->textures[i], 526 NULL); 527 r300->dirty_state |= (R300_NEW_TEXTURE << i); 528 } 529 } 530 531 r300->texture_count = count; 532} 533 534static void r300_set_scissor_state(struct pipe_context* pipe, 535 const struct pipe_scissor_state* state) 536{ 537 struct r300_context* r300 = r300_context(pipe); 538 539 if (r300_screen(r300->context.screen)->caps->is_r500) { 540 r300->scissor_state->scissor_top_left = 541 (state->minx << R300_SCISSORS_X_SHIFT) | 542 (state->miny << R300_SCISSORS_Y_SHIFT); 543 r300->scissor_state->scissor_bottom_right = 544 (state->maxx << R300_SCISSORS_X_SHIFT) | 545 (state->maxy << R300_SCISSORS_Y_SHIFT); 546 } else { 547 /* Offset of 1440 in non-R500 chipsets. */ 548 r300->scissor_state->scissor_top_left = 549 ((state->minx + 1440) << R300_SCISSORS_X_SHIFT) | 550 ((state->miny + 1440) << R300_SCISSORS_Y_SHIFT); 551 r300->scissor_state->scissor_bottom_right = 552 ((state->maxx + 1440) << R300_SCISSORS_X_SHIFT) | 553 ((state->maxy + 1440) << R300_SCISSORS_Y_SHIFT); 554 } 555 556 r300->dirty_state |= R300_NEW_SCISSOR; 557} 558 559static void r300_set_viewport_state(struct pipe_context* pipe, 560 const struct pipe_viewport_state* state) 561{ 562 struct r300_context* r300 = r300_context(pipe); 563 564 /* Do the transform in HW. */ 565 r300->viewport_state->vte_control = R300_VTX_W0_FMT; 566 567 if (state->scale[0] != 1.0f) { 568 assert(state->scale[0] != 0.0f); 569 r300->viewport_state->xscale = state->scale[0]; 570 r300->viewport_state->vte_control |= R300_VPORT_X_SCALE_ENA; 571 } 572 if (state->scale[1] != 1.0f) { 573 assert(state->scale[1] != 0.0f); 574 r300->viewport_state->yscale = state->scale[1]; 575 r300->viewport_state->vte_control |= R300_VPORT_Y_SCALE_ENA; 576 } 577 if (state->scale[2] != 1.0f) { 578 assert(state->scale[2] != 0.0f); 579 r300->viewport_state->zscale = state->scale[2]; 580 r300->viewport_state->vte_control |= R300_VPORT_Z_SCALE_ENA; 581 } 582 if (state->translate[0] != 0.0f) { 583 r300->viewport_state->xoffset = state->translate[0]; 584 r300->viewport_state->vte_control |= R300_VPORT_X_OFFSET_ENA; 585 } 586 if (state->translate[1] != 0.0f) { 587 r300->viewport_state->yoffset = state->translate[1]; 588 r300->viewport_state->vte_control |= R300_VPORT_Y_OFFSET_ENA; 589 } 590 if (state->translate[2] != 0.0f) { 591 r300->viewport_state->zoffset = state->translate[2]; 592 r300->viewport_state->vte_control |= R300_VPORT_Z_OFFSET_ENA; 593 } 594 595 r300->dirty_state |= R300_NEW_VIEWPORT; 596} 597 598static void r300_set_vertex_buffers(struct pipe_context* pipe, 599 unsigned count, 600 const struct pipe_vertex_buffer* buffers) 601{ 602 struct r300_context* r300 = r300_context(pipe); 603 604 memcpy(r300->vertex_buffers, buffers, 605 sizeof(struct pipe_vertex_buffer) * count); 606 607 r300->vertex_buffer_count = count; 608 609 draw_flush(r300->draw); 610 draw_set_vertex_buffers(r300->draw, count, buffers); 611} 612 613static void r300_set_vertex_elements(struct pipe_context* pipe, 614 unsigned count, 615 const struct pipe_vertex_element* elements) 616{ 617 struct r300_context* r300 = r300_context(pipe); 618 619 draw_flush(r300->draw); 620 draw_set_vertex_elements(r300->draw, count, elements); 621} 622 623static void* r300_create_vs_state(struct pipe_context* pipe, 624 const struct pipe_shader_state* shader) 625{ 626 struct r300_context* r300 = r300_context(pipe); 627 628 if (r300_screen(pipe->screen)->caps->has_tcl) { 629 struct r300_vertex_shader* vs = CALLOC_STRUCT(r300_vertex_shader); 630 /* Copy state directly into shader. */ 631 vs->state = *shader; 632 vs->state.tokens = tgsi_dup_tokens(shader->tokens); 633 634 tgsi_scan_shader(shader->tokens, &vs->info); 635 636 /* Appease Draw. */ 637 vs->draw = draw_create_vertex_shader(r300->draw, shader); 638 639 return (void*)vs; 640 } else { 641 return draw_create_vertex_shader(r300->draw, shader); 642 } 643} 644 645static void r300_bind_vs_state(struct pipe_context* pipe, void* shader) 646{ 647 struct r300_context* r300 = r300_context(pipe); 648 649 draw_flush(r300->draw); 650 651 if (r300_screen(pipe->screen)->caps->has_tcl) { 652 struct r300_vertex_shader* vs = (struct r300_vertex_shader*)shader; 653 654 if (vs == NULL) { 655 r300->vs = NULL; 656 return; 657 } else if (!vs->translated) { 658 r300_translate_vertex_shader(r300, vs); 659 } 660 661 draw_bind_vertex_shader(r300->draw, vs->draw); 662 r300->vs = vs; 663 r300->dirty_state |= R300_NEW_VERTEX_SHADER; 664 } else { 665 draw_bind_vertex_shader(r300->draw, 666 (struct draw_vertex_shader*)shader); 667 } 668} 669 670static void r300_delete_vs_state(struct pipe_context* pipe, void* shader) 671{ 672 struct r300_context* r300 = r300_context(pipe); 673 674 if (r300_screen(pipe->screen)->caps->has_tcl) { 675 struct r300_vertex_shader* vs = (struct r300_vertex_shader*)shader; 676 677 draw_delete_vertex_shader(r300->draw, vs->draw); 678 FREE(vs->state.tokens); 679 FREE(shader); 680 } else { 681 draw_delete_vertex_shader(r300->draw, 682 (struct draw_vertex_shader*)shader); 683 } 684} 685 686void r300_init_state_functions(struct r300_context* r300) 687{ 688 r300->context.create_blend_state = r300_create_blend_state; 689 r300->context.bind_blend_state = r300_bind_blend_state; 690 r300->context.delete_blend_state = r300_delete_blend_state; 691 692 r300->context.set_blend_color = r300_set_blend_color; 693 694 r300->context.set_clip_state = r300_set_clip_state; 695 696 r300->context.set_constant_buffer = r300_set_constant_buffer; 697 698 r300->context.create_depth_stencil_alpha_state = r300_create_dsa_state; 699 r300->context.bind_depth_stencil_alpha_state = r300_bind_dsa_state; 700 r300->context.delete_depth_stencil_alpha_state = r300_delete_dsa_state; 701 702 r300->context.set_edgeflags = r300_set_edgeflags; 703 704 r300->context.set_framebuffer_state = r300_set_framebuffer_state; 705 706 r300->context.create_fs_state = r300_create_fs_state; 707 r300->context.bind_fs_state = r300_bind_fs_state; 708 r300->context.delete_fs_state = r300_delete_fs_state; 709 710 r300->context.set_polygon_stipple = r300_set_polygon_stipple; 711 712 r300->context.create_rasterizer_state = r300_create_rs_state; 713 r300->context.bind_rasterizer_state = r300_bind_rs_state; 714 r300->context.delete_rasterizer_state = r300_delete_rs_state; 715 716 r300->context.create_sampler_state = r300_create_sampler_state; 717 r300->context.bind_sampler_states = r300_bind_sampler_states; 718 r300->context.delete_sampler_state = r300_delete_sampler_state; 719 720 r300->context.set_sampler_textures = r300_set_sampler_textures; 721 722 r300->context.set_scissor_state = r300_set_scissor_state; 723 724 r300->context.set_viewport_state = r300_set_viewport_state; 725 726 r300->context.set_vertex_buffers = r300_set_vertex_buffers; 727 r300->context.set_vertex_elements = r300_set_vertex_elements; 728 729 r300->context.create_vs_state = r300_create_vs_state; 730 r300->context.bind_vs_state = r300_bind_vs_state; 731 r300->context.delete_vs_state = r300_delete_vs_state; 732} 733