r300_state.c revision f558bcb397e4016558b58fef01997b323ed931b0
1/* 2 * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com> 3 * Copyright 2009 Marek Olšák <maraeo@gmail.com> 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * on the rights to use, copy, modify, merge, publish, distribute, sub 9 * license, and/or sell copies of the Software, and to permit persons to whom 10 * the Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice (including the next 13 * paragraph) shall be included in all copies or substantial portions of the 14 * Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, 20 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 21 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 22 * USE OR OTHER DEALINGS IN THE SOFTWARE. */ 23 24#include "draw/draw_context.h" 25 26#include "util/u_math.h" 27#include "util/u_memory.h" 28#include "util/u_pack_color.h" 29 30#include "tgsi/tgsi_parse.h" 31 32#include "pipe/p_config.h" 33 34#include "r300_cb.h" 35#include "r300_context.h" 36#include "r300_emit.h" 37#include "r300_reg.h" 38#include "r300_screen.h" 39#include "r300_screen_buffer.h" 40#include "r300_state_inlines.h" 41#include "r300_fs.h" 42#include "r300_texture.h" 43#include "r300_vs.h" 44#include "r300_winsys.h" 45 46/* r300_state: Functions used to intialize state context by translating 47 * Gallium state objects into semi-native r300 state objects. */ 48 49#define UPDATE_STATE(cso, atom) \ 50 if (cso != atom.state) { \ 51 atom.state = cso; \ 52 atom.dirty = TRUE; \ 53 } 54 55static boolean blend_discard_if_src_alpha_0(unsigned srcRGB, unsigned srcA, 56 unsigned dstRGB, unsigned dstA) 57{ 58 /* If the blend equation is ADD or REVERSE_SUBTRACT, 59 * SRC_ALPHA == 0, and the following state is set, the colorbuffer 60 * will not be changed. 61 * Notice that the dst factors are the src factors inverted. */ 62 return (srcRGB == PIPE_BLENDFACTOR_SRC_ALPHA || 63 srcRGB == PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE || 64 srcRGB == PIPE_BLENDFACTOR_ZERO) && 65 (srcA == PIPE_BLENDFACTOR_SRC_COLOR || 66 srcA == PIPE_BLENDFACTOR_SRC_ALPHA || 67 srcA == PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE || 68 srcA == PIPE_BLENDFACTOR_ZERO) && 69 (dstRGB == PIPE_BLENDFACTOR_INV_SRC_ALPHA || 70 dstRGB == PIPE_BLENDFACTOR_ONE) && 71 (dstA == PIPE_BLENDFACTOR_INV_SRC_COLOR || 72 dstA == PIPE_BLENDFACTOR_INV_SRC_ALPHA || 73 dstA == PIPE_BLENDFACTOR_ONE); 74} 75 76static boolean blend_discard_if_src_alpha_1(unsigned srcRGB, unsigned srcA, 77 unsigned dstRGB, unsigned dstA) 78{ 79 /* If the blend equation is ADD or REVERSE_SUBTRACT, 80 * SRC_ALPHA == 1, and the following state is set, the colorbuffer 81 * will not be changed. 82 * Notice that the dst factors are the src factors inverted. */ 83 return (srcRGB == PIPE_BLENDFACTOR_INV_SRC_ALPHA || 84 srcRGB == PIPE_BLENDFACTOR_ZERO) && 85 (srcA == PIPE_BLENDFACTOR_INV_SRC_COLOR || 86 srcA == PIPE_BLENDFACTOR_INV_SRC_ALPHA || 87 srcA == PIPE_BLENDFACTOR_ZERO) && 88 (dstRGB == PIPE_BLENDFACTOR_SRC_ALPHA || 89 dstRGB == PIPE_BLENDFACTOR_ONE) && 90 (dstA == PIPE_BLENDFACTOR_SRC_COLOR || 91 dstA == PIPE_BLENDFACTOR_SRC_ALPHA || 92 dstA == PIPE_BLENDFACTOR_ONE); 93} 94 95static boolean blend_discard_if_src_color_0(unsigned srcRGB, unsigned srcA, 96 unsigned dstRGB, unsigned dstA) 97{ 98 /* If the blend equation is ADD or REVERSE_SUBTRACT, 99 * SRC_COLOR == (0,0,0), and the following state is set, the colorbuffer 100 * will not be changed. 101 * Notice that the dst factors are the src factors inverted. */ 102 return (srcRGB == PIPE_BLENDFACTOR_SRC_COLOR || 103 srcRGB == PIPE_BLENDFACTOR_ZERO) && 104 (srcA == PIPE_BLENDFACTOR_ZERO) && 105 (dstRGB == PIPE_BLENDFACTOR_INV_SRC_COLOR || 106 dstRGB == PIPE_BLENDFACTOR_ONE) && 107 (dstA == PIPE_BLENDFACTOR_ONE); 108} 109 110static boolean blend_discard_if_src_color_1(unsigned srcRGB, unsigned srcA, 111 unsigned dstRGB, unsigned dstA) 112{ 113 /* If the blend equation is ADD or REVERSE_SUBTRACT, 114 * SRC_COLOR == (1,1,1), and the following state is set, the colorbuffer 115 * will not be changed. 116 * Notice that the dst factors are the src factors inverted. */ 117 return (srcRGB == PIPE_BLENDFACTOR_INV_SRC_COLOR || 118 srcRGB == PIPE_BLENDFACTOR_ZERO) && 119 (srcA == PIPE_BLENDFACTOR_ZERO) && 120 (dstRGB == PIPE_BLENDFACTOR_SRC_COLOR || 121 dstRGB == PIPE_BLENDFACTOR_ONE) && 122 (dstA == PIPE_BLENDFACTOR_ONE); 123} 124 125static boolean blend_discard_if_src_alpha_color_0(unsigned srcRGB, unsigned srcA, 126 unsigned dstRGB, unsigned dstA) 127{ 128 /* If the blend equation is ADD or REVERSE_SUBTRACT, 129 * SRC_ALPHA_COLOR == (0,0,0,0), and the following state is set, 130 * the colorbuffer will not be changed. 131 * Notice that the dst factors are the src factors inverted. */ 132 return (srcRGB == PIPE_BLENDFACTOR_SRC_COLOR || 133 srcRGB == PIPE_BLENDFACTOR_SRC_ALPHA || 134 srcRGB == PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE || 135 srcRGB == PIPE_BLENDFACTOR_ZERO) && 136 (srcA == PIPE_BLENDFACTOR_SRC_COLOR || 137 srcA == PIPE_BLENDFACTOR_SRC_ALPHA || 138 srcA == PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE || 139 srcA == PIPE_BLENDFACTOR_ZERO) && 140 (dstRGB == PIPE_BLENDFACTOR_INV_SRC_COLOR || 141 dstRGB == PIPE_BLENDFACTOR_INV_SRC_ALPHA || 142 dstRGB == PIPE_BLENDFACTOR_ONE) && 143 (dstA == PIPE_BLENDFACTOR_INV_SRC_COLOR || 144 dstA == PIPE_BLENDFACTOR_INV_SRC_ALPHA || 145 dstA == PIPE_BLENDFACTOR_ONE); 146} 147 148static boolean blend_discard_if_src_alpha_color_1(unsigned srcRGB, unsigned srcA, 149 unsigned dstRGB, unsigned dstA) 150{ 151 /* If the blend equation is ADD or REVERSE_SUBTRACT, 152 * SRC_ALPHA_COLOR == (1,1,1,1), and the following state is set, 153 * the colorbuffer will not be changed. 154 * Notice that the dst factors are the src factors inverted. */ 155 return (srcRGB == PIPE_BLENDFACTOR_INV_SRC_COLOR || 156 srcRGB == PIPE_BLENDFACTOR_INV_SRC_ALPHA || 157 srcRGB == PIPE_BLENDFACTOR_ZERO) && 158 (srcA == PIPE_BLENDFACTOR_INV_SRC_COLOR || 159 srcA == PIPE_BLENDFACTOR_INV_SRC_ALPHA || 160 srcA == PIPE_BLENDFACTOR_ZERO) && 161 (dstRGB == PIPE_BLENDFACTOR_SRC_COLOR || 162 dstRGB == PIPE_BLENDFACTOR_SRC_ALPHA || 163 dstRGB == PIPE_BLENDFACTOR_ONE) && 164 (dstA == PIPE_BLENDFACTOR_SRC_COLOR || 165 dstA == PIPE_BLENDFACTOR_SRC_ALPHA || 166 dstA == PIPE_BLENDFACTOR_ONE); 167} 168 169static unsigned bgra_cmask(unsigned mask) 170{ 171 /* Gallium uses RGBA color ordering while R300 expects BGRA. */ 172 173 return ((mask & PIPE_MASK_R) << 2) | 174 ((mask & PIPE_MASK_B) >> 2) | 175 (mask & (PIPE_MASK_G | PIPE_MASK_A)); 176} 177 178/* Create a new blend state based on the CSO blend state. 179 * 180 * This encompasses alpha blending, logic/raster ops, and blend dithering. */ 181static void* r300_create_blend_state(struct pipe_context* pipe, 182 const struct pipe_blend_state* state) 183{ 184 struct r300_screen* r300screen = r300_screen(pipe->screen); 185 struct r300_blend_state* blend = CALLOC_STRUCT(r300_blend_state); 186 uint32_t blend_control = 0; /* R300_RB3D_CBLEND: 0x4e04 */ 187 uint32_t alpha_blend_control = 0; /* R300_RB3D_ABLEND: 0x4e08 */ 188 uint32_t color_channel_mask = 0; /* R300_RB3D_COLOR_CHANNEL_MASK: 0x4e0c */ 189 uint32_t rop = 0; /* R300_RB3D_ROPCNTL: 0x4e18 */ 190 uint32_t dither = 0; /* R300_RB3D_DITHER_CTL: 0x4e50 */ 191 CB_LOCALS; 192 193 if (state->rt[0].blend_enable) 194 { 195 unsigned eqRGB = state->rt[0].rgb_func; 196 unsigned srcRGB = state->rt[0].rgb_src_factor; 197 unsigned dstRGB = state->rt[0].rgb_dst_factor; 198 199 unsigned eqA = state->rt[0].alpha_func; 200 unsigned srcA = state->rt[0].alpha_src_factor; 201 unsigned dstA = state->rt[0].alpha_dst_factor; 202 203 /* despite the name, ALPHA_BLEND_ENABLE has nothing to do with alpha, 204 * this is just the crappy D3D naming */ 205 blend_control = R300_ALPHA_BLEND_ENABLE | 206 r300_translate_blend_function(eqRGB) | 207 ( r300_translate_blend_factor(srcRGB) << R300_SRC_BLEND_SHIFT) | 208 ( r300_translate_blend_factor(dstRGB) << R300_DST_BLEND_SHIFT); 209 210 /* Optimization: some operations do not require the destination color. 211 * 212 * When SRC_ALPHA_SATURATE is used, colorbuffer reads must be enabled, 213 * otherwise blending gives incorrect results. It seems to be 214 * a hardware bug. */ 215 if (eqRGB == PIPE_BLEND_MIN || eqA == PIPE_BLEND_MIN || 216 eqRGB == PIPE_BLEND_MAX || eqA == PIPE_BLEND_MAX || 217 dstRGB != PIPE_BLENDFACTOR_ZERO || 218 dstA != PIPE_BLENDFACTOR_ZERO || 219 srcRGB == PIPE_BLENDFACTOR_DST_COLOR || 220 srcRGB == PIPE_BLENDFACTOR_DST_ALPHA || 221 srcRGB == PIPE_BLENDFACTOR_INV_DST_COLOR || 222 srcRGB == PIPE_BLENDFACTOR_INV_DST_ALPHA || 223 srcA == PIPE_BLENDFACTOR_DST_COLOR || 224 srcA == PIPE_BLENDFACTOR_DST_ALPHA || 225 srcA == PIPE_BLENDFACTOR_INV_DST_COLOR || 226 srcA == PIPE_BLENDFACTOR_INV_DST_ALPHA || 227 srcRGB == PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE) { 228 /* Enable reading from the colorbuffer. */ 229 blend_control |= R300_READ_ENABLE; 230 231 if (r300screen->caps.is_r500) { 232 /* Optimization: Depending on incoming pixels, we can 233 * conditionally disable the reading in hardware... */ 234 if (eqRGB != PIPE_BLEND_MIN && eqA != PIPE_BLEND_MIN && 235 eqRGB != PIPE_BLEND_MAX && eqA != PIPE_BLEND_MAX) { 236 /* Disable reading if SRC_ALPHA == 0. */ 237 if ((dstRGB == PIPE_BLENDFACTOR_SRC_ALPHA || 238 dstRGB == PIPE_BLENDFACTOR_ZERO) && 239 (dstA == PIPE_BLENDFACTOR_SRC_COLOR || 240 dstA == PIPE_BLENDFACTOR_SRC_ALPHA || 241 dstA == PIPE_BLENDFACTOR_ZERO)) { 242 blend_control |= R500_SRC_ALPHA_0_NO_READ; 243 } 244 245 /* Disable reading if SRC_ALPHA == 1. */ 246 if ((dstRGB == PIPE_BLENDFACTOR_INV_SRC_ALPHA || 247 dstRGB == PIPE_BLENDFACTOR_ZERO) && 248 (dstA == PIPE_BLENDFACTOR_INV_SRC_COLOR || 249 dstA == PIPE_BLENDFACTOR_INV_SRC_ALPHA || 250 dstA == PIPE_BLENDFACTOR_ZERO)) { 251 blend_control |= R500_SRC_ALPHA_1_NO_READ; 252 } 253 } 254 } 255 } 256 257 /* Optimization: discard pixels which don't change the colorbuffer. 258 * 259 * The code below is non-trivial and some math is involved. 260 * 261 * Discarding pixels must be disabled when FP16 AA is enabled. 262 * This is a hardware bug. Also, this implementation wouldn't work 263 * with FP blending enabled and equation clamping disabled. 264 * 265 * Equations other than ADD are rarely used and therefore won't be 266 * optimized. */ 267 if ((eqRGB == PIPE_BLEND_ADD || eqRGB == PIPE_BLEND_REVERSE_SUBTRACT) && 268 (eqA == PIPE_BLEND_ADD || eqA == PIPE_BLEND_REVERSE_SUBTRACT)) { 269 /* ADD: X+Y 270 * REVERSE_SUBTRACT: Y-X 271 * 272 * The idea is: 273 * If X = src*srcFactor = 0 and Y = dst*dstFactor = 1, 274 * then CB will not be changed. 275 * 276 * Given the srcFactor and dstFactor variables, we can derive 277 * what src and dst should be equal to and discard appropriate 278 * pixels. 279 */ 280 if (blend_discard_if_src_alpha_0(srcRGB, srcA, dstRGB, dstA)) { 281 blend_control |= R300_DISCARD_SRC_PIXELS_SRC_ALPHA_0; 282 } else if (blend_discard_if_src_alpha_1(srcRGB, srcA, 283 dstRGB, dstA)) { 284 blend_control |= R300_DISCARD_SRC_PIXELS_SRC_ALPHA_1; 285 } else if (blend_discard_if_src_color_0(srcRGB, srcA, 286 dstRGB, dstA)) { 287 blend_control |= R300_DISCARD_SRC_PIXELS_SRC_COLOR_0; 288 } else if (blend_discard_if_src_color_1(srcRGB, srcA, 289 dstRGB, dstA)) { 290 blend_control |= R300_DISCARD_SRC_PIXELS_SRC_COLOR_1; 291 } else if (blend_discard_if_src_alpha_color_0(srcRGB, srcA, 292 dstRGB, dstA)) { 293 blend_control |= 294 R300_DISCARD_SRC_PIXELS_SRC_ALPHA_COLOR_0; 295 } else if (blend_discard_if_src_alpha_color_1(srcRGB, srcA, 296 dstRGB, dstA)) { 297 blend_control |= 298 R300_DISCARD_SRC_PIXELS_SRC_ALPHA_COLOR_1; 299 } 300 } 301 302 /* separate alpha */ 303 if (srcA != srcRGB || dstA != dstRGB || eqA != eqRGB) { 304 blend_control |= R300_SEPARATE_ALPHA_ENABLE; 305 alpha_blend_control = 306 r300_translate_blend_function(eqA) | 307 (r300_translate_blend_factor(srcA) << R300_SRC_BLEND_SHIFT) | 308 (r300_translate_blend_factor(dstA) << R300_DST_BLEND_SHIFT); 309 } 310 } 311 312 /* PIPE_LOGICOP_* don't need to be translated, fortunately. */ 313 if (state->logicop_enable) { 314 rop = R300_RB3D_ROPCNTL_ROP_ENABLE | 315 (state->logicop_func) << R300_RB3D_ROPCNTL_ROP_SHIFT; 316 } 317 318 /* Color channel masks for all MRTs. */ 319 color_channel_mask = bgra_cmask(state->rt[0].colormask); 320 if (r300screen->caps.is_r500 && state->independent_blend_enable) { 321 if (state->rt[1].blend_enable) { 322 color_channel_mask |= bgra_cmask(state->rt[1].colormask) << 4; 323 } 324 if (state->rt[2].blend_enable) { 325 color_channel_mask |= bgra_cmask(state->rt[2].colormask) << 8; 326 } 327 if (state->rt[3].blend_enable) { 328 color_channel_mask |= bgra_cmask(state->rt[3].colormask) << 12; 329 } 330 } 331 332 /* Neither fglrx nor classic r300 ever set this, regardless of dithering 333 * state. Since it's an optional implementation detail, we can leave it 334 * out and never dither. 335 * 336 * This could be revisited if we ever get quality or conformance hints. 337 * 338 if (state->dither) { 339 dither = R300_RB3D_DITHER_CTL_DITHER_MODE_LUT | 340 R300_RB3D_DITHER_CTL_ALPHA_DITHER_MODE_LUT; 341 } 342 */ 343 344 /* Build a command buffer. */ 345 BEGIN_CB(blend->cb, 8); 346 OUT_CB_REG(R300_RB3D_ROPCNTL, rop); 347 OUT_CB_REG_SEQ(R300_RB3D_CBLEND, 3); 348 OUT_CB(blend_control); 349 OUT_CB(alpha_blend_control); 350 OUT_CB(color_channel_mask); 351 OUT_CB_REG(R300_RB3D_DITHER_CTL, dither); 352 END_CB; 353 354 /* The same as above, but with no colorbuffer reads and writes. */ 355 BEGIN_CB(blend->cb_no_readwrite, 8); 356 OUT_CB_REG(R300_RB3D_ROPCNTL, rop); 357 OUT_CB_REG_SEQ(R300_RB3D_CBLEND, 3); 358 OUT_CB(0); 359 OUT_CB(0); 360 OUT_CB(0); 361 OUT_CB_REG(R300_RB3D_DITHER_CTL, dither); 362 END_CB; 363 364 return (void*)blend; 365} 366 367/* Bind blend state. */ 368static void r300_bind_blend_state(struct pipe_context* pipe, 369 void* state) 370{ 371 struct r300_context* r300 = r300_context(pipe); 372 373 UPDATE_STATE(state, r300->blend_state); 374} 375 376/* Free blend state. */ 377static void r300_delete_blend_state(struct pipe_context* pipe, 378 void* state) 379{ 380 FREE(state); 381} 382 383/* Convert float to 10bit integer */ 384static unsigned float_to_fixed10(float f) 385{ 386 return CLAMP((unsigned)(f * 1023.9f), 0, 1023); 387} 388 389/* Set blend color. 390 * Setup both R300 and R500 registers, figure out later which one to write. */ 391static void r300_set_blend_color(struct pipe_context* pipe, 392 const struct pipe_blend_color* color) 393{ 394 struct r300_context* r300 = r300_context(pipe); 395 struct r300_blend_color_state* state = 396 (struct r300_blend_color_state*)r300->blend_color_state.state; 397 CB_LOCALS; 398 399 if (r300->screen->caps.is_r500) { 400 /* XXX if FP16 blending is enabled, we should use the FP16 format */ 401 BEGIN_CB(state->cb, 3); 402 OUT_CB_REG_SEQ(R500_RB3D_CONSTANT_COLOR_AR, 2); 403 OUT_CB(float_to_fixed10(color->color[0]) | 404 (float_to_fixed10(color->color[3]) << 16)); 405 OUT_CB(float_to_fixed10(color->color[2]) | 406 (float_to_fixed10(color->color[1]) << 16)); 407 END_CB; 408 } else { 409 union util_color uc; 410 util_pack_color(color->color, PIPE_FORMAT_B8G8R8A8_UNORM, &uc); 411 412 BEGIN_CB(state->cb, 2); 413 OUT_CB_REG(R300_RB3D_BLEND_COLOR, uc.ui); 414 END_CB; 415 } 416 417 r300->blend_color_state.dirty = TRUE; 418} 419 420static void r300_set_clip_state(struct pipe_context* pipe, 421 const struct pipe_clip_state* state) 422{ 423 struct r300_context* r300 = r300_context(pipe); 424 struct r300_clip_state *clip = 425 (struct r300_clip_state*)r300->clip_state.state; 426 CB_LOCALS; 427 428 clip->clip = *state; 429 430 if (r300->screen->caps.has_tcl) { 431 BEGIN_CB(clip->cb, 29); 432 OUT_CB_REG(R300_VAP_PVS_VECTOR_INDX_REG, 433 (r300->screen->caps.is_r500 ? 434 R500_PVS_UCP_START : R300_PVS_UCP_START)); 435 OUT_CB_ONE_REG(R300_VAP_PVS_UPLOAD_DATA, 6 * 4); 436 OUT_CB_TABLE(state->ucp, 6 * 4); 437 OUT_CB_REG(R300_VAP_CLIP_CNTL, ((1 << state->nr) - 1) | 438 R300_PS_UCP_MODE_CLIP_AS_TRIFAN); 439 END_CB; 440 441 r300->clip_state.dirty = TRUE; 442 } else { 443 draw_flush(r300->draw); 444 draw_set_clip_state(r300->draw, state); 445 } 446} 447 448static void 449r300_set_sample_mask(struct pipe_context *pipe, 450 unsigned sample_mask) 451{ 452} 453 454 455/* Create a new depth, stencil, and alpha state based on the CSO dsa state. 456 * 457 * This contains the depth buffer, stencil buffer, alpha test, and such. 458 * On the Radeon, depth and stencil buffer setup are intertwined, which is 459 * the reason for some of the strange-looking assignments across registers. */ 460static void* 461 r300_create_dsa_state(struct pipe_context* pipe, 462 const struct pipe_depth_stencil_alpha_state* state) 463{ 464 struct r300_capabilities *caps = &r300_screen(pipe->screen)->caps; 465 struct r300_dsa_state* dsa = CALLOC_STRUCT(r300_dsa_state); 466 CB_LOCALS; 467 468 /* Depth test setup. */ 469 if (state->depth.enabled) { 470 dsa->z_buffer_control |= R300_Z_ENABLE; 471 472 if (state->depth.writemask) { 473 dsa->z_buffer_control |= R300_Z_WRITE_ENABLE; 474 } 475 476 dsa->z_stencil_control |= 477 (r300_translate_depth_stencil_function(state->depth.func) << 478 R300_Z_FUNC_SHIFT); 479 } 480 481 /* Stencil buffer setup. */ 482 if (state->stencil[0].enabled) { 483 dsa->z_buffer_control |= R300_STENCIL_ENABLE; 484 dsa->z_stencil_control |= 485 (r300_translate_depth_stencil_function(state->stencil[0].func) << 486 R300_S_FRONT_FUNC_SHIFT) | 487 (r300_translate_stencil_op(state->stencil[0].fail_op) << 488 R300_S_FRONT_SFAIL_OP_SHIFT) | 489 (r300_translate_stencil_op(state->stencil[0].zpass_op) << 490 R300_S_FRONT_ZPASS_OP_SHIFT) | 491 (r300_translate_stencil_op(state->stencil[0].zfail_op) << 492 R300_S_FRONT_ZFAIL_OP_SHIFT); 493 494 dsa->stencil_ref_mask = 495 (state->stencil[0].valuemask << R300_STENCILMASK_SHIFT) | 496 (state->stencil[0].writemask << R300_STENCILWRITEMASK_SHIFT); 497 498 if (state->stencil[1].enabled) { 499 dsa->two_sided = TRUE; 500 501 dsa->z_buffer_control |= R300_STENCIL_FRONT_BACK; 502 dsa->z_stencil_control |= 503 (r300_translate_depth_stencil_function(state->stencil[1].func) << 504 R300_S_BACK_FUNC_SHIFT) | 505 (r300_translate_stencil_op(state->stencil[1].fail_op) << 506 R300_S_BACK_SFAIL_OP_SHIFT) | 507 (r300_translate_stencil_op(state->stencil[1].zpass_op) << 508 R300_S_BACK_ZPASS_OP_SHIFT) | 509 (r300_translate_stencil_op(state->stencil[1].zfail_op) << 510 R300_S_BACK_ZFAIL_OP_SHIFT); 511 512 dsa->stencil_ref_bf = 513 (state->stencil[1].valuemask << R300_STENCILMASK_SHIFT) | 514 (state->stencil[1].writemask << R300_STENCILWRITEMASK_SHIFT); 515 516 if (caps->is_r500) { 517 dsa->z_buffer_control |= R500_STENCIL_REFMASK_FRONT_BACK; 518 } else { 519 dsa->two_sided_stencil_ref = 520 (state->stencil[0].valuemask != state->stencil[1].valuemask || 521 state->stencil[0].writemask != state->stencil[1].writemask); 522 } 523 } 524 } 525 526 /* Alpha test setup. */ 527 if (state->alpha.enabled) { 528 dsa->alpha_function = 529 r300_translate_alpha_function(state->alpha.func) | 530 R300_FG_ALPHA_FUNC_ENABLE; 531 532 /* We could use 10bit alpha ref but who needs that? */ 533 dsa->alpha_function |= float_to_ubyte(state->alpha.ref_value); 534 535 if (caps->is_r500) 536 dsa->alpha_function |= R500_FG_ALPHA_FUNC_8BIT; 537 } 538 539 BEGIN_CB(&dsa->cb_begin, 8); 540 OUT_CB_REG(R300_FG_ALPHA_FUNC, dsa->alpha_function); 541 OUT_CB_REG_SEQ(R300_ZB_CNTL, 3); 542 OUT_CB(dsa->z_buffer_control); 543 OUT_CB(dsa->z_stencil_control); 544 OUT_CB(dsa->stencil_ref_mask); 545 OUT_CB_REG(R500_ZB_STENCILREFMASK_BF, dsa->stencil_ref_bf); 546 END_CB; 547 548 BEGIN_CB(dsa->cb_no_readwrite, 8); 549 OUT_CB_REG(R300_FG_ALPHA_FUNC, dsa->alpha_function); 550 OUT_CB_REG_SEQ(R300_ZB_CNTL, 3); 551 OUT_CB(0); 552 OUT_CB(0); 553 OUT_CB(0); 554 OUT_CB_REG(R500_ZB_STENCILREFMASK_BF, 0); 555 END_CB; 556 557 return (void*)dsa; 558} 559 560static void r300_dsa_inject_stencilref(struct r300_context *r300) 561{ 562 struct r300_dsa_state *dsa = 563 (struct r300_dsa_state*)r300->dsa_state.state; 564 565 if (!dsa) 566 return; 567 568 dsa->stencil_ref_mask = 569 (dsa->stencil_ref_mask & ~R300_STENCILREF_MASK) | 570 r300->stencil_ref.ref_value[0]; 571 dsa->stencil_ref_bf = 572 (dsa->stencil_ref_bf & ~R300_STENCILREF_MASK) | 573 r300->stencil_ref.ref_value[1]; 574} 575 576/* Bind DSA state. */ 577static void r300_bind_dsa_state(struct pipe_context* pipe, 578 void* state) 579{ 580 struct r300_context* r300 = r300_context(pipe); 581 582 if (!state) { 583 return; 584 } 585 586 UPDATE_STATE(state, r300->dsa_state); 587 588 r300_dsa_inject_stencilref(r300); 589} 590 591/* Free DSA state. */ 592static void r300_delete_dsa_state(struct pipe_context* pipe, 593 void* state) 594{ 595 FREE(state); 596} 597 598static void r300_set_stencil_ref(struct pipe_context* pipe, 599 const struct pipe_stencil_ref* sr) 600{ 601 struct r300_context* r300 = r300_context(pipe); 602 603 r300->stencil_ref = *sr; 604 605 r300_dsa_inject_stencilref(r300); 606 r300->dsa_state.dirty = TRUE; 607} 608 609/* This switcheroo is needed just because of goddamned MACRO_SWITCH. */ 610static void r300_fb_set_tiling_flags(struct r300_context *r300, 611 const struct pipe_framebuffer_state *old_state, 612 const struct pipe_framebuffer_state *new_state) 613{ 614 struct r300_texture *tex; 615 unsigned i, level; 616 617 /* Set tiling flags for new surfaces. */ 618 for (i = 0; i < new_state->nr_cbufs; i++) { 619 tex = r300_texture(new_state->cbufs[i]->texture); 620 level = new_state->cbufs[i]->level; 621 622 r300->rws->buffer_set_tiling(r300->rws, tex->buffer, 623 tex->pitch[0] * util_format_get_blocksize(tex->b.b.format), 624 tex->microtile, 625 tex->mip_macrotile[level]); 626 } 627 if (new_state->zsbuf) { 628 tex = r300_texture(new_state->zsbuf->texture); 629 level = new_state->zsbuf->level; 630 631 r300->rws->buffer_set_tiling(r300->rws, tex->buffer, 632 tex->pitch[0] * util_format_get_blocksize(tex->b.b.format), 633 tex->microtile, 634 tex->mip_macrotile[level]); 635 } 636} 637 638static void r300_print_fb_surf_info(struct pipe_surface *surf, unsigned index, 639 const char *binding) 640{ 641 struct pipe_resource *tex = surf->texture; 642 struct r300_texture *rtex = r300_texture(tex); 643 644 fprintf(stderr, 645 "r300: %s[%i] Dim: %ix%i, Offset: %i, ZSlice: %i, " 646 "Face: %i, Level: %i, Format: %s\n" 647 648 "r300: TEX: Macro: %s, Micro: %s, Pitch: %i, " 649 "Dim: %ix%ix%i, LastLevel: %i, Format: %s\n", 650 651 binding, index, surf->width, surf->height, surf->offset, 652 surf->zslice, surf->face, surf->level, 653 util_format_short_name(surf->format), 654 655 rtex->macrotile ? "YES" : " NO", rtex->microtile ? "YES" : " NO", 656 rtex->hwpitch[0], tex->width0, tex->height0, tex->depth0, 657 tex->last_level, util_format_short_name(tex->format)); 658} 659 660static void 661 r300_set_framebuffer_state(struct pipe_context* pipe, 662 const struct pipe_framebuffer_state* state) 663{ 664 struct r300_context* r300 = r300_context(pipe); 665 struct pipe_framebuffer_state *old_state = r300->fb_state.state; 666 unsigned max_width, max_height, i; 667 uint32_t zbuffer_bpp = 0; 668 669 if (state->nr_cbufs > 4) { 670 fprintf(stderr, "r300: Implementation error: Too many MRTs in %s, " 671 "refusing to bind framebuffer state!\n", __FUNCTION__); 672 return; 673 } 674 675 if (r300->screen->caps.is_r500) { 676 max_width = max_height = 4096; 677 } else if (r300->screen->caps.is_r400) { 678 max_width = max_height = 4021; 679 } else { 680 max_width = max_height = 2560; 681 } 682 683 if (state->width > max_width || state->height > max_height) { 684 fprintf(stderr, "r300: Implementation error: Render targets are too " 685 "big in %s, refusing to bind framebuffer state!\n", __FUNCTION__); 686 return; 687 } 688 689 if (r300->draw) { 690 draw_flush(r300->draw); 691 } 692 693 r300->fb_state.dirty = TRUE; 694 695 /* If nr_cbufs is changed from zero to non-zero or vice versa... */ 696 if (!!old_state->nr_cbufs != !!state->nr_cbufs) { 697 r300->blend_state.dirty = TRUE; 698 } 699 /* If zsbuf is set from NULL to non-NULL or vice versa.. */ 700 if (!!old_state->zsbuf != !!state->zsbuf) { 701 r300->dsa_state.dirty = TRUE; 702 } 703 704 /* The tiling flags are dependent on the surface miplevel, unfortunately. */ 705 r300_fb_set_tiling_flags(r300, r300->fb_state.state, state); 706 707 memcpy(r300->fb_state.state, state, sizeof(struct pipe_framebuffer_state)); 708 709 r300->fb_state.size = (10 * state->nr_cbufs) + (2 * (4 - state->nr_cbufs)) + 710 (state->zsbuf ? 10 : 0) + 9; 711 712 /* Polygon offset depends on the zbuffer bit depth. */ 713 if (state->zsbuf && r300->polygon_offset_enabled) { 714 switch (util_format_get_blocksize(state->zsbuf->texture->format)) { 715 case 2: 716 zbuffer_bpp = 16; 717 break; 718 case 4: 719 zbuffer_bpp = 24; 720 break; 721 } 722 723 if (r300->zbuffer_bpp != zbuffer_bpp) { 724 r300->zbuffer_bpp = zbuffer_bpp; 725 r300->rs_state.dirty = TRUE; 726 } 727 } 728 729 if (DBG_ON(r300, DBG_FB)) { 730 fprintf(stderr, "r300: set_framebuffer_state:\n"); 731 for (i = 0; i < state->nr_cbufs; i++) { 732 r300_print_fb_surf_info(state->cbufs[i], i, "CB"); 733 } 734 if (state->zsbuf) { 735 r300_print_fb_surf_info(state->zsbuf, 0, "ZB"); 736 } 737 } 738} 739 740/* Create fragment shader state. */ 741static void* r300_create_fs_state(struct pipe_context* pipe, 742 const struct pipe_shader_state* shader) 743{ 744 struct r300_fragment_shader* fs = NULL; 745 746 fs = (struct r300_fragment_shader*)CALLOC_STRUCT(r300_fragment_shader); 747 748 /* Copy state directly into shader. */ 749 fs->state = *shader; 750 fs->state.tokens = tgsi_dup_tokens(shader->tokens); 751 752 return (void*)fs; 753} 754 755void r300_mark_fs_code_dirty(struct r300_context *r300) 756{ 757 struct r300_fragment_shader* fs = r300_fs(r300); 758 759 r300->fs.dirty = TRUE; 760 r300->fs_rc_constant_state.dirty = TRUE; 761 r300->fs_constants.dirty = TRUE; 762 r300->fs.size = fs->shader->cb_code_size; 763 764 if (r300->screen->caps.is_r500) { 765 r300->fs_rc_constant_state.size = fs->shader->rc_state_count * 7; 766 r300->fs_constants.size = fs->shader->externals_count * 4 + 3; 767 } else { 768 r300->fs_rc_constant_state.size = fs->shader->rc_state_count * 5; 769 r300->fs_constants.size = fs->shader->externals_count * 4 + 1; 770 } 771} 772 773/* Bind fragment shader state. */ 774static void r300_bind_fs_state(struct pipe_context* pipe, void* shader) 775{ 776 struct r300_context* r300 = r300_context(pipe); 777 struct r300_fragment_shader* fs = (struct r300_fragment_shader*)shader; 778 779 if (fs == NULL) { 780 r300->fs.state = NULL; 781 return; 782 } 783 784 r300->fs.state = fs; 785 r300_pick_fragment_shader(r300); 786 r300_mark_fs_code_dirty(r300); 787 788 r300->rs_block_state.dirty = TRUE; /* Will be updated before the emission. */ 789} 790 791/* Delete fragment shader state. */ 792static void r300_delete_fs_state(struct pipe_context* pipe, void* shader) 793{ 794 struct r300_fragment_shader* fs = (struct r300_fragment_shader*)shader; 795 struct r300_fragment_shader_code *tmp, *ptr = fs->first; 796 797 while (ptr) { 798 tmp = ptr; 799 ptr = ptr->next; 800 rc_constants_destroy(&tmp->code.constants); 801 FREE(tmp->cb_code); 802 FREE(tmp); 803 } 804 FREE((void*)fs->state.tokens); 805 FREE(shader); 806} 807 808static void r300_set_polygon_stipple(struct pipe_context* pipe, 809 const struct pipe_poly_stipple* state) 810{ 811 /* XXX no idea how to set this up, but not terribly important */ 812} 813 814/* Create a new rasterizer state based on the CSO rasterizer state. 815 * 816 * This is a very large chunk of state, and covers most of the graphics 817 * backend (GB), geometry assembly (GA), and setup unit (SU) blocks. 818 * 819 * In a not entirely unironic sidenote, this state has nearly nothing to do 820 * with the actual block on the Radeon called the rasterizer (RS). */ 821static void* r300_create_rs_state(struct pipe_context* pipe, 822 const struct pipe_rasterizer_state* state) 823{ 824 struct r300_rs_state* rs = CALLOC_STRUCT(r300_rs_state); 825 int i; 826 float psiz; 827 828 /* Copy rasterizer state. */ 829 rs->rs = *state; 830 rs->rs_draw = *state; 831 832 /* Override some states for Draw. */ 833 rs->rs_draw.sprite_coord_enable = 0; /* We can do this in HW. */ 834 835#ifdef PIPE_ARCH_LITTLE_ENDIAN 836 rs->vap_control_status = R300_VC_NO_SWAP; 837#else 838 rs->vap_control_status = R300_VC_32BIT_SWAP; 839#endif 840 841 /* If no TCL engine is present, turn off the HW TCL. */ 842 if (!r300_screen(pipe->screen)->caps.has_tcl) { 843 rs->vap_control_status |= R300_VAP_TCL_BYPASS; 844 } 845 846 /* Point size width and height. */ 847 rs->point_size = 848 pack_float_16_6x(state->point_size) | 849 (pack_float_16_6x(state->point_size) << R300_POINTSIZE_X_SHIFT); 850 851 /* Point size clamping. */ 852 if (state->point_size_per_vertex) { 853 /* Per-vertex point size. 854 * Clamp to [0, max FB size] */ 855 psiz = pipe->screen->get_paramf(pipe->screen, 856 PIPE_CAP_MAX_POINT_WIDTH); 857 rs->point_minmax = 858 pack_float_16_6x(psiz) << R300_GA_POINT_MINMAX_MAX_SHIFT; 859 } else { 860 /* We cannot disable the point-size vertex output, 861 * so clamp it. */ 862 psiz = state->point_size; 863 rs->point_minmax = 864 (pack_float_16_6x(psiz) << R300_GA_POINT_MINMAX_MIN_SHIFT) | 865 (pack_float_16_6x(psiz) << R300_GA_POINT_MINMAX_MAX_SHIFT); 866 } 867 868 /* Line control. */ 869 rs->line_control = pack_float_16_6x(state->line_width) | 870 R300_GA_LINE_CNTL_END_TYPE_COMP; 871 872 /* Enable polygon mode */ 873 if (state->fill_front != PIPE_POLYGON_MODE_FILL || 874 state->fill_back != PIPE_POLYGON_MODE_FILL) { 875 rs->polygon_mode = R300_GA_POLY_MODE_DUAL; 876 } 877 878 /* Front face */ 879 if (state->front_ccw) 880 rs->cull_mode = R300_FRONT_FACE_CCW; 881 else 882 rs->cull_mode = R300_FRONT_FACE_CW; 883 884 /* Polygon offset */ 885 if (util_get_offset(state, state->fill_front)) { 886 rs->polygon_offset_enable |= R300_FRONT_ENABLE; 887 } 888 if (util_get_offset(state, state->fill_back)) { 889 rs->polygon_offset_enable |= R300_BACK_ENABLE; 890 } 891 892 /* Polygon mode */ 893 if (rs->polygon_mode) { 894 rs->polygon_mode |= 895 r300_translate_polygon_mode_front(state->fill_front); 896 rs->polygon_mode |= 897 r300_translate_polygon_mode_back(state->fill_back); 898 } 899 900 if (state->cull_face & PIPE_FACE_FRONT) { 901 rs->cull_mode |= R300_CULL_FRONT; 902 } 903 if (state->cull_face & PIPE_FACE_BACK) { 904 rs->cull_mode |= R300_CULL_BACK; 905 } 906 907 if (rs->polygon_offset_enable) { 908 rs->depth_offset = state->offset_units; 909 rs->depth_scale = state->offset_scale; 910 } 911 912 if (state->line_stipple_enable) { 913 rs->line_stipple_config = 914 R300_GA_LINE_STIPPLE_CONFIG_LINE_RESET_LINE | 915 (fui((float)state->line_stipple_factor) & 916 R300_GA_LINE_STIPPLE_CONFIG_STIPPLE_SCALE_MASK); 917 /* XXX this might need to be scaled up */ 918 rs->line_stipple_value = state->line_stipple_pattern; 919 } 920 921 if (state->flatshade) { 922 rs->color_control = R300_SHADE_MODEL_FLAT; 923 } else { 924 rs->color_control = R300_SHADE_MODEL_SMOOTH; 925 } 926 927 rs->clip_rule = state->scissor ? 0xAAAA : 0xFFFF; 928 929 /* Point sprites */ 930 if (state->sprite_coord_enable) { 931 rs->stuffing_enable = R300_GB_POINT_STUFF_ENABLE; 932 for (i = 0; i < 8; i++) { 933 if (state->sprite_coord_enable & (1 << i)) 934 rs->stuffing_enable |= 935 R300_GB_TEX_STR << (R300_GB_TEX0_SOURCE_SHIFT + (i*2)); 936 } 937 938 rs->point_texcoord_left = 0.0f; 939 rs->point_texcoord_right = 1.0f; 940 941 switch (state->sprite_coord_mode) { 942 case PIPE_SPRITE_COORD_UPPER_LEFT: 943 rs->point_texcoord_top = 0.0f; 944 rs->point_texcoord_bottom = 1.0f; 945 break; 946 case PIPE_SPRITE_COORD_LOWER_LEFT: 947 rs->point_texcoord_top = 1.0f; 948 rs->point_texcoord_bottom = 0.0f; 949 break; 950 } 951 } 952 953 return (void*)rs; 954} 955 956/* Bind rasterizer state. */ 957static void r300_bind_rs_state(struct pipe_context* pipe, void* state) 958{ 959 struct r300_context* r300 = r300_context(pipe); 960 struct r300_rs_state* rs = (struct r300_rs_state*)state; 961 int last_sprite_coord_enable = r300->sprite_coord_enable; 962 boolean last_two_sided_color = r300->two_sided_color; 963 964 if (r300->draw && rs) { 965 draw_flush(r300->draw); 966 draw_set_rasterizer_state(r300->draw, &rs->rs_draw, state); 967 } 968 969 if (rs) { 970 r300->polygon_offset_enabled = (rs->rs.offset_point || 971 rs->rs.offset_line || 972 rs->rs.offset_tri); 973 r300->sprite_coord_enable = rs->rs.sprite_coord_enable; 974 r300->two_sided_color = rs->rs.light_twoside; 975 } else { 976 r300->polygon_offset_enabled = FALSE; 977 r300->sprite_coord_enable = 0; 978 r300->two_sided_color = FALSE; 979 } 980 981 UPDATE_STATE(state, r300->rs_state); 982 r300->rs_state.size = 27 + (r300->polygon_offset_enabled ? 5 : 0); 983 984 if (last_sprite_coord_enable != r300->sprite_coord_enable || 985 last_two_sided_color != r300->two_sided_color) { 986 r300->rs_block_state.dirty = TRUE; 987 } 988} 989 990/* Free rasterizer state. */ 991static void r300_delete_rs_state(struct pipe_context* pipe, void* state) 992{ 993 FREE(state); 994} 995 996static void* 997 r300_create_sampler_state(struct pipe_context* pipe, 998 const struct pipe_sampler_state* state) 999{ 1000 struct r300_context* r300 = r300_context(pipe); 1001 struct r300_sampler_state* sampler = CALLOC_STRUCT(r300_sampler_state); 1002 boolean is_r500 = r300->screen->caps.is_r500; 1003 int lod_bias; 1004 union util_color uc; 1005 1006 sampler->state = *state; 1007 1008 sampler->filter0 |= 1009 (r300_translate_wrap(state->wrap_s) << R300_TX_WRAP_S_SHIFT) | 1010 (r300_translate_wrap(state->wrap_t) << R300_TX_WRAP_T_SHIFT) | 1011 (r300_translate_wrap(state->wrap_r) << R300_TX_WRAP_R_SHIFT); 1012 1013 sampler->filter0 |= r300_translate_tex_filters(state->min_img_filter, 1014 state->mag_img_filter, 1015 state->min_mip_filter, 1016 state->max_anisotropy > 0); 1017 1018 sampler->filter0 |= r300_anisotropy(state->max_anisotropy); 1019 1020 /* Unfortunately, r300-r500 don't support floating-point mipmap lods. */ 1021 /* We must pass these to the merge function to clamp them properly. */ 1022 sampler->min_lod = MAX2((unsigned)state->min_lod, 0); 1023 sampler->max_lod = MAX2((unsigned)ceilf(state->max_lod), 0); 1024 1025 lod_bias = CLAMP((int)(state->lod_bias * 32 + 1), -(1 << 9), (1 << 9) - 1); 1026 1027 sampler->filter1 |= lod_bias << R300_LOD_BIAS_SHIFT; 1028 1029 /* This is very high quality anisotropic filtering for R5xx. 1030 * It's good for benchmarking the performance of texturing but 1031 * in practice we don't want to slow down the driver because it's 1032 * a pretty good performance killer. Feel free to play with it. */ 1033 if (DBG_ON(r300, DBG_ANISOHQ) && is_r500) { 1034 sampler->filter1 |= r500_anisotropy(state->max_anisotropy); 1035 } 1036 1037 util_pack_color(state->border_color, PIPE_FORMAT_B8G8R8A8_UNORM, &uc); 1038 sampler->border_color = uc.ui; 1039 1040 /* R500-specific fixups and optimizations */ 1041 if (r300->screen->caps.is_r500) { 1042 sampler->filter1 |= R500_BORDER_FIX; 1043 } 1044 1045 return (void*)sampler; 1046} 1047 1048static void r300_bind_sampler_states(struct pipe_context* pipe, 1049 unsigned count, 1050 void** states) 1051{ 1052 struct r300_context* r300 = r300_context(pipe); 1053 struct r300_textures_state* state = 1054 (struct r300_textures_state*)r300->textures_state.state; 1055 unsigned tex_units = r300->screen->caps.num_tex_units; 1056 1057 if (count > tex_units) { 1058 return; 1059 } 1060 1061 memcpy(state->sampler_states, states, sizeof(void*) * count); 1062 state->sampler_state_count = count; 1063 1064 r300->textures_state.dirty = TRUE; 1065} 1066 1067static void r300_lacks_vertex_textures(struct pipe_context* pipe, 1068 unsigned count, 1069 void** states) 1070{ 1071} 1072 1073static void r300_delete_sampler_state(struct pipe_context* pipe, void* state) 1074{ 1075 FREE(state); 1076} 1077 1078static void r300_set_fragment_sampler_views(struct pipe_context* pipe, 1079 unsigned count, 1080 struct pipe_sampler_view** views) 1081{ 1082 struct r300_context* r300 = r300_context(pipe); 1083 struct r300_textures_state* state = 1084 (struct r300_textures_state*)r300->textures_state.state; 1085 struct r300_texture *texture; 1086 unsigned i; 1087 unsigned tex_units = r300->screen->caps.num_tex_units; 1088 boolean dirty_tex = FALSE; 1089 1090 if (count > tex_units) { 1091 return; 1092 } 1093 1094 for (i = 0; i < count; i++) { 1095 if (&state->sampler_views[i]->base != views[i]) { 1096 pipe_sampler_view_reference( 1097 (struct pipe_sampler_view**)&state->sampler_views[i], 1098 views[i]); 1099 1100 if (!views[i]) { 1101 continue; 1102 } 1103 1104 /* A new sampler view (= texture)... */ 1105 dirty_tex = TRUE; 1106 1107 /* Set the texrect factor in the fragment shader. 1108 * Needed for RECT and NPOT fallback. */ 1109 texture = r300_texture(views[i]->texture); 1110 if (texture->uses_pitch) { 1111 r300->fs_rc_constant_state.dirty = TRUE; 1112 } 1113 } 1114 } 1115 1116 for (i = count; i < tex_units; i++) { 1117 if (state->sampler_views[i]) { 1118 pipe_sampler_view_reference( 1119 (struct pipe_sampler_view**)&state->sampler_views[i], 1120 NULL); 1121 } 1122 } 1123 1124 state->sampler_view_count = count; 1125 1126 r300->textures_state.dirty = TRUE; 1127 1128 if (dirty_tex) { 1129 r300->texture_cache_inval.dirty = TRUE; 1130 } 1131} 1132 1133static struct pipe_sampler_view * 1134r300_create_sampler_view(struct pipe_context *pipe, 1135 struct pipe_resource *texture, 1136 const struct pipe_sampler_view *templ) 1137{ 1138 struct r300_sampler_view *view = CALLOC_STRUCT(r300_sampler_view); 1139 struct r300_texture *tex = r300_texture(texture); 1140 1141 if (view) { 1142 view->base = *templ; 1143 view->base.reference.count = 1; 1144 view->base.context = pipe; 1145 view->base.texture = NULL; 1146 pipe_resource_reference(&view->base.texture, texture); 1147 1148 view->swizzle[0] = templ->swizzle_r; 1149 view->swizzle[1] = templ->swizzle_g; 1150 view->swizzle[2] = templ->swizzle_b; 1151 view->swizzle[3] = templ->swizzle_a; 1152 1153 view->format = tex->tx_format; 1154 view->format.format1 |= r300_translate_texformat(templ->format, 1155 view->swizzle); 1156 if (r300_screen(pipe->screen)->caps.is_r500) { 1157 view->format.format2 |= r500_tx_format_msb_bit(templ->format); 1158 } 1159 } 1160 1161 return (struct pipe_sampler_view*)view; 1162} 1163 1164static void 1165r300_sampler_view_destroy(struct pipe_context *pipe, 1166 struct pipe_sampler_view *view) 1167{ 1168 pipe_resource_reference(&view->texture, NULL); 1169 FREE(view); 1170} 1171 1172static void r300_set_scissor_state(struct pipe_context* pipe, 1173 const struct pipe_scissor_state* state) 1174{ 1175 struct r300_context* r300 = r300_context(pipe); 1176 1177 memcpy(r300->scissor_state.state, state, 1178 sizeof(struct pipe_scissor_state)); 1179 1180 r300->scissor_state.dirty = TRUE; 1181} 1182 1183static void r300_set_viewport_state(struct pipe_context* pipe, 1184 const struct pipe_viewport_state* state) 1185{ 1186 struct r300_context* r300 = r300_context(pipe); 1187 struct r300_viewport_state* viewport = 1188 (struct r300_viewport_state*)r300->viewport_state.state; 1189 1190 r300->viewport = *state; 1191 1192 if (r300->draw) { 1193 draw_flush(r300->draw); 1194 draw_set_viewport_state(r300->draw, state); 1195 viewport->vte_control = R300_VTX_XY_FMT | R300_VTX_Z_FMT; 1196 return; 1197 } 1198 1199 /* Do the transform in HW. */ 1200 viewport->vte_control = R300_VTX_W0_FMT; 1201 1202 if (state->scale[0] != 1.0f) { 1203 viewport->xscale = state->scale[0]; 1204 viewport->vte_control |= R300_VPORT_X_SCALE_ENA; 1205 } 1206 if (state->scale[1] != 1.0f) { 1207 viewport->yscale = state->scale[1]; 1208 viewport->vte_control |= R300_VPORT_Y_SCALE_ENA; 1209 } 1210 if (state->scale[2] != 1.0f) { 1211 viewport->zscale = state->scale[2]; 1212 viewport->vte_control |= R300_VPORT_Z_SCALE_ENA; 1213 } 1214 if (state->translate[0] != 0.0f) { 1215 viewport->xoffset = state->translate[0]; 1216 viewport->vte_control |= R300_VPORT_X_OFFSET_ENA; 1217 } 1218 if (state->translate[1] != 0.0f) { 1219 viewport->yoffset = state->translate[1]; 1220 viewport->vte_control |= R300_VPORT_Y_OFFSET_ENA; 1221 } 1222 if (state->translate[2] != 0.0f) { 1223 viewport->zoffset = state->translate[2]; 1224 viewport->vte_control |= R300_VPORT_Z_OFFSET_ENA; 1225 } 1226 1227 r300->viewport_state.dirty = TRUE; 1228 if (r300->fs.state && r300_fs(r300)->shader->inputs.wpos != ATTR_UNUSED) { 1229 r300->fs_rc_constant_state.dirty = TRUE; 1230 } 1231} 1232 1233static void r300_set_vertex_buffers(struct pipe_context* pipe, 1234 unsigned count, 1235 const struct pipe_vertex_buffer* buffers) 1236{ 1237 struct r300_context* r300 = r300_context(pipe); 1238 struct pipe_vertex_buffer *vbo; 1239 unsigned i, max_index = (1 << 24) - 1; 1240 boolean any_user_buffer = FALSE; 1241 1242 if (count == r300->vertex_buffer_count && 1243 memcmp(r300->vertex_buffer, buffers, 1244 sizeof(struct pipe_vertex_buffer) * count) == 0) { 1245 return; 1246 } 1247 1248 if (r300->screen->caps.has_tcl) { 1249 /* HW TCL. */ 1250 r300->incompatible_vb_layout = FALSE; 1251 1252 /* Check if the strides and offsets are aligned to the size of DWORD. */ 1253 for (i = 0; i < count; i++) { 1254 if (buffers[i].buffer) { 1255 if (buffers[i].stride % 4 != 0 || 1256 buffers[i].buffer_offset % 4 != 0) { 1257 r300->incompatible_vb_layout = TRUE; 1258 break; 1259 } 1260 } 1261 } 1262 1263 for (i = 0; i < count; i++) { 1264 /* Why, yes, I AM casting away constness. How did you know? */ 1265 vbo = (struct pipe_vertex_buffer*)&buffers[i]; 1266 1267 /* Skip NULL buffers */ 1268 if (!buffers[i].buffer) { 1269 continue; 1270 } 1271 1272 if (r300_buffer_is_user_buffer(vbo->buffer)) { 1273 any_user_buffer = TRUE; 1274 } 1275 1276 if (vbo->max_index == ~0) { 1277 /* if no VBO stride then only one vertex value so max index is 1 */ 1278 /* should think about converting to VS constants like svga does */ 1279 if (!vbo->stride) 1280 vbo->max_index = 1; 1281 else 1282 vbo->max_index = 1283 (vbo->buffer->width0 - vbo->buffer_offset) / vbo->stride; 1284 } 1285 1286 max_index = MIN2(vbo->max_index, max_index); 1287 } 1288 1289 r300->any_user_vbs = any_user_buffer; 1290 r300->vertex_buffer_max_index = max_index; 1291 1292 } else { 1293 /* SW TCL. */ 1294 draw_flush(r300->draw); 1295 draw_set_vertex_buffers(r300->draw, count, buffers); 1296 } 1297 1298 /* Common code. */ 1299 for (i = 0; i < count; i++) { 1300 /* Reference our buffer. */ 1301 pipe_resource_reference(&r300->vertex_buffer[i].buffer, buffers[i].buffer); 1302 } 1303 for (; i < r300->vertex_buffer_count; i++) { 1304 /* Dereference any old buffers. */ 1305 pipe_resource_reference(&r300->vertex_buffer[i].buffer, NULL); 1306 } 1307 1308 memcpy(r300->vertex_buffer, buffers, 1309 sizeof(struct pipe_vertex_buffer) * count); 1310 r300->vertex_buffer_count = count; 1311} 1312 1313/* Initialize the PSC tables. */ 1314static void r300_vertex_psc(struct r300_vertex_element_state *velems) 1315{ 1316 struct r300_vertex_stream_state *vstream = &velems->vertex_stream; 1317 uint16_t type, swizzle; 1318 enum pipe_format format; 1319 unsigned i; 1320 1321 if (velems->count > 16) { 1322 fprintf(stderr, "r300: More than 16 vertex elements are not supported," 1323 " requested %i, using 16.\n", velems->count); 1324 velems->count = 16; 1325 } 1326 1327 /* Vertex shaders have no semantics on their inputs, 1328 * so PSC should just route stuff based on the vertex elements, 1329 * and not on attrib information. */ 1330 for (i = 0; i < velems->count; i++) { 1331 format = velems->hw_format[i]; 1332 1333 type = r300_translate_vertex_data_type(format); 1334 if (type == R300_INVALID_FORMAT) { 1335 fprintf(stderr, "r300: Bad vertex format %s.\n", 1336 util_format_short_name(format)); 1337 assert(0); 1338 abort(); 1339 } 1340 1341 type |= i << R300_DST_VEC_LOC_SHIFT; 1342 swizzle = r300_translate_vertex_data_swizzle(format); 1343 1344 if (i & 1) { 1345 vstream->vap_prog_stream_cntl[i >> 1] |= type << 16; 1346 vstream->vap_prog_stream_cntl_ext[i >> 1] |= swizzle << 16; 1347 } else { 1348 vstream->vap_prog_stream_cntl[i >> 1] |= type; 1349 vstream->vap_prog_stream_cntl_ext[i >> 1] |= swizzle; 1350 } 1351 } 1352 1353 /* Set the last vector in the PSC. */ 1354 if (i) { 1355 i -= 1; 1356 } 1357 vstream->vap_prog_stream_cntl[i >> 1] |= 1358 (R300_LAST_VEC << (i & 1 ? 16 : 0)); 1359 1360 vstream->count = (i >> 1) + 1; 1361} 1362 1363#define FORMAT_REPLACE(what, withwhat) \ 1364 case PIPE_FORMAT_##what: *format = PIPE_FORMAT_##withwhat; break 1365 1366static void* r300_create_vertex_elements_state(struct pipe_context* pipe, 1367 unsigned count, 1368 const struct pipe_vertex_element* attribs) 1369{ 1370 struct r300_vertex_element_state *velems; 1371 unsigned i; 1372 enum pipe_format *format; 1373 1374 assert(count <= PIPE_MAX_ATTRIBS); 1375 velems = CALLOC_STRUCT(r300_vertex_element_state); 1376 if (velems != NULL) { 1377 velems->count = count; 1378 memcpy(velems->velem, attribs, sizeof(struct pipe_vertex_element) * count); 1379 1380 if (r300_screen(pipe->screen)->caps.has_tcl) { 1381 /* Set the best hw format in case the original format is not 1382 * supported by hw. */ 1383 for (i = 0; i < count; i++) { 1384 velems->hw_format[i] = velems->velem[i].src_format; 1385 format = &velems->hw_format[i]; 1386 1387 /* This is basically the list of unsupported formats. 1388 * For now we don't care about the alignment, that's going to 1389 * be sorted out after the PSC setup. */ 1390 switch (*format) { 1391 FORMAT_REPLACE(R64_FLOAT, R32_FLOAT); 1392 FORMAT_REPLACE(R64G64_FLOAT, R32G32_FLOAT); 1393 FORMAT_REPLACE(R64G64B64_FLOAT, R32G32B32_FLOAT); 1394 FORMAT_REPLACE(R64G64B64A64_FLOAT, R32G32B32A32_FLOAT); 1395 1396 FORMAT_REPLACE(R32_UNORM, R32_FLOAT); 1397 FORMAT_REPLACE(R32G32_UNORM, R32G32_FLOAT); 1398 FORMAT_REPLACE(R32G32B32_UNORM, R32G32B32_FLOAT); 1399 FORMAT_REPLACE(R32G32B32A32_UNORM, R32G32B32A32_FLOAT); 1400 1401 FORMAT_REPLACE(R32_USCALED, R32_FLOAT); 1402 FORMAT_REPLACE(R32G32_USCALED, R32G32_FLOAT); 1403 FORMAT_REPLACE(R32G32B32_USCALED, R32G32B32_FLOAT); 1404 FORMAT_REPLACE(R32G32B32A32_USCALED,R32G32B32A32_FLOAT); 1405 1406 FORMAT_REPLACE(R32_SNORM, R32_FLOAT); 1407 FORMAT_REPLACE(R32G32_SNORM, R32G32_FLOAT); 1408 FORMAT_REPLACE(R32G32B32_SNORM, R32G32B32_FLOAT); 1409 FORMAT_REPLACE(R32G32B32A32_SNORM, R32G32B32A32_FLOAT); 1410 1411 FORMAT_REPLACE(R32_SSCALED, R32_FLOAT); 1412 FORMAT_REPLACE(R32G32_SSCALED, R32G32_FLOAT); 1413 FORMAT_REPLACE(R32G32B32_SSCALED, R32G32B32_FLOAT); 1414 FORMAT_REPLACE(R32G32B32A32_SSCALED,R32G32B32A32_FLOAT); 1415 1416 FORMAT_REPLACE(R32_FIXED, R32_FLOAT); 1417 FORMAT_REPLACE(R32G32_FIXED, R32G32_FLOAT); 1418 FORMAT_REPLACE(R32G32B32_FIXED, R32G32B32_FLOAT); 1419 FORMAT_REPLACE(R32G32B32A32_FIXED, R32G32B32A32_FLOAT); 1420 1421 default:; 1422 } 1423 1424 velems->incompatible_layout = 1425 velems->incompatible_layout || 1426 velems->velem[i].src_format != velems->hw_format[i] || 1427 velems->velem[i].src_offset % 4 != 0; 1428 } 1429 1430 /* Now setup PSC. 1431 * The unused components will be replaced by (..., 0, 1). */ 1432 r300_vertex_psc(velems); 1433 1434 /* Align the formats to the size of DWORD. 1435 * We only care about the blocksizes of the formats since 1436 * swizzles are already set up. */ 1437 for (i = 0; i < count; i++) { 1438 /* This is OK because we check for aligned strides too. */ 1439 velems->hw_format_size[i] = 1440 align(util_format_get_blocksize(velems->hw_format[i]), 4); 1441 } 1442 } 1443 } 1444 return velems; 1445} 1446 1447static void r300_bind_vertex_elements_state(struct pipe_context *pipe, 1448 void *state) 1449{ 1450 struct r300_context *r300 = r300_context(pipe); 1451 struct r300_vertex_element_state *velems = state; 1452 1453 if (velems == NULL) { 1454 return; 1455 } 1456 1457 r300->velems = velems; 1458 1459 if (r300->draw) { 1460 draw_flush(r300->draw); 1461 draw_set_vertex_elements(r300->draw, velems->count, velems->velem); 1462 return; 1463 } 1464 1465 UPDATE_STATE(&velems->vertex_stream, r300->vertex_stream_state); 1466 r300->vertex_stream_state.size = (1 + velems->vertex_stream.count) * 2; 1467} 1468 1469static void r300_delete_vertex_elements_state(struct pipe_context *pipe, void *state) 1470{ 1471 FREE(state); 1472} 1473 1474static void* r300_create_vs_state(struct pipe_context* pipe, 1475 const struct pipe_shader_state* shader) 1476{ 1477 struct r300_context* r300 = r300_context(pipe); 1478 1479 struct r300_vertex_shader* vs = CALLOC_STRUCT(r300_vertex_shader); 1480 1481 /* Copy state directly into shader. */ 1482 vs->state = *shader; 1483 vs->state.tokens = tgsi_dup_tokens(shader->tokens); 1484 1485 if (r300->screen->caps.has_tcl) { 1486 r300_init_vs_outputs(vs); 1487 r300_translate_vertex_shader(r300, vs); 1488 } else { 1489 r300_draw_init_vertex_shader(r300->draw, vs); 1490 } 1491 1492 return vs; 1493} 1494 1495static void r300_bind_vs_state(struct pipe_context* pipe, void* shader) 1496{ 1497 struct r300_context* r300 = r300_context(pipe); 1498 struct r300_vertex_shader* vs = (struct r300_vertex_shader*)shader; 1499 1500 if (vs == NULL) { 1501 r300->vs_state.state = NULL; 1502 return; 1503 } 1504 if (vs == r300->vs_state.state) { 1505 return; 1506 } 1507 r300->vs_state.state = vs; 1508 1509 /* The majority of the RS block bits is dependent on the vertex shader. */ 1510 r300->rs_block_state.dirty = TRUE; /* Will be updated before the emission. */ 1511 1512 if (r300->screen->caps.has_tcl) { 1513 r300->vs_state.dirty = TRUE; 1514 r300->vs_state.size = 1515 vs->code.length + 9 + 1516 (vs->immediates_count ? vs->immediates_count * 4 + 3 : 0); 1517 1518 if (vs->externals_count) { 1519 r300->vs_constants.dirty = TRUE; 1520 r300->vs_constants.size = vs->externals_count * 4 + 3; 1521 } else { 1522 r300->vs_constants.size = 0; 1523 } 1524 1525 r300->pvs_flush.dirty = TRUE; 1526 } else { 1527 draw_flush(r300->draw); 1528 draw_bind_vertex_shader(r300->draw, 1529 (struct draw_vertex_shader*)vs->draw_vs); 1530 } 1531} 1532 1533static void r300_delete_vs_state(struct pipe_context* pipe, void* shader) 1534{ 1535 struct r300_context* r300 = r300_context(pipe); 1536 struct r300_vertex_shader* vs = (struct r300_vertex_shader*)shader; 1537 1538 if (r300->screen->caps.has_tcl) { 1539 rc_constants_destroy(&vs->code.constants); 1540 } else { 1541 draw_delete_vertex_shader(r300->draw, 1542 (struct draw_vertex_shader*)vs->draw_vs); 1543 } 1544 1545 FREE((void*)vs->state.tokens); 1546 FREE(shader); 1547} 1548 1549static void r300_set_constant_buffer(struct pipe_context *pipe, 1550 uint shader, uint index, 1551 struct pipe_resource *buf) 1552{ 1553 struct r300_context* r300 = r300_context(pipe); 1554 struct r300_constant_buffer *cbuf; 1555 struct pipe_transfer *tr; 1556 float *mapped; 1557 int max_size = 0, max_size_bytes = 0, clamped_size = 0; 1558 1559 switch (shader) { 1560 case PIPE_SHADER_VERTEX: 1561 cbuf = (struct r300_constant_buffer*)r300->vs_constants.state; 1562 max_size = 256; 1563 break; 1564 case PIPE_SHADER_FRAGMENT: 1565 cbuf = (struct r300_constant_buffer*)r300->fs_constants.state; 1566 if (r300->screen->caps.is_r500) { 1567 max_size = 256; 1568 } else { 1569 max_size = 32; 1570 } 1571 break; 1572 default: 1573 assert(0); 1574 return; 1575 } 1576 max_size_bytes = max_size * 4 * sizeof(float); 1577 1578 if (buf == NULL || buf->width0 == 0 || 1579 (mapped = pipe_buffer_map(pipe, buf, PIPE_TRANSFER_READ, &tr)) == NULL) 1580 { 1581 cbuf->count = 0; 1582 return; 1583 } 1584 1585 if (shader == PIPE_SHADER_FRAGMENT || 1586 (shader == PIPE_SHADER_VERTEX && r300->screen->caps.has_tcl)) { 1587 assert((buf->width0 % (4 * sizeof(float))) == 0); 1588 1589 /* Check the size of the constant buffer. */ 1590 /* XXX Subtract immediates and RC_STATE_* variables. */ 1591 if (buf->width0 > max_size_bytes) { 1592 fprintf(stderr, "r300: Max size of the constant buffer is " 1593 "%i*4 floats.\n", max_size); 1594 } 1595 1596 clamped_size = MIN2(buf->width0, max_size_bytes); 1597 cbuf->count = clamped_size / (4 * sizeof(float)); 1598 1599 if (shader == PIPE_SHADER_FRAGMENT && !r300->screen->caps.is_r500) { 1600 unsigned i,j; 1601 1602 /* Convert constants to float24. */ 1603 for (i = 0; i < cbuf->count; i++) 1604 for (j = 0; j < 4; j++) 1605 cbuf->constants[i][j] = pack_float24(mapped[i*4+j]); 1606 } else { 1607 memcpy(cbuf->constants, mapped, clamped_size); 1608 } 1609 } 1610 1611 if (shader == PIPE_SHADER_VERTEX) { 1612 if (r300->screen->caps.has_tcl) { 1613 if (r300->vs_constants.size) { 1614 r300->vs_constants.dirty = TRUE; 1615 } 1616 r300->pvs_flush.dirty = TRUE; 1617 } else if (r300->draw) { 1618 draw_set_mapped_constant_buffer(r300->draw, PIPE_SHADER_VERTEX, 1619 0, mapped, buf->width0); 1620 } 1621 } else if (shader == PIPE_SHADER_FRAGMENT) { 1622 r300->fs_constants.dirty = TRUE; 1623 } 1624 1625 pipe_buffer_unmap(pipe, buf, tr); 1626} 1627 1628void r300_init_state_functions(struct r300_context* r300) 1629{ 1630 r300->context.create_blend_state = r300_create_blend_state; 1631 r300->context.bind_blend_state = r300_bind_blend_state; 1632 r300->context.delete_blend_state = r300_delete_blend_state; 1633 1634 r300->context.set_blend_color = r300_set_blend_color; 1635 1636 r300->context.set_clip_state = r300_set_clip_state; 1637 r300->context.set_sample_mask = r300_set_sample_mask; 1638 1639 r300->context.set_constant_buffer = r300_set_constant_buffer; 1640 1641 r300->context.create_depth_stencil_alpha_state = r300_create_dsa_state; 1642 r300->context.bind_depth_stencil_alpha_state = r300_bind_dsa_state; 1643 r300->context.delete_depth_stencil_alpha_state = r300_delete_dsa_state; 1644 1645 r300->context.set_stencil_ref = r300_set_stencil_ref; 1646 1647 r300->context.set_framebuffer_state = r300_set_framebuffer_state; 1648 1649 r300->context.create_fs_state = r300_create_fs_state; 1650 r300->context.bind_fs_state = r300_bind_fs_state; 1651 r300->context.delete_fs_state = r300_delete_fs_state; 1652 1653 r300->context.set_polygon_stipple = r300_set_polygon_stipple; 1654 1655 r300->context.create_rasterizer_state = r300_create_rs_state; 1656 r300->context.bind_rasterizer_state = r300_bind_rs_state; 1657 r300->context.delete_rasterizer_state = r300_delete_rs_state; 1658 1659 r300->context.create_sampler_state = r300_create_sampler_state; 1660 r300->context.bind_fragment_sampler_states = r300_bind_sampler_states; 1661 r300->context.bind_vertex_sampler_states = r300_lacks_vertex_textures; 1662 r300->context.delete_sampler_state = r300_delete_sampler_state; 1663 1664 r300->context.set_fragment_sampler_views = r300_set_fragment_sampler_views; 1665 r300->context.create_sampler_view = r300_create_sampler_view; 1666 r300->context.sampler_view_destroy = r300_sampler_view_destroy; 1667 1668 r300->context.set_scissor_state = r300_set_scissor_state; 1669 1670 r300->context.set_viewport_state = r300_set_viewport_state; 1671 1672 r300->context.set_vertex_buffers = r300_set_vertex_buffers; 1673 1674 r300->context.create_vertex_elements_state = r300_create_vertex_elements_state; 1675 r300->context.bind_vertex_elements_state = r300_bind_vertex_elements_state; 1676 r300->context.delete_vertex_elements_state = r300_delete_vertex_elements_state; 1677 1678 r300->context.create_vs_state = r300_create_vs_state; 1679 r300->context.bind_vs_state = r300_bind_vs_state; 1680 r300->context.delete_vs_state = r300_delete_vs_state; 1681} 1682