sp_tex_tile_cache.c revision 90671fcdda52a83e2bbba581e985d25c6bff961e
1/************************************************************************** 2 * 3 * Copyright 2007 Tungsten Graphics, Inc., Cedar Park, Texas. 4 * All Rights Reserved. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the 8 * "Software"), to deal in the Software without restriction, including 9 * without limitation the rights to use, copy, modify, merge, publish, 10 * distribute, sub license, and/or sell copies of the Software, and to 11 * permit persons to whom the Software is furnished to do so, subject to 12 * the following conditions: 13 * 14 * The above copyright notice and this permission notice (including the 15 * next paragraph) shall be included in all copies or substantial portions 16 * of the Software. 17 * 18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. 21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR 22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, 23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE 24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 25 * 26 **************************************************************************/ 27 28/** 29 * Texture tile caching. 30 * 31 * Author: 32 * Brian Paul 33 */ 34 35#include "util/u_inlines.h" 36#include "util/u_memory.h" 37#include "util/u_tile.h" 38#include "util/u_math.h" 39#include "sp_context.h" 40#include "sp_texture.h" 41#include "sp_tex_tile_cache.h" 42 43 44 45struct softpipe_tex_tile_cache * 46sp_create_tex_tile_cache( struct pipe_context *pipe ) 47{ 48 struct softpipe_tex_tile_cache *tc; 49 uint pos; 50 51 /* make sure max texture size works */ 52 assert((TILE_SIZE << TEX_ADDR_BITS) >= (1 << (SP_MAX_TEXTURE_2D_LEVELS-1))); 53 54 tc = CALLOC_STRUCT( softpipe_tex_tile_cache ); 55 if (tc) { 56 tc->pipe = pipe; 57 for (pos = 0; pos < NUM_ENTRIES; pos++) { 58 tc->entries[pos].addr.bits.invalid = 1; 59 } 60 tc->last_tile = &tc->entries[0]; /* any tile */ 61 } 62 return tc; 63} 64 65 66void 67sp_destroy_tex_tile_cache(struct softpipe_tex_tile_cache *tc) 68{ 69 if (tc) { 70 uint pos; 71 72 for (pos = 0; pos < NUM_ENTRIES; pos++) { 73 /*assert(tc->entries[pos].x < 0);*/ 74 } 75 if (tc->transfer) { 76 tc->pipe->transfer_destroy(tc->pipe, tc->transfer); 77 } 78 if (tc->tex_trans) { 79 tc->pipe->transfer_destroy(tc->pipe, tc->tex_trans); 80 } 81 82 FREE( tc ); 83 } 84} 85 86 87 88 89void 90sp_tex_tile_cache_map_transfers(struct softpipe_tex_tile_cache *tc) 91{ 92 if (tc->tex_trans && !tc->tex_trans_map) 93 tc->tex_trans_map = tc->pipe->transfer_map(tc->pipe, tc->tex_trans); 94} 95 96 97void 98sp_tex_tile_cache_unmap_transfers(struct softpipe_tex_tile_cache *tc) 99{ 100 if (tc->tex_trans_map) { 101 tc->pipe->transfer_unmap(tc->pipe, tc->tex_trans); 102 tc->tex_trans_map = NULL; 103 } 104} 105 106/** 107 * Invalidate all cached tiles for the cached texture. 108 * Should be called when the texture is modified. 109 */ 110void 111sp_tex_tile_cache_validate_texture(struct softpipe_tex_tile_cache *tc) 112{ 113 unsigned i; 114 115 assert(tc); 116 assert(tc->texture); 117 118 for (i = 0; i < NUM_ENTRIES; i++) { 119 tc->entries[i].addr.bits.invalid = 1; 120 } 121} 122 123static boolean 124sp_tex_tile_is_compat_view(struct softpipe_tex_tile_cache *tc, 125 struct pipe_sampler_view *view) 126{ 127 if (!view) 128 return FALSE; 129 return (tc->texture == view->texture && 130 tc->format == view->format && 131 tc->swizzle_r == view->swizzle_r && 132 tc->swizzle_g == view->swizzle_g && 133 tc->swizzle_b == view->swizzle_b && 134 tc->swizzle_a == view->swizzle_a); 135} 136 137/** 138 * Specify the sampler view to cache. 139 */ 140void 141sp_tex_tile_cache_set_sampler_view(struct softpipe_tex_tile_cache *tc, 142 struct pipe_sampler_view *view) 143{ 144 struct pipe_resource *texture = view ? view->texture : NULL; 145 uint i; 146 147 assert(!tc->transfer); 148 149 if (!sp_tex_tile_is_compat_view(tc, view)) { 150 pipe_resource_reference(&tc->texture, texture); 151 152 if (tc->tex_trans) { 153 if (tc->tex_trans_map) { 154 tc->pipe->transfer_unmap(tc->pipe, tc->tex_trans); 155 tc->tex_trans_map = NULL; 156 } 157 158 tc->pipe->transfer_destroy(tc->pipe, tc->tex_trans); 159 tc->tex_trans = NULL; 160 } 161 162 if (view) { 163 tc->swizzle_r = view->swizzle_r; 164 tc->swizzle_g = view->swizzle_g; 165 tc->swizzle_b = view->swizzle_b; 166 tc->swizzle_a = view->swizzle_a; 167 tc->format = view->format; 168 } 169 170 /* mark as entries as invalid/empty */ 171 /* XXX we should try to avoid this when the teximage hasn't changed */ 172 for (i = 0; i < NUM_ENTRIES; i++) { 173 tc->entries[i].addr.bits.invalid = 1; 174 } 175 176 tc->tex_face = -1; /* any invalid value here */ 177 } 178} 179 180 181 182 183/** 184 * Flush the tile cache: write all dirty tiles back to the transfer. 185 * any tiles "flagged" as cleared will be "really" cleared. 186 */ 187void 188sp_flush_tex_tile_cache(struct softpipe_tex_tile_cache *tc) 189{ 190 int pos; 191 192 if (tc->texture) { 193 /* caching a texture, mark all entries as empty */ 194 for (pos = 0; pos < NUM_ENTRIES; pos++) { 195 tc->entries[pos].addr.bits.invalid = 1; 196 } 197 tc->tex_face = -1; 198 } 199 200} 201 202 203/** 204 * Given the texture face, level, zslice, x and y values, compute 205 * the cache entry position/index where we'd hope to find the 206 * cached texture tile. 207 * This is basically a direct-map cache. 208 * XXX There's probably lots of ways in which we can improve this. 209 */ 210static INLINE uint 211tex_cache_pos( union tex_tile_address addr ) 212{ 213 uint entry = (addr.bits.x + 214 addr.bits.y * 9 + 215 addr.bits.z * 3 + 216 addr.bits.face + 217 addr.bits.level * 7); 218 219 return entry % NUM_ENTRIES; 220} 221 222/** 223 * Similar to sp_get_cached_tile() but for textures. 224 * Tiles are read-only and indexed with more params. 225 */ 226const struct softpipe_tex_cached_tile * 227sp_find_cached_tile_tex(struct softpipe_tex_tile_cache *tc, 228 union tex_tile_address addr ) 229{ 230 struct softpipe_tex_cached_tile *tile; 231 232 tile = tc->entries + tex_cache_pos( addr ); 233 234 if (addr.value != tile->addr.value) { 235 236 /* cache miss. Most misses are because we've invaldiated the 237 * texture cache previously -- most commonly on binding a new 238 * texture. Currently we effectively flush the cache on texture 239 * bind. 240 */ 241#if 0 242 _debug_printf("miss at %u: x=%d y=%d z=%d face=%d level=%d\n" 243 " tile %u: x=%d y=%d z=%d face=%d level=%d\n", 244 pos, x/TILE_SIZE, y/TILE_SIZE, z, face, level, 245 pos, tile->addr.bits.x, tile->addr.bits.y, tile->z, tile->face, tile->level); 246#endif 247 248 /* check if we need to get a new transfer */ 249 if (!tc->tex_trans || 250 tc->tex_face != addr.bits.face || 251 tc->tex_level != addr.bits.level || 252 tc->tex_z != addr.bits.z) { 253 /* get new transfer (view into texture) */ 254 255 if (tc->tex_trans) { 256 if (tc->tex_trans_map) { 257 tc->pipe->transfer_unmap(tc->pipe, tc->tex_trans); 258 tc->tex_trans_map = NULL; 259 } 260 261 tc->pipe->transfer_destroy(tc->pipe, tc->tex_trans); 262 tc->tex_trans = NULL; 263 } 264 265 tc->tex_trans = 266 pipe_get_transfer(tc->pipe, tc->texture, 267 addr.bits.level, 268 addr.bits.face + addr.bits.z, 269 PIPE_TRANSFER_READ | PIPE_TRANSFER_UNSYNCHRONIZED, 270 0, 0, 271 u_minify(tc->texture->width0, addr.bits.level), 272 u_minify(tc->texture->height0, addr.bits.level)); 273 274 tc->tex_trans_map = tc->pipe->transfer_map(tc->pipe, tc->tex_trans); 275 276 tc->tex_face = addr.bits.face; 277 tc->tex_level = addr.bits.level; 278 tc->tex_z = addr.bits.z; 279 } 280 281 /* Get tile from the transfer (view into texture), explicitly passing 282 * the image format. 283 */ 284 pipe_get_tile_rgba_format(tc->pipe, 285 tc->tex_trans, 286 addr.bits.x * TILE_SIZE, 287 addr.bits.y * TILE_SIZE, 288 TILE_SIZE, 289 TILE_SIZE, 290 tc->format, 291 (float *) tile->data.color); 292 293 tile->addr = addr; 294 } 295 296 tc->last_tile = tile; 297 return tile; 298} 299