i915_context.h revision 2c6793fb6bc89df16c23f727bcb072a157ab8d10 
1 /**************************************************************************
2 *
3 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28#ifndef I915CONTEXT_INC
29#define I915CONTEXT_INC
30
31#include "intel_context.h"
32
33#define I915_FALLBACK_TEXTURE		 0x1000
34#define I915_FALLBACK_COLORMASK		 0x2000
35#define I915_FALLBACK_STENCIL		 0x4000
36#define I915_FALLBACK_STIPPLE		 0x8000
37#define I915_FALLBACK_PROGRAM		 0x10000
38#define I915_FALLBACK_LOGICOP		 0x20000
39#define I915_FALLBACK_POLYGON_SMOOTH	 0x40000
40#define I915_FALLBACK_POINT_SMOOTH	 0x80000
41#define I915_FALLBACK_POINT_SPRITE_COORD_ORIGIN	 0x100000
42#define I915_FALLBACK_DRAW_OFFSET	 0x200000
43
44#define I915_UPLOAD_CTX              0x1
45#define I915_UPLOAD_BUFFERS          0x2
46#define I915_UPLOAD_STIPPLE          0x4
47#define I915_UPLOAD_PROGRAM          0x8
48#define I915_UPLOAD_CONSTANTS        0x10
49#define I915_UPLOAD_FOG              0x20
50#define I915_UPLOAD_INVARIENT        0x40
51#define I915_UPLOAD_DEFAULTS         0x80
52#define I915_UPLOAD_RASTER_RULES     0x100
53#define I915_UPLOAD_BLEND            0x200
54#define I915_UPLOAD_TEX(i)           (0x00010000<<(i))
55#define I915_UPLOAD_TEX_ALL          (0x00ff0000)
56#define I915_UPLOAD_TEX_0_SHIFT      16
57
58
59/* State structure offsets - these will probably disappear.
60 */
61#define I915_DESTREG_CBUFADDR0 0
62#define I915_DESTREG_CBUFADDR1 1
63#define I915_DESTREG_DBUFADDR0 3
64#define I915_DESTREG_DBUFADDR1 4
65#define I915_DESTREG_DV0 6
66#define I915_DESTREG_DV1 7
67#define I915_DESTREG_SENABLE 8
68#define I915_DESTREG_SR0 9
69#define I915_DESTREG_SR1 10
70#define I915_DESTREG_SR2 11
71#define I915_DESTREG_DRAWRECT0 12
72#define I915_DESTREG_DRAWRECT1 13
73#define I915_DESTREG_DRAWRECT2 14
74#define I915_DESTREG_DRAWRECT3 15
75#define I915_DESTREG_DRAWRECT4 16
76#define I915_DESTREG_DRAWRECT5 17
77#define I915_DEST_SETUP_SIZE 18
78
79#define I915_CTXREG_STATE4		0
80#define I915_CTXREG_LI			1
81#define I915_CTXREG_LIS2		2
82#define I915_CTXREG_LIS4		3
83#define I915_CTXREG_LIS5		4
84#define I915_CTXREG_LIS6		5
85#define I915_CTXREG_BF_STENCIL_OPS	6
86#define I915_CTXREG_BF_STENCIL_MASKS	7
87#define I915_CTX_SETUP_SIZE		8
88
89#define I915_BLENDREG_IAB		0
90#define I915_BLENDREG_BLENDCOLOR0	1
91#define I915_BLENDREG_BLENDCOLOR1	2
92#define I915_BLEND_SETUP_SIZE		3
93
94#define I915_FOGREG_COLOR		0
95#define I915_FOGREG_MODE0		1
96#define I915_FOGREG_MODE1		2
97#define I915_FOGREG_MODE2		3
98#define I915_FOGREG_MODE3		4
99#define I915_FOG_SETUP_SIZE		5
100
101#define I915_STPREG_ST0        0
102#define I915_STPREG_ST1        1
103#define I915_STP_SETUP_SIZE    2
104
105#define I915_TEXREG_MS3        1
106#define I915_TEXREG_MS4        2
107#define I915_TEXREG_SS2        3
108#define I915_TEXREG_SS3        4
109#define I915_TEXREG_SS4        5
110#define I915_TEX_SETUP_SIZE    6
111
112#define I915_DEFREG_C0    0
113#define I915_DEFREG_C1    1
114#define I915_DEFREG_S0    2
115#define I915_DEFREG_S1    3
116#define I915_DEFREG_Z0    4
117#define I915_DEFREG_Z1    5
118#define I915_DEF_SETUP_SIZE    6
119
120enum {
121   I915_RASTER_RULES,
122   I915_RASTER_RULES_SETUP_SIZE,
123};
124
125#define I915_MAX_CONSTANT      32
126#define I915_CONSTANT_SIZE     (2+(4*I915_MAX_CONSTANT))
127
128#define I915_MAX_TEX_INDIRECT 4
129#define I915_MAX_TEX_INSN     32
130#define I915_MAX_ALU_INSN     64
131#define I915_MAX_DECL_INSN    27
132#define I915_MAX_TEMPORARY    16
133
134#define I915_MAX_INSN          (I915_MAX_DECL_INSN + \
135				I915_MAX_TEX_INSN + \
136				I915_MAX_ALU_INSN)
137
138/* Maximum size of the program packet, which matches the limits on
139 * decl, tex, and ALU instructions.
140 */
141#define I915_PROGRAM_SIZE      (I915_MAX_INSN * 3 + 1)
142
143/* Hardware version of a parsed fragment program.  "Derived" from the
144 * mesa fragment_program struct.
145 */
146struct i915_fragment_program
147{
148   struct gl_fragment_program FragProg;
149
150   GLboolean translated;
151   GLboolean params_uptodate;
152   GLboolean on_hardware;
153   GLboolean error;             /* If program is malformed for any reason. */
154
155   /** Record of which phases R registers were last written in. */
156   GLuint register_phases[16];
157   GLuint indirections;
158   GLuint nr_tex_indirect;
159   GLuint nr_tex_insn;
160   GLuint nr_alu_insn;
161   GLuint nr_decl_insn;
162
163
164
165
166   /* TODO: split between the stored representation of a program and
167    * the state used to build that representation.
168    */
169   struct gl_context *ctx;
170
171   /* declarations contains the packet header. */
172   GLuint declarations[I915_MAX_DECL_INSN * 3 + 1];
173   GLuint program[(I915_MAX_TEX_INSN + I915_MAX_ALU_INSN) * 3];
174
175   GLfloat constant[I915_MAX_CONSTANT][4];
176   GLuint constant_flags[I915_MAX_CONSTANT];
177   GLuint nr_constants;
178
179   GLuint *csr;                 /* Cursor, points into program.
180                                 */
181
182   GLuint *decl;                /* Cursor, points into declarations.
183                                 */
184
185   GLuint decl_s;               /* flags for which s regs need to be decl'd */
186   GLuint decl_t;               /* flags for which t regs need to be decl'd */
187
188   GLuint temp_flag;            /* Tracks temporary regs which are in
189                                 * use.
190                                 */
191
192   GLuint utemp_flag;           /* Tracks TYPE_U temporary regs which are in
193                                 * use.
194                                 */
195
196
197   /* Track which R registers are "live" for each instruction.
198    * A register is live between the time it's written to and the last time
199    * it's read. */
200   GLuint usedRegs[I915_MAX_INSN];
201
202   /* Helpers for i915_fragprog.c:
203    */
204   GLuint wpos_tex;
205   GLboolean depth_written;
206
207   struct
208   {
209      GLuint reg;               /* Hardware constant idx */
210      const GLfloat *values;    /* Pointer to tracked values */
211   } param[I915_MAX_CONSTANT];
212   GLuint nr_params;
213};
214
215
216
217
218
219
220
221#define I915_TEX_UNITS 8
222
223
224struct i915_hw_state
225{
226   GLuint Ctx[I915_CTX_SETUP_SIZE];
227   GLuint Blend[I915_BLEND_SETUP_SIZE];
228   GLuint Buffer[I915_DEST_SETUP_SIZE];
229   GLuint Stipple[I915_STP_SETUP_SIZE];
230   GLuint Fog[I915_FOG_SETUP_SIZE];
231   GLuint Defaults[I915_DEF_SETUP_SIZE];
232   GLuint RasterRules[I915_RASTER_RULES_SETUP_SIZE];
233   GLuint Tex[I915_TEX_UNITS][I915_TEX_SETUP_SIZE];
234   GLuint Constant[I915_CONSTANT_SIZE];
235   GLuint ConstantSize;
236   GLuint Program[I915_PROGRAM_SIZE];
237   GLuint ProgramSize;
238
239   /* Region pointers for relocation:
240    */
241   struct intel_region *draw_region;
242   struct intel_region *depth_region;
243/*    struct intel_region *tex_region[I915_TEX_UNITS]; */
244
245   /* Regions aren't actually that appropriate here as the memory may
246    * be from a PBO or FBO.  Will have to do this for draw and depth for
247    * FBO's...
248    */
249   drm_intel_bo *tex_buffer[I915_TEX_UNITS];
250   GLuint tex_offset[I915_TEX_UNITS];
251
252
253   GLuint active;               /* I915_UPLOAD_* */
254   GLuint emitted;              /* I915_UPLOAD_* */
255};
256
257#define I915_FOG_PIXEL  2
258#define I915_FOG_VERTEX 1
259#define I915_FOG_NONE   0
260
261struct i915_context
262{
263   struct intel_context intel;
264
265   GLuint last_ReallyEnabled;
266   GLuint vertex_fog;
267   GLuint lodbias_ss2[MAX_TEXTURE_UNITS];
268
269
270   struct i915_fragment_program *current_program;
271
272   drm_intel_bo *current_vb_bo;
273   unsigned int current_vertex_size;
274
275   struct i915_hw_state state;
276   uint32_t last_draw_offset;
277   GLuint last_sampler;
278};
279
280
281#define I915_STATECHANGE(i915, flag)					\
282do {									\
283   INTEL_FIREVERTICES( &(i915)->intel );					\
284   (i915)->state.emitted &= ~(flag);					\
285} while (0)
286
287#define I915_ACTIVESTATE(i915, flag, mode)			\
288do {								\
289   INTEL_FIREVERTICES( &(i915)->intel );				\
290   if (mode)							\
291      (i915)->state.active |= (flag);				\
292   else								\
293      (i915)->state.active &= ~(flag);				\
294} while (0)
295
296
297/*======================================================================
298 * i915_vtbl.c
299 */
300extern void i915InitVtbl(struct i915_context *i915);
301
302extern void
303i915_state_draw_region(struct intel_context *intel,
304                       struct i915_hw_state *state,
305                       struct intel_region *color_region,
306                       struct intel_region *depth_region);
307
308
309
310#define SZ_TO_HW(sz)  ((sz-2)&0x3)
311#define EMIT_SZ(sz)   (EMIT_1F + (sz) - 1)
312#define EMIT_ATTR( ATTR, STYLE, S4, SZ )				\
313do {									\
314   intel->vertex_attrs[intel->vertex_attr_count].attrib = (ATTR);	\
315   intel->vertex_attrs[intel->vertex_attr_count].format = (STYLE);	\
316   s4 |= S4;								\
317   intel->vertex_attr_count++;						\
318   offset += (SZ);							\
319} while (0)
320
321#define EMIT_PAD( N )							\
322do {									\
323   intel->vertex_attrs[intel->vertex_attr_count].attrib = 0;		\
324   intel->vertex_attrs[intel->vertex_attr_count].format = EMIT_PAD;	\
325   intel->vertex_attrs[intel->vertex_attr_count].offset = (N);		\
326   intel->vertex_attr_count++;						\
327   offset += (N);							\
328} while (0)
329
330
331
332/*======================================================================
333 * i915_context.c
334 */
335extern GLboolean i915CreateContext(int api,
336				   const struct gl_config * mesaVis,
337                                   __DRIcontext * driContextPriv,
338                                   void *sharedContextPrivate);
339
340
341/*======================================================================
342 * i915_debug.c
343 */
344extern void i915_disassemble_program(const GLuint * program, GLuint sz);
345extern void i915_print_ureg(const char *msg, GLuint ureg);
346
347
348/*======================================================================
349 * i915_state.c
350 */
351extern void i915InitStateFunctions(struct dd_function_table *functions);
352extern void i915InitState(struct i915_context *i915);
353extern void i915_update_fog(struct gl_context * ctx);
354extern void i915_update_stencil(struct gl_context * ctx);
355extern void i915_update_provoking_vertex(struct gl_context *ctx);
356
357
358/*======================================================================
359 * i915_tex.c
360 */
361extern void i915UpdateTextureState(struct intel_context *intel);
362extern void i915InitTextureFuncs(struct dd_function_table *functions);
363
364/*======================================================================
365 * i915_fragprog.c
366 */
367extern void i915ValidateFragmentProgram(struct i915_context *i915);
368extern void i915InitFragProgFuncs(struct dd_function_table *functions);
369
370/*======================================================================
371 * Inline conversion functions.  These are better-typed than the
372 * macros used previously:
373 */
374static INLINE struct i915_context *
375i915_context(struct gl_context * ctx)
376{
377   return (struct i915_context *) ctx;
378}
379
380
381
382#define I915_CONTEXT(ctx)	i915_context(ctx)
383
384
385
386#endif
387