brw_cc.c revision 9136e1f2c80ce891fb6270341a4316f219c89d49
1/* 2 Copyright (C) Intel Corp. 2006. All Rights Reserved. 3 Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to 4 develop this 3D driver. 5 6 Permission is hereby granted, free of charge, to any person obtaining 7 a copy of this software and associated documentation files (the 8 "Software"), to deal in the Software without restriction, including 9 without limitation the rights to use, copy, modify, merge, publish, 10 distribute, sublicense, and/or sell copies of the Software, and to 11 permit persons to whom the Software is furnished to do so, subject to 12 the following conditions: 13 14 The above copyright notice and this permission notice (including the 15 next paragraph) shall be included in all copies or substantial 16 portions of the Software. 17 18 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 19 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 20 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. 21 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE 22 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION 23 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION 24 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 25 26 **********************************************************************/ 27 /* 28 * Authors: 29 * Keith Whitwell <keith@tungstengraphics.com> 30 */ 31 32 33#include "brw_context.h" 34#include "brw_state.h" 35#include "brw_defines.h" 36#include "brw_util.h" 37#include "macros.h" 38#include "enums.h" 39 40static void upload_cc_vp( struct brw_context *brw ) 41{ 42 struct brw_cc_viewport ccv; 43 44 memset(&ccv, 0, sizeof(ccv)); 45 46 ccv.min_depth = 0.0; 47 ccv.max_depth = 1.0; 48 49 dri_bo_unreference(brw->cc.vp_bo); 50 brw->cc.vp_bo = brw_cache_data( &brw->cache, BRW_CC_VP, &ccv, NULL, 0 ); 51} 52 53const struct brw_tracked_state brw_cc_vp = { 54 .dirty = { 55 .mesa = 0, 56 .brw = BRW_NEW_CONTEXT, 57 .cache = 0 58 }, 59 .update = upload_cc_vp 60}; 61 62 63static void upload_cc_unit( struct brw_context *brw ) 64{ 65 struct brw_cc_unit_state cc; 66 67 memset(&cc, 0, sizeof(cc)); 68 69 /* _NEW_STENCIL */ 70 if (brw->attribs.Stencil->Enabled) { 71 cc.cc0.stencil_enable = brw->attribs.Stencil->Enabled; 72 cc.cc0.stencil_func = intel_translate_compare_func(brw->attribs.Stencil->Function[0]); 73 cc.cc0.stencil_fail_op = intel_translate_stencil_op(brw->attribs.Stencil->FailFunc[0]); 74 cc.cc0.stencil_pass_depth_fail_op = intel_translate_stencil_op(brw->attribs.Stencil->ZFailFunc[0]); 75 cc.cc0.stencil_pass_depth_pass_op = intel_translate_stencil_op(brw->attribs.Stencil->ZPassFunc[0]); 76 cc.cc1.stencil_ref = brw->attribs.Stencil->Ref[0]; 77 cc.cc1.stencil_write_mask = brw->attribs.Stencil->WriteMask[0]; 78 cc.cc1.stencil_test_mask = brw->attribs.Stencil->ValueMask[0]; 79 80 if (brw->attribs.Stencil->_TestTwoSide) { 81 cc.cc0.bf_stencil_enable = brw->attribs.Stencil->_TestTwoSide; 82 cc.cc0.bf_stencil_func = intel_translate_compare_func(brw->attribs.Stencil->Function[1]); 83 cc.cc0.bf_stencil_fail_op = intel_translate_stencil_op(brw->attribs.Stencil->FailFunc[1]); 84 cc.cc0.bf_stencil_pass_depth_fail_op = intel_translate_stencil_op(brw->attribs.Stencil->ZFailFunc[1]); 85 cc.cc0.bf_stencil_pass_depth_pass_op = intel_translate_stencil_op(brw->attribs.Stencil->ZPassFunc[1]); 86 cc.cc1.bf_stencil_ref = brw->attribs.Stencil->Ref[1]; 87 cc.cc2.bf_stencil_write_mask = brw->attribs.Stencil->WriteMask[1]; 88 cc.cc2.bf_stencil_test_mask = brw->attribs.Stencil->ValueMask[1]; 89 } 90 91 /* Not really sure about this: 92 */ 93 if (brw->attribs.Stencil->WriteMask[0] || 94 (brw->attribs.Stencil->_TestTwoSide && 95 brw->attribs.Stencil->WriteMask[1])) 96 cc.cc0.stencil_write_enable = 1; 97 } 98 99 /* _NEW_COLOR */ 100 if (brw->attribs.Color->_LogicOpEnabled) { 101 cc.cc2.logicop_enable = 1; 102 cc.cc5.logicop_func = intel_translate_logic_op( brw->attribs.Color->LogicOp ); 103 } 104 else if (brw->attribs.Color->BlendEnabled) { 105 GLenum eqRGB = brw->attribs.Color->BlendEquationRGB; 106 GLenum eqA = brw->attribs.Color->BlendEquationA; 107 GLenum srcRGB = brw->attribs.Color->BlendSrcRGB; 108 GLenum dstRGB = brw->attribs.Color->BlendDstRGB; 109 GLenum srcA = brw->attribs.Color->BlendSrcA; 110 GLenum dstA = brw->attribs.Color->BlendDstA; 111 112 if (eqRGB == GL_MIN || eqRGB == GL_MAX) { 113 srcRGB = dstRGB = GL_ONE; 114 } 115 116 if (eqA == GL_MIN || eqA == GL_MAX) { 117 srcA = dstA = GL_ONE; 118 } 119 120 cc.cc6.dest_blend_factor = brw_translate_blend_factor(dstRGB); 121 cc.cc6.src_blend_factor = brw_translate_blend_factor(srcRGB); 122 cc.cc6.blend_function = brw_translate_blend_equation( eqRGB ); 123 124 cc.cc5.ia_dest_blend_factor = brw_translate_blend_factor(dstA); 125 cc.cc5.ia_src_blend_factor = brw_translate_blend_factor(srcA); 126 cc.cc5.ia_blend_function = brw_translate_blend_equation( eqA ); 127 128 cc.cc3.blend_enable = 1; 129 cc.cc3.ia_blend_enable = (srcA != srcRGB || 130 dstA != dstRGB || 131 eqA != eqRGB); 132 } 133 134 if (brw->attribs.Color->AlphaEnabled) { 135 cc.cc3.alpha_test = 1; 136 cc.cc3.alpha_test_func = intel_translate_compare_func(brw->attribs.Color->AlphaFunc); 137 138 UNCLAMPED_FLOAT_TO_UBYTE(cc.cc7.alpha_ref.ub[0], brw->attribs.Color->AlphaRef); 139 140 cc.cc3.alpha_test_format = BRW_ALPHATEST_FORMAT_UNORM8; 141 } 142 143 if (brw->attribs.Color->DitherFlag) { 144 cc.cc5.dither_enable = 1; 145 cc.cc6.y_dither_offset = 0; 146 cc.cc6.x_dither_offset = 0; 147 } 148 149 /* _NEW_DEPTH */ 150 if (brw->attribs.Depth->Test) { 151 cc.cc2.depth_test = brw->attribs.Depth->Test; 152 cc.cc2.depth_test_function = intel_translate_compare_func(brw->attribs.Depth->Func); 153 cc.cc2.depth_write_enable = brw->attribs.Depth->Mask; 154 } 155 156 /* CACHE_NEW_CC_VP */ 157 cc.cc4.cc_viewport_state_offset = brw->cc.vp_bo->offset >> 5; /* reloc */ 158 159 if (INTEL_DEBUG & DEBUG_STATS) 160 cc.cc5.statistics_enable = 1; 161 162 dri_bo_unreference(brw->cc.state_bo); 163 brw->cc.state_bo = brw_cache_data( &brw->cache, BRW_CC_UNIT, &cc, 164 &brw->cc.vp_bo, 1); 165} 166 167static void emit_reloc_cc_unit(struct brw_context *brw) 168{ 169 /* Emit CC viewport relocation */ 170 dri_emit_reloc(brw->cc.state_bo, 171 DRM_BO_FLAG_MEM_TT | DRM_BO_FLAG_READ, 172 0, 173 offsetof(struct brw_cc_unit_state, cc4), 174 brw->cc.vp_bo); 175} 176 177const struct brw_tracked_state brw_cc_unit = { 178 .dirty = { 179 .mesa = _NEW_STENCIL | _NEW_COLOR | _NEW_DEPTH, 180 .brw = 0, 181 .cache = CACHE_NEW_CC_VP 182 }, 183 .update = upload_cc_unit, 184 .emit_reloc = emit_reloc_cc_unit, 185}; 186 187 188 189