intel_blit.c revision 7cc7ff7051d427ff45b4d7d3664e2eecd13d0e13
1/************************************************************************** 2 * 3 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas. 4 * All Rights Reserved. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the 8 * "Software"), to deal in the Software without restriction, including 9 * without limitation the rights to use, copy, modify, merge, publish, 10 * distribute, sub license, and/or sell copies of the Software, and to 11 * permit persons to whom the Software is furnished to do so, subject to 12 * the following conditions: 13 * 14 * The above copyright notice and this permission notice (including the 15 * next paragraph) shall be included in all copies or substantial portions 16 * of the Software. 17 * 18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. 21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR 22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, 23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE 24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 25 * 26 **************************************************************************/ 27 28 29#include <stdio.h> 30#include <errno.h> 31 32#include "mtypes.h" 33#include "context.h" 34#include "enums.h" 35 36#include "intel_batchbuffer.h" 37#include "intel_blit.h" 38#include "intel_buffers.h" 39#include "intel_context.h" 40#include "intel_fbo.h" 41#include "intel_reg.h" 42#include "intel_regions.h" 43 44#define FILE_DEBUG_FLAG DEBUG_BLIT 45 46/** 47 * Copy the back color buffer to the front color buffer. 48 * Used for SwapBuffers(). 49 */ 50void 51intelCopyBuffer(const __DRIdrawablePrivate * dPriv, 52 const drm_clip_rect_t * rect) 53{ 54 55 struct intel_context *intel; 56 const intelScreenPrivate *intelScreen; 57 int ret; 58 59 DBG("%s\n", __FUNCTION__); 60 61 assert(dPriv); 62 63 intel = intelScreenContext(dPriv->driScreenPriv->private); 64 if (!intel) 65 return; 66 67 intelScreen = intel->intelScreen; 68 69 if (intel->last_swap_fence) { 70 dri_fence_wait(intel->last_swap_fence); 71 dri_fence_unreference(intel->last_swap_fence); 72 intel->last_swap_fence = NULL; 73 } 74 intel->last_swap_fence = intel->first_swap_fence; 75 intel->first_swap_fence = NULL; 76 77 /* The LOCK_HARDWARE is required for the cliprects. Buffer offsets 78 * should work regardless. 79 */ 80 LOCK_HARDWARE(intel); 81 82 if (dPriv && dPriv->numClipRects) { 83 struct intel_framebuffer *intel_fb = dPriv->driverPrivate; 84 struct intel_region *src, *dst; 85 int nbox = dPriv->numClipRects; 86 drm_clip_rect_t *pbox = dPriv->pClipRects; 87 int cpp; 88 int src_pitch, dst_pitch; 89 unsigned short src_x, src_y; 90 int BR13, CMD; 91 int i; 92 93 src = intel_get_rb_region(&intel_fb->Base, BUFFER_BACK_LEFT); 94 dst = intel_get_rb_region(&intel_fb->Base, BUFFER_FRONT_LEFT); 95 96 src_pitch = src->pitch * src->cpp; 97 dst_pitch = dst->pitch * dst->cpp; 98 99 cpp = src->cpp; 100 101 ASSERT(intel_fb); 102 ASSERT(intel_fb->Base.Name == 0); /* Not a user-created FBO */ 103 ASSERT(src); 104 ASSERT(dst); 105 ASSERT(src->cpp == dst->cpp); 106 107 if (cpp == 2) { 108 BR13 = (0xCC << 16) | (1 << 24); 109 CMD = XY_SRC_COPY_BLT_CMD; 110 } 111 else { 112 BR13 = (0xCC << 16) | (1 << 24) | (1 << 25); 113 CMD = XY_SRC_COPY_BLT_CMD | XY_BLT_WRITE_ALPHA | XY_BLT_WRITE_RGB; 114 } 115 116#ifndef I915 117 if (src->tiled) { 118 CMD |= XY_SRC_TILED; 119 src_pitch /= 4; 120 } 121 if (dst->tiled) { 122 CMD |= XY_DST_TILED; 123 dst_pitch /= 4; 124 } 125#endif 126 127 again: 128 ret = dri_bufmgr_check_aperture_space(dst->buffer); 129 ret |= dri_bufmgr_check_aperture_space(src->buffer); 130 131 if (ret) { 132 intel_batchbuffer_flush(intel->batch); 133 goto again; 134 } 135 136 for (i = 0; i < nbox; i++, pbox++) { 137 drm_clip_rect_t box = *pbox; 138 139 if (rect) { 140 if (!intel_intersect_cliprects(&box, &box, rect)) 141 continue; 142 } 143 144 if (box.x1 >= box.x2 || 145 box.y1 >= box.y2) 146 continue; 147 148 assert(box.x1 < box.x2); 149 assert(box.y1 < box.y2); 150 src_x = box.x1 - dPriv->x + dPriv->backX; 151 src_y = box.y1 - dPriv->y + dPriv->backY; 152 153 BEGIN_BATCH(8, REFERENCES_CLIPRECTS); 154 OUT_BATCH(CMD); 155 OUT_BATCH(BR13 | dst_pitch); 156 OUT_BATCH((box.y1 << 16) | box.x1); 157 OUT_BATCH((box.y2 << 16) | box.x2); 158 159 OUT_RELOC(dst->buffer, DRM_BO_FLAG_MEM_TT | DRM_BO_FLAG_WRITE, 0); 160 OUT_BATCH((src_y << 16) | src_x); 161 OUT_BATCH(src_pitch); 162 OUT_RELOC(src->buffer, DRM_BO_FLAG_MEM_TT | DRM_BO_FLAG_READ, 0); 163 ADVANCE_BATCH(); 164 } 165 166 if (intel->first_swap_fence) 167 dri_fence_unreference(intel->first_swap_fence); 168 intel_batchbuffer_flush(intel->batch); 169 intel->first_swap_fence = intel->batch->last_fence; 170 if (intel->first_swap_fence) 171 dri_fence_reference(intel->first_swap_fence); 172 } 173 174 UNLOCK_HARDWARE(intel); 175} 176 177 178 179 180void 181intelEmitFillBlit(struct intel_context *intel, 182 GLuint cpp, 183 GLshort dst_pitch, 184 dri_bo *dst_buffer, 185 GLuint dst_offset, 186 GLboolean dst_tiled, 187 GLshort x, GLshort y, 188 GLshort w, GLshort h, 189 GLuint color) 190{ 191 GLuint BR13, CMD; 192 BATCH_LOCALS; 193 194 dst_pitch *= cpp; 195 196 switch (cpp) { 197 case 1: 198 case 2: 199 case 3: 200 BR13 = (0xF0 << 16) | (1 << 24); 201 CMD = XY_COLOR_BLT_CMD; 202 break; 203 case 4: 204 BR13 = (0xF0 << 16) | (1 << 24) | (1 << 25); 205 CMD = XY_COLOR_BLT_CMD | XY_BLT_WRITE_ALPHA | XY_BLT_WRITE_RGB; 206 break; 207 default: 208 return; 209 } 210#ifndef I915 211 if (dst_tiled) { 212 CMD |= XY_DST_TILED; 213 dst_pitch /= 4; 214 } 215#endif 216 217 DBG("%s dst:buf(%p)/%d+%d %d,%d sz:%dx%d\n", 218 __FUNCTION__, dst_buffer, dst_pitch, dst_offset, x, y, w, h); 219 220 assert(w > 0); 221 assert(h > 0); 222 223 BEGIN_BATCH(6, NO_LOOP_CLIPRECTS); 224 OUT_BATCH(CMD); 225 OUT_BATCH(BR13 | dst_pitch); 226 OUT_BATCH((y << 16) | x); 227 OUT_BATCH(((y + h) << 16) | (x + w)); 228 OUT_RELOC(dst_buffer, DRM_BO_FLAG_MEM_TT | DRM_BO_FLAG_WRITE, dst_offset); 229 OUT_BATCH(color); 230 ADVANCE_BATCH(); 231} 232 233static GLuint translate_raster_op(GLenum logicop) 234{ 235 switch(logicop) { 236 case GL_CLEAR: return 0x00; 237 case GL_AND: return 0x88; 238 case GL_AND_REVERSE: return 0x44; 239 case GL_COPY: return 0xCC; 240 case GL_AND_INVERTED: return 0x22; 241 case GL_NOOP: return 0xAA; 242 case GL_XOR: return 0x66; 243 case GL_OR: return 0xEE; 244 case GL_NOR: return 0x11; 245 case GL_EQUIV: return 0x99; 246 case GL_INVERT: return 0x55; 247 case GL_OR_REVERSE: return 0xDD; 248 case GL_COPY_INVERTED: return 0x33; 249 case GL_OR_INVERTED: return 0xBB; 250 case GL_NAND: return 0x77; 251 case GL_SET: return 0xFF; 252 default: return 0; 253 } 254} 255 256 257/* Copy BitBlt 258 */ 259void 260intelEmitCopyBlit(struct intel_context *intel, 261 GLuint cpp, 262 GLshort src_pitch, 263 dri_bo *src_buffer, 264 GLuint src_offset, 265 GLboolean src_tiled, 266 GLshort dst_pitch, 267 dri_bo *dst_buffer, 268 GLuint dst_offset, 269 GLboolean dst_tiled, 270 GLshort src_x, GLshort src_y, 271 GLshort dst_x, GLshort dst_y, 272 GLshort w, GLshort h, 273 GLenum logic_op) 274{ 275 GLuint CMD, BR13; 276 int dst_y2 = dst_y + h; 277 int dst_x2 = dst_x + w; 278 BATCH_LOCALS; 279 280 281 DBG("%s src:buf(%p)/%d+%d %d,%d dst:buf(%p)/%d+%d %d,%d sz:%dx%d\n", 282 __FUNCTION__, 283 src_buffer, src_pitch, src_offset, src_x, src_y, 284 dst_buffer, dst_pitch, dst_offset, dst_x, dst_y, w, h); 285 286 src_pitch *= cpp; 287 dst_pitch *= cpp; 288 289 BR13 = translate_raster_op(logic_op) << 16; 290 291 switch (cpp) { 292 case 1: 293 case 2: 294 case 3: 295 BR13 |= (1 << 24); 296 CMD = XY_SRC_COPY_BLT_CMD; 297 break; 298 case 4: 299 BR13 |= (1 << 24) | (1 << 25); 300 CMD = XY_SRC_COPY_BLT_CMD | XY_BLT_WRITE_ALPHA | XY_BLT_WRITE_RGB; 301 break; 302 default: 303 return; 304 } 305 306#ifndef I915 307 if (dst_tiled) { 308 CMD |= XY_DST_TILED; 309 dst_pitch /= 4; 310 } 311 if (src_tiled) { 312 CMD |= XY_SRC_TILED; 313 src_pitch /= 4; 314 } 315#endif 316 317 if (dst_y2 <= dst_y || dst_x2 <= dst_x) { 318 return; 319 } 320 321 dst_pitch &= 0xffff; 322 src_pitch &= 0xffff; 323 324 /* Initial y values don't seem to work with negative pitches. If 325 * we adjust the offsets manually (below), it seems to work fine. 326 * 327 * On the other hand, if we always adjust, the hardware doesn't 328 * know which blit directions to use, so overlapping copypixels get 329 * the wrong result. 330 */ 331 if (dst_pitch > 0 && src_pitch > 0) { 332 assert(dst_x < dst_x2); 333 assert(dst_y < dst_y2); 334 335 BEGIN_BATCH(8, NO_LOOP_CLIPRECTS); 336 OUT_BATCH(CMD); 337 OUT_BATCH(BR13 | dst_pitch); 338 OUT_BATCH((dst_y << 16) | dst_x); 339 OUT_BATCH((dst_y2 << 16) | dst_x2); 340 OUT_RELOC(dst_buffer, DRM_BO_FLAG_MEM_TT | DRM_BO_FLAG_WRITE, 341 dst_offset); 342 OUT_BATCH((src_y << 16) | src_x); 343 OUT_BATCH(src_pitch); 344 OUT_RELOC(src_buffer, DRM_BO_FLAG_MEM_TT | DRM_BO_FLAG_READ, 345 src_offset); 346 ADVANCE_BATCH(); 347 } 348 else { 349 assert(dst_x < dst_x2); 350 assert(h > 0); 351 352 BEGIN_BATCH(8, NO_LOOP_CLIPRECTS); 353 OUT_BATCH(CMD); 354 OUT_BATCH(BR13 | dst_pitch); 355 OUT_BATCH((0 << 16) | dst_x); 356 OUT_BATCH((h << 16) | dst_x2); 357 OUT_RELOC(dst_buffer, DRM_BO_FLAG_MEM_TT | DRM_BO_FLAG_WRITE, 358 dst_offset + dst_y * dst_pitch); 359 OUT_BATCH((0 << 16) | src_x); 360 OUT_BATCH(src_pitch); 361 OUT_RELOC(src_buffer, DRM_BO_FLAG_MEM_TT | DRM_BO_FLAG_READ, 362 src_offset + src_y * src_pitch); 363 ADVANCE_BATCH(); 364 } 365} 366 367 368/** 369 * Use blitting to clear the renderbuffers named by 'flags'. 370 * Note: we can't use the ctx->DrawBuffer->_ColorDrawBufferIndexes field 371 * since that might include software renderbuffers or renderbuffers 372 * which we're clearing with triangles. 373 * \param mask bitmask of BUFFER_BIT_* values indicating buffers to clear 374 */ 375void 376intelClearWithBlit(GLcontext *ctx, GLbitfield mask) 377{ 378 struct intel_context *intel = intel_context(ctx); 379 struct gl_framebuffer *fb = ctx->DrawBuffer; 380 GLuint clear_depth; 381 GLbitfield skipBuffers = 0; 382 BATCH_LOCALS; 383 384 /* 385 * Compute values for clearing the buffers. 386 */ 387 clear_depth = 0; 388 if (mask & BUFFER_BIT_DEPTH) { 389 clear_depth = (GLuint) (fb->_DepthMax * ctx->Depth.Clear); 390 } 391 if (mask & BUFFER_BIT_STENCIL) { 392 clear_depth |= (ctx->Stencil.Clear & 0xff) << 24; 393 } 394 395 /* If clearing both depth and stencil, skip BUFFER_BIT_STENCIL in 396 * the loop below. 397 */ 398 if ((mask & BUFFER_BIT_DEPTH) && (mask & BUFFER_BIT_STENCIL)) { 399 skipBuffers = BUFFER_BIT_STENCIL; 400 } 401 402 /* XXX Move this flush/lock into the following conditional? */ 403 intelFlush(&intel->ctx); 404 LOCK_HARDWARE(intel); 405 406 if (intel->numClipRects) { 407 GLint cx, cy, cw, ch; 408 drm_clip_rect_t clear; 409 int i; 410 411 /* Get clear bounds after locking */ 412 cx = fb->_Xmin; 413 cy = fb->_Ymin; 414 cw = fb->_Xmax - cx; 415 ch = fb->_Ymax - cy; 416 417 if (fb->Name == 0) { 418 /* clearing a window */ 419 420 /* flip top to bottom */ 421 clear.x1 = cx + intel->drawX; 422 clear.y1 = intel->driDrawable->y + intel->driDrawable->h - cy - ch; 423 clear.x2 = clear.x1 + cw; 424 clear.y2 = clear.y1 + ch; 425 } 426 else { 427 /* clearing FBO */ 428 assert(intel->numClipRects == 1); 429 assert(intel->pClipRects == &intel->fboRect); 430 clear.x1 = cx; 431 clear.y1 = cy; 432 clear.x2 = clear.x1 + cw; 433 clear.y2 = clear.y1 + ch; 434 /* no change to mask */ 435 } 436 437 for (i = 0; i < intel->numClipRects; i++) { 438 const drm_clip_rect_t *box = &intel->pClipRects[i]; 439 drm_clip_rect_t b; 440 GLuint buf; 441 GLuint clearMask = mask; /* use copy, since we modify it below */ 442 GLboolean all = (cw == fb->Width && ch == fb->Height); 443 444 if (!all) { 445 intel_intersect_cliprects(&b, &clear, box); 446 } 447 else { 448 b = *box; 449 } 450 451 if (b.x1 >= b.x2 || b.y1 >= b.y2) 452 continue; 453 454 if (0) 455 _mesa_printf("clear %d,%d..%d,%d, mask %x\n", 456 b.x1, b.y1, b.x2, b.y2, mask); 457 458 /* Loop over all renderbuffers */ 459 for (buf = 0; buf < BUFFER_COUNT && clearMask; buf++) { 460 const GLbitfield bufBit = 1 << buf; 461 if ((clearMask & bufBit) && !(bufBit & skipBuffers)) { 462 /* OK, clear this renderbuffer */ 463 struct intel_region *irb_region = 464 intel_get_rb_region(fb, buf); 465 dri_bo *write_buffer = 466 intel_region_buffer(intel, irb_region, 467 all ? INTEL_WRITE_FULL : 468 INTEL_WRITE_PART); 469 470 GLuint clearVal; 471 GLint pitch, cpp; 472 GLuint BR13, CMD; 473 474 ASSERT(irb_region); 475 476 pitch = irb_region->pitch; 477 cpp = irb_region->cpp; 478 479 DBG("%s dst:buf(%p)/%d+%d %d,%d sz:%dx%d\n", 480 __FUNCTION__, 481 irb_region->buffer, (pitch * cpp), 482 irb_region->draw_offset, 483 b.x1, b.y1, b.x2 - b.x1, b.y2 - b.y1); 484 485 BR13 = 0xf0 << 16; 486 CMD = XY_COLOR_BLT_CMD; 487 488 /* Setup the blit command */ 489 if (cpp == 4) { 490 BR13 |= (1 << 24) | (1 << 25); 491 if (buf == BUFFER_DEPTH || buf == BUFFER_STENCIL) { 492 if (clearMask & BUFFER_BIT_DEPTH) 493 CMD |= XY_BLT_WRITE_RGB; 494 if (clearMask & BUFFER_BIT_STENCIL) 495 CMD |= XY_BLT_WRITE_ALPHA; 496 } 497 else { 498 /* clearing RGBA */ 499 CMD |= XY_BLT_WRITE_ALPHA | XY_BLT_WRITE_RGB; 500 } 501 } 502 else { 503 ASSERT(cpp == 2 || cpp == 0); 504 BR13 |= (1 << 24); 505 } 506 507#ifndef I915 508 if (irb_region->tiled) { 509 CMD |= XY_DST_TILED; 510 pitch /= 4; 511 } 512#endif 513 BR13 |= (pitch * cpp); 514 515 if (buf == BUFFER_DEPTH || buf == BUFFER_STENCIL) { 516 clearVal = clear_depth; 517 } 518 else { 519 clearVal = (cpp == 4) 520 ? intel->ClearColor8888 : intel->ClearColor565; 521 } 522 /* 523 _mesa_debug(ctx, "hardware blit clear buf %d rb id %d\n", 524 buf, irb->Base.Name); 525 */ 526 intel_wait_flips(intel); 527 528 assert(b.x1 < b.x2); 529 assert(b.y1 < b.y2); 530 531 BEGIN_BATCH(6, REFERENCES_CLIPRECTS); 532 OUT_BATCH(CMD); 533 OUT_BATCH(BR13); 534 OUT_BATCH((b.y1 << 16) | b.x1); 535 OUT_BATCH((b.y2 << 16) | b.x2); 536 OUT_RELOC(write_buffer, DRM_BO_FLAG_MEM_TT | DRM_BO_FLAG_WRITE, 537 irb_region->draw_offset); 538 OUT_BATCH(clearVal); 539 ADVANCE_BATCH(); 540 clearMask &= ~bufBit; /* turn off bit, for faster loop exit */ 541 } 542 } 543 } 544 intel_batchbuffer_flush(intel->batch); 545 } 546 547 UNLOCK_HARDWARE(intel); 548} 549 550void 551intelEmitImmediateColorExpandBlit(struct intel_context *intel, 552 GLuint cpp, 553 GLubyte *src_bits, GLuint src_size, 554 GLuint fg_color, 555 GLshort dst_pitch, 556 dri_bo *dst_buffer, 557 GLuint dst_offset, 558 GLboolean dst_tiled, 559 GLshort x, GLshort y, 560 GLshort w, GLshort h, 561 GLenum logic_op) 562{ 563 int dwords = ALIGN(src_size, 8) / 4; 564 uint32_t opcode, br13, blit_cmd; 565 566 assert( logic_op - GL_CLEAR >= 0 ); 567 assert( logic_op - GL_CLEAR < 0x10 ); 568 569 if (w < 0 || h < 0) 570 return; 571 572 dst_pitch *= cpp; 573 574 if (dst_tiled) 575 dst_pitch /= 4; 576 577 DBG("%s dst:buf(%p)/%d+%d %d,%d sz:%dx%d, %d bytes %d dwords\n", 578 __FUNCTION__, 579 dst_buffer, dst_pitch, dst_offset, x, y, w, h, src_size, dwords); 580 581 intel_batchbuffer_require_space( intel->batch, 582 (8 * 4) + 583 (3 * 4) + 584 dwords, 585 NO_LOOP_CLIPRECTS ); 586 587 opcode = XY_SETUP_BLT_CMD; 588 if (cpp == 4) 589 opcode |= XY_BLT_WRITE_ALPHA | XY_BLT_WRITE_RGB; 590 if (dst_tiled) 591 opcode |= XY_DST_TILED; 592 593 br13 = dst_pitch | (translate_raster_op(logic_op) << 16) | (1 << 29); 594 if (cpp == 2) 595 br13 |= BR13_565; 596 else 597 br13 |= BR13_8888; 598 599 blit_cmd = XY_TEXT_IMMEDIATE_BLIT_CMD | XY_TEXT_BYTE_PACKED; /* packing? */ 600 if (dst_tiled) 601 blit_cmd |= XY_DST_TILED; 602 603 BEGIN_BATCH(8 + 3, NO_LOOP_CLIPRECTS); 604 OUT_BATCH(opcode); 605 OUT_BATCH(br13); 606 OUT_BATCH((0 << 16) | 0); /* clip x1, y1 */ 607 OUT_BATCH((100 << 16) | 100); /* clip x2, y2 */ 608 OUT_RELOC(dst_buffer, DRM_BO_FLAG_MEM_TT | DRM_BO_FLAG_WRITE, dst_offset); 609 OUT_BATCH(0); /* bg */ 610 OUT_BATCH(fg_color); /* fg */ 611 OUT_BATCH(0); /* pattern base addr */ 612 613 OUT_BATCH(blit_cmd | ((3 - 2) + dwords)); 614 OUT_BATCH((y << 16) | x); 615 OUT_BATCH(((y + h) << 16) | (x + w)); 616 ADVANCE_BATCH(); 617 618 intel_batchbuffer_data( intel->batch, 619 src_bits, 620 dwords * 4, 621 NO_LOOP_CLIPRECTS ); 622} 623