intel_blit.c revision ab50ddaa9173ae108833db0edb209045788efc41
1/************************************************************************** 2 * 3 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas. 4 * All Rights Reserved. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the 8 * "Software"), to deal in the Software without restriction, including 9 * without limitation the rights to use, copy, modify, merge, publish, 10 * distribute, sub license, and/or sell copies of the Software, and to 11 * permit persons to whom the Software is furnished to do so, subject to 12 * the following conditions: 13 * 14 * The above copyright notice and this permission notice (including the 15 * next paragraph) shall be included in all copies or substantial portions 16 * of the Software. 17 * 18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. 21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR 22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, 23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE 24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 25 * 26 **************************************************************************/ 27 28 29#include <stdio.h> 30#include <errno.h> 31 32#include "mtypes.h" 33#include "context.h" 34#include "enums.h" 35 36#include "intel_batchbuffer.h" 37#include "intel_blit.h" 38#include "intel_buffers.h" 39#include "intel_context.h" 40#include "intel_fbo.h" 41#include "intel_reg.h" 42#include "intel_regions.h" 43 44#define FILE_DEBUG_FLAG DEBUG_BLIT 45 46/** 47 * Copy the back color buffer to the front color buffer. 48 * Used for SwapBuffers(). 49 */ 50void 51intelCopyBuffer(const __DRIdrawablePrivate * dPriv, 52 const drm_clip_rect_t * rect) 53{ 54 55 struct intel_context *intel; 56 const intelScreenPrivate *intelScreen; 57 int ret; 58 59 DBG("%s\n", __FUNCTION__); 60 61 assert(dPriv); 62 63 intel = intelScreenContext(dPriv->driScreenPriv->private); 64 if (!intel) 65 return; 66 67 intelScreen = intel->intelScreen; 68 69 /* The LOCK_HARDWARE is required for the cliprects. Buffer offsets 70 * should work regardless. 71 */ 72 LOCK_HARDWARE(intel); 73 74 if (dPriv && dPriv->numClipRects) { 75 struct intel_framebuffer *intel_fb = dPriv->driverPrivate; 76 struct intel_region *src, *dst; 77 int nbox = dPriv->numClipRects; 78 drm_clip_rect_t *pbox = dPriv->pClipRects; 79 int cpp; 80 int src_pitch, dst_pitch; 81 unsigned short src_x, src_y; 82 int BR13, CMD; 83 int i; 84 85 src = intel_get_rb_region(&intel_fb->Base, BUFFER_BACK_LEFT); 86 dst = intel_get_rb_region(&intel_fb->Base, BUFFER_FRONT_LEFT); 87 88 src_pitch = src->pitch * src->cpp; 89 dst_pitch = dst->pitch * dst->cpp; 90 91 cpp = src->cpp; 92 93 ASSERT(intel_fb); 94 ASSERT(intel_fb->Base.Name == 0); /* Not a user-created FBO */ 95 ASSERT(src); 96 ASSERT(dst); 97 ASSERT(src->cpp == dst->cpp); 98 99 if (cpp == 2) { 100 BR13 = (0xCC << 16) | (1 << 24); 101 CMD = XY_SRC_COPY_BLT_CMD; 102 } 103 else { 104 BR13 = (0xCC << 16) | (1 << 24) | (1 << 25); 105 CMD = XY_SRC_COPY_BLT_CMD | XY_BLT_WRITE_ALPHA | XY_BLT_WRITE_RGB; 106 } 107 108#ifndef I915 109 if (src->tiled) { 110 CMD |= XY_SRC_TILED; 111 src_pitch /= 4; 112 } 113 if (dst->tiled) { 114 CMD |= XY_DST_TILED; 115 dst_pitch /= 4; 116 } 117#endif 118 119 again: 120 ret = dri_bufmgr_check_aperture_space(dst->buffer); 121 ret |= dri_bufmgr_check_aperture_space(src->buffer); 122 123 if (ret) { 124 intel_batchbuffer_flush(intel->batch); 125 goto again; 126 } 127 128 for (i = 0; i < nbox; i++, pbox++) { 129 drm_clip_rect_t box = *pbox; 130 131 if (rect) { 132 if (!intel_intersect_cliprects(&box, &box, rect)) 133 continue; 134 } 135 136 if (box.x1 >= box.x2 || 137 box.y1 >= box.y2) 138 continue; 139 140 assert(box.x1 < box.x2); 141 assert(box.y1 < box.y2); 142 src_x = box.x1 - dPriv->x + dPriv->backX; 143 src_y = box.y1 - dPriv->y + dPriv->backY; 144 145 BEGIN_BATCH(8, REFERENCES_CLIPRECTS); 146 OUT_BATCH(CMD); 147 OUT_BATCH(BR13 | dst_pitch); 148 OUT_BATCH((box.y1 << 16) | box.x1); 149 OUT_BATCH((box.y2 << 16) | box.x2); 150 151 OUT_RELOC(dst->buffer, 152 DRM_GEM_DOMAIN_I915_RENDER, DRM_GEM_DOMAIN_I915_RENDER, 153 0); 154 OUT_BATCH((src_y << 16) | src_x); 155 OUT_BATCH(src_pitch); 156 OUT_RELOC(src->buffer, 157 DRM_GEM_DOMAIN_I915_RENDER, 0, 158 0); 159 ADVANCE_BATCH(); 160 } 161 162 intel_batchbuffer_flush(intel->batch); 163 } 164 165 UNLOCK_HARDWARE(intel); 166} 167 168 169 170 171void 172intelEmitFillBlit(struct intel_context *intel, 173 GLuint cpp, 174 GLshort dst_pitch, 175 dri_bo *dst_buffer, 176 GLuint dst_offset, 177 GLboolean dst_tiled, 178 GLshort x, GLshort y, 179 GLshort w, GLshort h, 180 GLuint color) 181{ 182 GLuint BR13, CMD; 183 BATCH_LOCALS; 184 185 dst_pitch *= cpp; 186 187 switch (cpp) { 188 case 1: 189 case 2: 190 case 3: 191 BR13 = (0xF0 << 16) | (1 << 24); 192 CMD = XY_COLOR_BLT_CMD; 193 break; 194 case 4: 195 BR13 = (0xF0 << 16) | (1 << 24) | (1 << 25); 196 CMD = XY_COLOR_BLT_CMD | XY_BLT_WRITE_ALPHA | XY_BLT_WRITE_RGB; 197 break; 198 default: 199 return; 200 } 201#ifndef I915 202 if (dst_tiled) { 203 CMD |= XY_DST_TILED; 204 dst_pitch /= 4; 205 } 206#endif 207 208 DBG("%s dst:buf(%p)/%d+%d %d,%d sz:%dx%d\n", 209 __FUNCTION__, dst_buffer, dst_pitch, dst_offset, x, y, w, h); 210 211 assert(w > 0); 212 assert(h > 0); 213 214 BEGIN_BATCH(6, NO_LOOP_CLIPRECTS); 215 OUT_BATCH(CMD); 216 OUT_BATCH(BR13 | dst_pitch); 217 OUT_BATCH((y << 16) | x); 218 OUT_BATCH(((y + h) << 16) | (x + w)); 219 OUT_RELOC(dst_buffer, 220 DRM_GEM_DOMAIN_I915_RENDER, DRM_GEM_DOMAIN_I915_RENDER, 221 dst_offset); 222 OUT_BATCH(color); 223 ADVANCE_BATCH(); 224} 225 226static GLuint translate_raster_op(GLenum logicop) 227{ 228 switch(logicop) { 229 case GL_CLEAR: return 0x00; 230 case GL_AND: return 0x88; 231 case GL_AND_REVERSE: return 0x44; 232 case GL_COPY: return 0xCC; 233 case GL_AND_INVERTED: return 0x22; 234 case GL_NOOP: return 0xAA; 235 case GL_XOR: return 0x66; 236 case GL_OR: return 0xEE; 237 case GL_NOR: return 0x11; 238 case GL_EQUIV: return 0x99; 239 case GL_INVERT: return 0x55; 240 case GL_OR_REVERSE: return 0xDD; 241 case GL_COPY_INVERTED: return 0x33; 242 case GL_OR_INVERTED: return 0xBB; 243 case GL_NAND: return 0x77; 244 case GL_SET: return 0xFF; 245 default: return 0; 246 } 247} 248 249 250/* Copy BitBlt 251 */ 252void 253intelEmitCopyBlit(struct intel_context *intel, 254 GLuint cpp, 255 GLshort src_pitch, 256 dri_bo *src_buffer, 257 GLuint src_offset, 258 GLboolean src_tiled, 259 GLshort dst_pitch, 260 dri_bo *dst_buffer, 261 GLuint dst_offset, 262 GLboolean dst_tiled, 263 GLshort src_x, GLshort src_y, 264 GLshort dst_x, GLshort dst_y, 265 GLshort w, GLshort h, 266 GLenum logic_op) 267{ 268 GLuint CMD, BR13; 269 int dst_y2 = dst_y + h; 270 int dst_x2 = dst_x + w; 271 int ret; 272 BATCH_LOCALS; 273 274 again: 275 ret = dri_bufmgr_check_aperture_space(dst_buffer); 276 ret |= dri_bufmgr_check_aperture_space(src_buffer); 277 if (ret) { 278 intel_batchbuffer_flush(intel->batch); 279 goto again; 280 } 281 282 DBG("%s src:buf(%p)/%d+%d %d,%d dst:buf(%p)/%d+%d %d,%d sz:%dx%d\n", 283 __FUNCTION__, 284 src_buffer, src_pitch, src_offset, src_x, src_y, 285 dst_buffer, dst_pitch, dst_offset, dst_x, dst_y, w, h); 286 287 src_pitch *= cpp; 288 dst_pitch *= cpp; 289 290 BR13 = translate_raster_op(logic_op) << 16; 291 292 switch (cpp) { 293 case 1: 294 case 2: 295 case 3: 296 BR13 |= (1 << 24); 297 CMD = XY_SRC_COPY_BLT_CMD; 298 break; 299 case 4: 300 BR13 |= (1 << 24) | (1 << 25); 301 CMD = XY_SRC_COPY_BLT_CMD | XY_BLT_WRITE_ALPHA | XY_BLT_WRITE_RGB; 302 break; 303 default: 304 return; 305 } 306 307#ifndef I915 308 if (dst_tiled) { 309 CMD |= XY_DST_TILED; 310 dst_pitch /= 4; 311 } 312 if (src_tiled) { 313 CMD |= XY_SRC_TILED; 314 src_pitch /= 4; 315 } 316#endif 317 318 if (dst_y2 <= dst_y || dst_x2 <= dst_x) { 319 return; 320 } 321 322 dst_pitch &= 0xffff; 323 src_pitch &= 0xffff; 324 325 /* Initial y values don't seem to work with negative pitches. If 326 * we adjust the offsets manually (below), it seems to work fine. 327 * 328 * On the other hand, if we always adjust, the hardware doesn't 329 * know which blit directions to use, so overlapping copypixels get 330 * the wrong result. 331 */ 332 if (dst_pitch > 0 && src_pitch > 0) { 333 assert(dst_x < dst_x2); 334 assert(dst_y < dst_y2); 335 336 BEGIN_BATCH(8, NO_LOOP_CLIPRECTS); 337 OUT_BATCH(CMD); 338 OUT_BATCH(BR13 | dst_pitch); 339 OUT_BATCH((dst_y << 16) | dst_x); 340 OUT_BATCH((dst_y2 << 16) | dst_x2); 341 OUT_RELOC(dst_buffer, 342 DRM_GEM_DOMAIN_I915_RENDER, DRM_GEM_DOMAIN_I915_RENDER, 343 dst_offset); 344 OUT_BATCH((src_y << 16) | src_x); 345 OUT_BATCH(src_pitch); 346 OUT_RELOC(src_buffer, 347 DRM_GEM_DOMAIN_I915_RENDER, 0, 348 src_offset); 349 ADVANCE_BATCH(); 350 } 351 else { 352 assert(dst_x < dst_x2); 353 assert(h > 0); 354 355 BEGIN_BATCH(8, NO_LOOP_CLIPRECTS); 356 OUT_BATCH(CMD); 357 OUT_BATCH(BR13 | dst_pitch); 358 OUT_BATCH((0 << 16) | dst_x); 359 OUT_BATCH((h << 16) | dst_x2); 360 OUT_RELOC(dst_buffer, 361 DRM_GEM_DOMAIN_I915_RENDER, DRM_GEM_DOMAIN_I915_RENDER, 362 dst_offset + dst_y * dst_pitch); 363 OUT_BATCH((0 << 16) | src_x); 364 OUT_BATCH(src_pitch); 365 OUT_RELOC(src_buffer, 366 DRM_GEM_DOMAIN_I915_RENDER, 0, 367 src_offset + src_y * src_pitch); 368 ADVANCE_BATCH(); 369 } 370} 371 372 373/** 374 * Use blitting to clear the renderbuffers named by 'flags'. 375 * Note: we can't use the ctx->DrawBuffer->_ColorDrawBufferIndexes field 376 * since that might include software renderbuffers or renderbuffers 377 * which we're clearing with triangles. 378 * \param mask bitmask of BUFFER_BIT_* values indicating buffers to clear 379 */ 380void 381intelClearWithBlit(GLcontext *ctx, GLbitfield mask) 382{ 383 struct intel_context *intel = intel_context(ctx); 384 struct gl_framebuffer *fb = ctx->DrawBuffer; 385 GLuint clear_depth; 386 GLbitfield skipBuffers = 0; 387 BATCH_LOCALS; 388 389 /* 390 * Compute values for clearing the buffers. 391 */ 392 clear_depth = 0; 393 if (mask & BUFFER_BIT_DEPTH) { 394 clear_depth = (GLuint) (fb->_DepthMax * ctx->Depth.Clear); 395 } 396 if (mask & BUFFER_BIT_STENCIL) { 397 clear_depth |= (ctx->Stencil.Clear & 0xff) << 24; 398 } 399 400 /* If clearing both depth and stencil, skip BUFFER_BIT_STENCIL in 401 * the loop below. 402 */ 403 if ((mask & BUFFER_BIT_DEPTH) && (mask & BUFFER_BIT_STENCIL)) { 404 skipBuffers = BUFFER_BIT_STENCIL; 405 } 406 407 /* XXX Move this flush/lock into the following conditional? */ 408 intelFlush(&intel->ctx); 409 LOCK_HARDWARE(intel); 410 411 if (intel->numClipRects) { 412 GLint cx, cy, cw, ch; 413 drm_clip_rect_t clear; 414 int i; 415 416 /* Get clear bounds after locking */ 417 cx = fb->_Xmin; 418 cy = fb->_Ymin; 419 cw = fb->_Xmax - cx; 420 ch = fb->_Ymax - cy; 421 422 if (fb->Name == 0) { 423 /* clearing a window */ 424 425 /* flip top to bottom */ 426 clear.x1 = cx + intel->drawX; 427 clear.y1 = intel->driDrawable->y + intel->driDrawable->h - cy - ch; 428 clear.x2 = clear.x1 + cw; 429 clear.y2 = clear.y1 + ch; 430 } 431 else { 432 /* clearing FBO */ 433 assert(intel->numClipRects == 1); 434 assert(intel->pClipRects == &intel->fboRect); 435 clear.x1 = cx; 436 clear.y1 = cy; 437 clear.x2 = clear.x1 + cw; 438 clear.y2 = clear.y1 + ch; 439 /* no change to mask */ 440 } 441 442 for (i = 0; i < intel->numClipRects; i++) { 443 const drm_clip_rect_t *box = &intel->pClipRects[i]; 444 drm_clip_rect_t b; 445 GLuint buf; 446 GLuint clearMask = mask; /* use copy, since we modify it below */ 447 GLboolean all = (cw == fb->Width && ch == fb->Height); 448 449 if (!all) { 450 intel_intersect_cliprects(&b, &clear, box); 451 } 452 else { 453 b = *box; 454 } 455 456 if (b.x1 >= b.x2 || b.y1 >= b.y2) 457 continue; 458 459 if (0) 460 _mesa_printf("clear %d,%d..%d,%d, mask %x\n", 461 b.x1, b.y1, b.x2, b.y2, mask); 462 463 /* Loop over all renderbuffers */ 464 for (buf = 0; buf < BUFFER_COUNT && clearMask; buf++) { 465 const GLbitfield bufBit = 1 << buf; 466 if ((clearMask & bufBit) && !(bufBit & skipBuffers)) { 467 /* OK, clear this renderbuffer */ 468 struct intel_region *irb_region = 469 intel_get_rb_region(fb, buf); 470 dri_bo *write_buffer = 471 intel_region_buffer(intel, irb_region, 472 all ? INTEL_WRITE_FULL : 473 INTEL_WRITE_PART); 474 475 GLuint clearVal; 476 GLint pitch, cpp; 477 GLuint BR13, CMD; 478 479 ASSERT(irb_region); 480 481 pitch = irb_region->pitch; 482 cpp = irb_region->cpp; 483 484 DBG("%s dst:buf(%p)/%d+%d %d,%d sz:%dx%d\n", 485 __FUNCTION__, 486 irb_region->buffer, (pitch * cpp), 487 irb_region->draw_offset, 488 b.x1, b.y1, b.x2 - b.x1, b.y2 - b.y1); 489 490 BR13 = 0xf0 << 16; 491 CMD = XY_COLOR_BLT_CMD; 492 493 /* Setup the blit command */ 494 if (cpp == 4) { 495 BR13 |= (1 << 24) | (1 << 25); 496 if (buf == BUFFER_DEPTH || buf == BUFFER_STENCIL) { 497 if (clearMask & BUFFER_BIT_DEPTH) 498 CMD |= XY_BLT_WRITE_RGB; 499 if (clearMask & BUFFER_BIT_STENCIL) 500 CMD |= XY_BLT_WRITE_ALPHA; 501 } 502 else { 503 /* clearing RGBA */ 504 CMD |= XY_BLT_WRITE_ALPHA | XY_BLT_WRITE_RGB; 505 } 506 } 507 else { 508 ASSERT(cpp == 2 || cpp == 0); 509 BR13 |= (1 << 24); 510 } 511 512#ifndef I915 513 if (irb_region->tiled) { 514 CMD |= XY_DST_TILED; 515 pitch /= 4; 516 } 517#endif 518 BR13 |= (pitch * cpp); 519 520 if (buf == BUFFER_DEPTH || buf == BUFFER_STENCIL) { 521 clearVal = clear_depth; 522 } 523 else { 524 clearVal = (cpp == 4) 525 ? intel->ClearColor8888 : intel->ClearColor565; 526 } 527 /* 528 _mesa_debug(ctx, "hardware blit clear buf %d rb id %d\n", 529 buf, irb->Base.Name); 530 */ 531 intel_wait_flips(intel); 532 533 assert(b.x1 < b.x2); 534 assert(b.y1 < b.y2); 535 536 BEGIN_BATCH(6, REFERENCES_CLIPRECTS); 537 OUT_BATCH(CMD); 538 OUT_BATCH(BR13); 539 OUT_BATCH((b.y1 << 16) | b.x1); 540 OUT_BATCH((b.y2 << 16) | b.x2); 541 OUT_RELOC(write_buffer, 542 DRM_GEM_DOMAIN_I915_RENDER, DRM_GEM_DOMAIN_I915_RENDER, 543 irb_region->draw_offset); 544 OUT_BATCH(clearVal); 545 ADVANCE_BATCH(); 546 clearMask &= ~bufBit; /* turn off bit, for faster loop exit */ 547 } 548 } 549 } 550 intel_batchbuffer_flush(intel->batch); 551 } 552 553 UNLOCK_HARDWARE(intel); 554} 555 556void 557intelEmitImmediateColorExpandBlit(struct intel_context *intel, 558 GLuint cpp, 559 GLubyte *src_bits, GLuint src_size, 560 GLuint fg_color, 561 GLshort dst_pitch, 562 dri_bo *dst_buffer, 563 GLuint dst_offset, 564 GLboolean dst_tiled, 565 GLshort x, GLshort y, 566 GLshort w, GLshort h, 567 GLenum logic_op) 568{ 569 int dwords = ALIGN(src_size, 8) / 4; 570 uint32_t opcode, br13, blit_cmd; 571 572 assert( logic_op - GL_CLEAR >= 0 ); 573 assert( logic_op - GL_CLEAR < 0x10 ); 574 575 if (w < 0 || h < 0) 576 return; 577 578 dst_pitch *= cpp; 579 580 if (dst_tiled) 581 dst_pitch /= 4; 582 583 DBG("%s dst:buf(%p)/%d+%d %d,%d sz:%dx%d, %d bytes %d dwords\n", 584 __FUNCTION__, 585 dst_buffer, dst_pitch, dst_offset, x, y, w, h, src_size, dwords); 586 587 intel_batchbuffer_require_space( intel->batch, 588 (8 * 4) + 589 (3 * 4) + 590 dwords, 591 NO_LOOP_CLIPRECTS ); 592 593 opcode = XY_SETUP_BLT_CMD; 594 if (cpp == 4) 595 opcode |= XY_BLT_WRITE_ALPHA | XY_BLT_WRITE_RGB; 596 if (dst_tiled) 597 opcode |= XY_DST_TILED; 598 599 br13 = dst_pitch | (translate_raster_op(logic_op) << 16) | (1 << 29); 600 if (cpp == 2) 601 br13 |= BR13_565; 602 else 603 br13 |= BR13_8888; 604 605 blit_cmd = XY_TEXT_IMMEDIATE_BLIT_CMD | XY_TEXT_BYTE_PACKED; /* packing? */ 606 if (dst_tiled) 607 blit_cmd |= XY_DST_TILED; 608 609 BEGIN_BATCH(8 + 3, NO_LOOP_CLIPRECTS); 610 OUT_BATCH(opcode); 611 OUT_BATCH(br13); 612 OUT_BATCH((0 << 16) | 0); /* clip x1, y1 */ 613 OUT_BATCH((100 << 16) | 100); /* clip x2, y2 */ 614 OUT_RELOC(dst_buffer, 615 DRM_GEM_DOMAIN_I915_RENDER, DRM_GEM_DOMAIN_I915_RENDER, 616 dst_offset); 617 OUT_BATCH(0); /* bg */ 618 OUT_BATCH(fg_color); /* fg */ 619 OUT_BATCH(0); /* pattern base addr */ 620 621 OUT_BATCH(blit_cmd | ((3 - 2) + dwords)); 622 OUT_BATCH((y << 16) | x); 623 OUT_BATCH(((y + h) << 16) | (x + w)); 624 ADVANCE_BATCH(); 625 626 intel_batchbuffer_data( intel->batch, 627 src_bits, 628 dwords * 4, 629 NO_LOOP_CLIPRECTS ); 630} 631