intel_blit.c revision eb10cdc838fc31ea2cf59f556f6f7d8b072f5bae
1/************************************************************************** 2 * 3 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas. 4 * All Rights Reserved. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the 8 * "Software"), to deal in the Software without restriction, including 9 * without limitation the rights to use, copy, modify, merge, publish, 10 * distribute, sub license, and/or sell copies of the Software, and to 11 * permit persons to whom the Software is furnished to do so, subject to 12 * the following conditions: 13 * 14 * The above copyright notice and this permission notice (including the 15 * next paragraph) shall be included in all copies or substantial portions 16 * of the Software. 17 * 18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. 21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR 22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, 23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE 24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 25 * 26 **************************************************************************/ 27 28 29#include <stdio.h> 30#include <errno.h> 31 32#include "mtypes.h" 33#include "context.h" 34#include "enums.h" 35 36#include "intel_batchbuffer.h" 37#include "intel_blit.h" 38#include "intel_buffers.h" 39#include "intel_context.h" 40#include "intel_fbo.h" 41#include "intel_reg.h" 42#include "intel_regions.h" 43 44#define FILE_DEBUG_FLAG DEBUG_BLIT 45 46/** 47 * Copy the back color buffer to the front color buffer. 48 * Used for SwapBuffers(). 49 */ 50void 51intelCopyBuffer(const __DRIdrawablePrivate * dPriv, 52 const drm_clip_rect_t * rect) 53{ 54 55 struct intel_context *intel; 56 const intelScreenPrivate *intelScreen; 57 int ret; 58 59 DBG("%s\n", __FUNCTION__); 60 61 assert(dPriv); 62 63 intel = intelScreenContext(dPriv->driScreenPriv->private); 64 if (!intel) 65 return; 66 67 intelScreen = intel->intelScreen; 68 69 /* The LOCK_HARDWARE is required for the cliprects. Buffer offsets 70 * should work regardless. 71 */ 72 LOCK_HARDWARE(intel); 73 74 if (dPriv && dPriv->numClipRects) { 75 struct intel_framebuffer *intel_fb = dPriv->driverPrivate; 76 struct intel_region *src, *dst; 77 int nbox = dPriv->numClipRects; 78 drm_clip_rect_t *pbox = dPriv->pClipRects; 79 int cpp; 80 int src_pitch, dst_pitch; 81 unsigned short src_x, src_y; 82 int BR13, CMD; 83 int i; 84 85 src = intel_get_rb_region(&intel_fb->Base, BUFFER_BACK_LEFT); 86 dst = intel_get_rb_region(&intel_fb->Base, BUFFER_FRONT_LEFT); 87 88 src_pitch = src->pitch * src->cpp; 89 dst_pitch = dst->pitch * dst->cpp; 90 91 cpp = src->cpp; 92 93 ASSERT(intel_fb); 94 ASSERT(intel_fb->Base.Name == 0); /* Not a user-created FBO */ 95 ASSERT(src); 96 ASSERT(dst); 97 ASSERT(src->cpp == dst->cpp); 98 99 if (cpp == 2) { 100 BR13 = (0xCC << 16) | (1 << 24); 101 CMD = XY_SRC_COPY_BLT_CMD; 102 } 103 else { 104 BR13 = (0xCC << 16) | (1 << 24) | (1 << 25); 105 CMD = XY_SRC_COPY_BLT_CMD | XY_BLT_WRITE_ALPHA | XY_BLT_WRITE_RGB; 106 } 107 108#ifndef I915 109 if (src->tiled) { 110 CMD |= XY_SRC_TILED; 111 src_pitch /= 4; 112 } 113 if (dst->tiled) { 114 CMD |= XY_DST_TILED; 115 dst_pitch /= 4; 116 } 117#endif 118 119 again: 120 ret = dri_bufmgr_check_aperture_space(dst->buffer); 121 ret |= dri_bufmgr_check_aperture_space(src->buffer); 122 123 if (ret) { 124 intel_batchbuffer_flush(intel->batch); 125 goto again; 126 } 127 128 for (i = 0; i < nbox; i++, pbox++) { 129 drm_clip_rect_t box = *pbox; 130 131 if (rect) { 132 if (!intel_intersect_cliprects(&box, &box, rect)) 133 continue; 134 } 135 136 if (box.x1 >= box.x2 || 137 box.y1 >= box.y2) 138 continue; 139 140 assert(box.x1 < box.x2); 141 assert(box.y1 < box.y2); 142 src_x = box.x1 - dPriv->x + dPriv->backX; 143 src_y = box.y1 - dPriv->y + dPriv->backY; 144 145 BEGIN_BATCH(8, REFERENCES_CLIPRECTS); 146 OUT_BATCH(CMD); 147 OUT_BATCH(BR13 | dst_pitch); 148 OUT_BATCH((box.y1 << 16) | box.x1); 149 OUT_BATCH((box.y2 << 16) | box.x2); 150 151 OUT_RELOC(dst->buffer, DRM_BO_FLAG_MEM_TT | DRM_BO_FLAG_WRITE, 0); 152 OUT_BATCH((src_y << 16) | src_x); 153 OUT_BATCH(src_pitch); 154 OUT_RELOC(src->buffer, DRM_BO_FLAG_MEM_TT | DRM_BO_FLAG_READ, 0); 155 ADVANCE_BATCH(); 156 } 157 158 intel_batchbuffer_flush(intel->batch); 159 } 160 161 UNLOCK_HARDWARE(intel); 162} 163 164 165 166 167void 168intelEmitFillBlit(struct intel_context *intel, 169 GLuint cpp, 170 GLshort dst_pitch, 171 dri_bo *dst_buffer, 172 GLuint dst_offset, 173 GLboolean dst_tiled, 174 GLshort x, GLshort y, 175 GLshort w, GLshort h, 176 GLuint color) 177{ 178 GLuint BR13, CMD; 179 BATCH_LOCALS; 180 181 dst_pitch *= cpp; 182 183 switch (cpp) { 184 case 1: 185 case 2: 186 case 3: 187 BR13 = (0xF0 << 16) | (1 << 24); 188 CMD = XY_COLOR_BLT_CMD; 189 break; 190 case 4: 191 BR13 = (0xF0 << 16) | (1 << 24) | (1 << 25); 192 CMD = XY_COLOR_BLT_CMD | XY_BLT_WRITE_ALPHA | XY_BLT_WRITE_RGB; 193 break; 194 default: 195 return; 196 } 197#ifndef I915 198 if (dst_tiled) { 199 CMD |= XY_DST_TILED; 200 dst_pitch /= 4; 201 } 202#endif 203 204 DBG("%s dst:buf(%p)/%d+%d %d,%d sz:%dx%d\n", 205 __FUNCTION__, dst_buffer, dst_pitch, dst_offset, x, y, w, h); 206 207 assert(w > 0); 208 assert(h > 0); 209 210 BEGIN_BATCH(6, NO_LOOP_CLIPRECTS); 211 OUT_BATCH(CMD); 212 OUT_BATCH(BR13 | dst_pitch); 213 OUT_BATCH((y << 16) | x); 214 OUT_BATCH(((y + h) << 16) | (x + w)); 215 OUT_RELOC(dst_buffer, DRM_BO_FLAG_MEM_TT | DRM_BO_FLAG_WRITE, dst_offset); 216 OUT_BATCH(color); 217 ADVANCE_BATCH(); 218} 219 220static GLuint translate_raster_op(GLenum logicop) 221{ 222 switch(logicop) { 223 case GL_CLEAR: return 0x00; 224 case GL_AND: return 0x88; 225 case GL_AND_REVERSE: return 0x44; 226 case GL_COPY: return 0xCC; 227 case GL_AND_INVERTED: return 0x22; 228 case GL_NOOP: return 0xAA; 229 case GL_XOR: return 0x66; 230 case GL_OR: return 0xEE; 231 case GL_NOR: return 0x11; 232 case GL_EQUIV: return 0x99; 233 case GL_INVERT: return 0x55; 234 case GL_OR_REVERSE: return 0xDD; 235 case GL_COPY_INVERTED: return 0x33; 236 case GL_OR_INVERTED: return 0xBB; 237 case GL_NAND: return 0x77; 238 case GL_SET: return 0xFF; 239 default: return 0; 240 } 241} 242 243 244/* Copy BitBlt 245 */ 246void 247intelEmitCopyBlit(struct intel_context *intel, 248 GLuint cpp, 249 GLshort src_pitch, 250 dri_bo *src_buffer, 251 GLuint src_offset, 252 GLboolean src_tiled, 253 GLshort dst_pitch, 254 dri_bo *dst_buffer, 255 GLuint dst_offset, 256 GLboolean dst_tiled, 257 GLshort src_x, GLshort src_y, 258 GLshort dst_x, GLshort dst_y, 259 GLshort w, GLshort h, 260 GLenum logic_op) 261{ 262 GLuint CMD, BR13; 263 int dst_y2 = dst_y + h; 264 int dst_x2 = dst_x + w; 265 int ret; 266 BATCH_LOCALS; 267 268 again: 269 ret = dri_bufmgr_check_aperture_space(dst_buffer); 270 ret |= dri_bufmgr_check_aperture_space(src_buffer); 271 if (ret) { 272 intel_batchbuffer_flush(intel->batch); 273 goto again; 274 } 275 276 DBG("%s src:buf(%p)/%d+%d %d,%d dst:buf(%p)/%d+%d %d,%d sz:%dx%d\n", 277 __FUNCTION__, 278 src_buffer, src_pitch, src_offset, src_x, src_y, 279 dst_buffer, dst_pitch, dst_offset, dst_x, dst_y, w, h); 280 281 src_pitch *= cpp; 282 dst_pitch *= cpp; 283 284 BR13 = translate_raster_op(logic_op) << 16; 285 286 switch (cpp) { 287 case 1: 288 case 2: 289 case 3: 290 BR13 |= (1 << 24); 291 CMD = XY_SRC_COPY_BLT_CMD; 292 break; 293 case 4: 294 BR13 |= (1 << 24) | (1 << 25); 295 CMD = XY_SRC_COPY_BLT_CMD | XY_BLT_WRITE_ALPHA | XY_BLT_WRITE_RGB; 296 break; 297 default: 298 return; 299 } 300 301#ifndef I915 302 if (dst_tiled) { 303 CMD |= XY_DST_TILED; 304 dst_pitch /= 4; 305 } 306 if (src_tiled) { 307 CMD |= XY_SRC_TILED; 308 src_pitch /= 4; 309 } 310#endif 311 312 if (dst_y2 <= dst_y || dst_x2 <= dst_x) { 313 return; 314 } 315 316 dst_pitch &= 0xffff; 317 src_pitch &= 0xffff; 318 319 /* Initial y values don't seem to work with negative pitches. If 320 * we adjust the offsets manually (below), it seems to work fine. 321 * 322 * On the other hand, if we always adjust, the hardware doesn't 323 * know which blit directions to use, so overlapping copypixels get 324 * the wrong result. 325 */ 326 if (dst_pitch > 0 && src_pitch > 0) { 327 assert(dst_x < dst_x2); 328 assert(dst_y < dst_y2); 329 330 BEGIN_BATCH(8, NO_LOOP_CLIPRECTS); 331 OUT_BATCH(CMD); 332 OUT_BATCH(BR13 | dst_pitch); 333 OUT_BATCH((dst_y << 16) | dst_x); 334 OUT_BATCH((dst_y2 << 16) | dst_x2); 335 OUT_RELOC(dst_buffer, DRM_BO_FLAG_MEM_TT | DRM_BO_FLAG_WRITE, 336 dst_offset); 337 OUT_BATCH((src_y << 16) | src_x); 338 OUT_BATCH(src_pitch); 339 OUT_RELOC(src_buffer, DRM_BO_FLAG_MEM_TT | DRM_BO_FLAG_READ, 340 src_offset); 341 ADVANCE_BATCH(); 342 } 343 else { 344 assert(dst_x < dst_x2); 345 assert(h > 0); 346 347 BEGIN_BATCH(8, NO_LOOP_CLIPRECTS); 348 OUT_BATCH(CMD); 349 OUT_BATCH(BR13 | dst_pitch); 350 OUT_BATCH((0 << 16) | dst_x); 351 OUT_BATCH((h << 16) | dst_x2); 352 OUT_RELOC(dst_buffer, DRM_BO_FLAG_MEM_TT | DRM_BO_FLAG_WRITE, 353 dst_offset + dst_y * dst_pitch); 354 OUT_BATCH((0 << 16) | src_x); 355 OUT_BATCH(src_pitch); 356 OUT_RELOC(src_buffer, DRM_BO_FLAG_MEM_TT | DRM_BO_FLAG_READ, 357 src_offset + src_y * src_pitch); 358 ADVANCE_BATCH(); 359 } 360} 361 362 363/** 364 * Use blitting to clear the renderbuffers named by 'flags'. 365 * Note: we can't use the ctx->DrawBuffer->_ColorDrawBufferIndexes field 366 * since that might include software renderbuffers or renderbuffers 367 * which we're clearing with triangles. 368 * \param mask bitmask of BUFFER_BIT_* values indicating buffers to clear 369 */ 370void 371intelClearWithBlit(GLcontext *ctx, GLbitfield mask) 372{ 373 struct intel_context *intel = intel_context(ctx); 374 struct gl_framebuffer *fb = ctx->DrawBuffer; 375 GLuint clear_depth; 376 GLbitfield skipBuffers = 0; 377 BATCH_LOCALS; 378 379 /* 380 * Compute values for clearing the buffers. 381 */ 382 clear_depth = 0; 383 if (mask & BUFFER_BIT_DEPTH) { 384 clear_depth = (GLuint) (fb->_DepthMax * ctx->Depth.Clear); 385 } 386 if (mask & BUFFER_BIT_STENCIL) { 387 clear_depth |= (ctx->Stencil.Clear & 0xff) << 24; 388 } 389 390 /* If clearing both depth and stencil, skip BUFFER_BIT_STENCIL in 391 * the loop below. 392 */ 393 if ((mask & BUFFER_BIT_DEPTH) && (mask & BUFFER_BIT_STENCIL)) { 394 skipBuffers = BUFFER_BIT_STENCIL; 395 } 396 397 /* XXX Move this flush/lock into the following conditional? */ 398 intelFlush(&intel->ctx); 399 LOCK_HARDWARE(intel); 400 401 if (intel->numClipRects) { 402 GLint cx, cy, cw, ch; 403 drm_clip_rect_t clear; 404 int i; 405 406 /* Get clear bounds after locking */ 407 cx = fb->_Xmin; 408 cy = fb->_Ymin; 409 cw = fb->_Xmax - cx; 410 ch = fb->_Ymax - cy; 411 412 if (fb->Name == 0) { 413 /* clearing a window */ 414 415 /* flip top to bottom */ 416 clear.x1 = cx + intel->drawX; 417 clear.y1 = intel->driDrawable->y + intel->driDrawable->h - cy - ch; 418 clear.x2 = clear.x1 + cw; 419 clear.y2 = clear.y1 + ch; 420 } 421 else { 422 /* clearing FBO */ 423 assert(intel->numClipRects == 1); 424 assert(intel->pClipRects == &intel->fboRect); 425 clear.x1 = cx; 426 clear.y1 = cy; 427 clear.x2 = clear.x1 + cw; 428 clear.y2 = clear.y1 + ch; 429 /* no change to mask */ 430 } 431 432 for (i = 0; i < intel->numClipRects; i++) { 433 const drm_clip_rect_t *box = &intel->pClipRects[i]; 434 drm_clip_rect_t b; 435 GLuint buf; 436 GLuint clearMask = mask; /* use copy, since we modify it below */ 437 GLboolean all = (cw == fb->Width && ch == fb->Height); 438 439 if (!all) { 440 intel_intersect_cliprects(&b, &clear, box); 441 } 442 else { 443 b = *box; 444 } 445 446 if (b.x1 >= b.x2 || b.y1 >= b.y2) 447 continue; 448 449 if (0) 450 _mesa_printf("clear %d,%d..%d,%d, mask %x\n", 451 b.x1, b.y1, b.x2, b.y2, mask); 452 453 /* Loop over all renderbuffers */ 454 for (buf = 0; buf < BUFFER_COUNT && clearMask; buf++) { 455 const GLbitfield bufBit = 1 << buf; 456 if ((clearMask & bufBit) && !(bufBit & skipBuffers)) { 457 /* OK, clear this renderbuffer */ 458 struct intel_region *irb_region = 459 intel_get_rb_region(fb, buf); 460 dri_bo *write_buffer = 461 intel_region_buffer(intel, irb_region, 462 all ? INTEL_WRITE_FULL : 463 INTEL_WRITE_PART); 464 465 GLuint clearVal; 466 GLint pitch, cpp; 467 GLuint BR13, CMD; 468 469 ASSERT(irb_region); 470 471 pitch = irb_region->pitch; 472 cpp = irb_region->cpp; 473 474 DBG("%s dst:buf(%p)/%d+%d %d,%d sz:%dx%d\n", 475 __FUNCTION__, 476 irb_region->buffer, (pitch * cpp), 477 irb_region->draw_offset, 478 b.x1, b.y1, b.x2 - b.x1, b.y2 - b.y1); 479 480 BR13 = 0xf0 << 16; 481 CMD = XY_COLOR_BLT_CMD; 482 483 /* Setup the blit command */ 484 if (cpp == 4) { 485 BR13 |= (1 << 24) | (1 << 25); 486 if (buf == BUFFER_DEPTH || buf == BUFFER_STENCIL) { 487 if (clearMask & BUFFER_BIT_DEPTH) 488 CMD |= XY_BLT_WRITE_RGB; 489 if (clearMask & BUFFER_BIT_STENCIL) 490 CMD |= XY_BLT_WRITE_ALPHA; 491 } 492 else { 493 /* clearing RGBA */ 494 CMD |= XY_BLT_WRITE_ALPHA | XY_BLT_WRITE_RGB; 495 } 496 } 497 else { 498 ASSERT(cpp == 2 || cpp == 0); 499 BR13 |= (1 << 24); 500 } 501 502#ifndef I915 503 if (irb_region->tiled) { 504 CMD |= XY_DST_TILED; 505 pitch /= 4; 506 } 507#endif 508 BR13 |= (pitch * cpp); 509 510 if (buf == BUFFER_DEPTH || buf == BUFFER_STENCIL) { 511 clearVal = clear_depth; 512 } 513 else { 514 clearVal = (cpp == 4) 515 ? intel->ClearColor8888 : intel->ClearColor565; 516 } 517 /* 518 _mesa_debug(ctx, "hardware blit clear buf %d rb id %d\n", 519 buf, irb->Base.Name); 520 */ 521 intel_wait_flips(intel); 522 523 assert(b.x1 < b.x2); 524 assert(b.y1 < b.y2); 525 526 BEGIN_BATCH(6, REFERENCES_CLIPRECTS); 527 OUT_BATCH(CMD); 528 OUT_BATCH(BR13); 529 OUT_BATCH((b.y1 << 16) | b.x1); 530 OUT_BATCH((b.y2 << 16) | b.x2); 531 OUT_RELOC(write_buffer, DRM_BO_FLAG_MEM_TT | DRM_BO_FLAG_WRITE, 532 irb_region->draw_offset); 533 OUT_BATCH(clearVal); 534 ADVANCE_BATCH(); 535 clearMask &= ~bufBit; /* turn off bit, for faster loop exit */ 536 } 537 } 538 } 539 intel_batchbuffer_flush(intel->batch); 540 } 541 542 UNLOCK_HARDWARE(intel); 543} 544 545void 546intelEmitImmediateColorExpandBlit(struct intel_context *intel, 547 GLuint cpp, 548 GLubyte *src_bits, GLuint src_size, 549 GLuint fg_color, 550 GLshort dst_pitch, 551 dri_bo *dst_buffer, 552 GLuint dst_offset, 553 GLboolean dst_tiled, 554 GLshort x, GLshort y, 555 GLshort w, GLshort h, 556 GLenum logic_op) 557{ 558 int dwords = ALIGN(src_size, 8) / 4; 559 uint32_t opcode, br13, blit_cmd; 560 561 assert( logic_op - GL_CLEAR >= 0 ); 562 assert( logic_op - GL_CLEAR < 0x10 ); 563 564 if (w < 0 || h < 0) 565 return; 566 567 dst_pitch *= cpp; 568 569 if (dst_tiled) 570 dst_pitch /= 4; 571 572 DBG("%s dst:buf(%p)/%d+%d %d,%d sz:%dx%d, %d bytes %d dwords\n", 573 __FUNCTION__, 574 dst_buffer, dst_pitch, dst_offset, x, y, w, h, src_size, dwords); 575 576 intel_batchbuffer_require_space( intel->batch, 577 (8 * 4) + 578 (3 * 4) + 579 dwords, 580 NO_LOOP_CLIPRECTS ); 581 582 opcode = XY_SETUP_BLT_CMD; 583 if (cpp == 4) 584 opcode |= XY_BLT_WRITE_ALPHA | XY_BLT_WRITE_RGB; 585 if (dst_tiled) 586 opcode |= XY_DST_TILED; 587 588 br13 = dst_pitch | (translate_raster_op(logic_op) << 16) | (1 << 29); 589 if (cpp == 2) 590 br13 |= BR13_565; 591 else 592 br13 |= BR13_8888; 593 594 blit_cmd = XY_TEXT_IMMEDIATE_BLIT_CMD | XY_TEXT_BYTE_PACKED; /* packing? */ 595 if (dst_tiled) 596 blit_cmd |= XY_DST_TILED; 597 598 BEGIN_BATCH(8 + 3, NO_LOOP_CLIPRECTS); 599 OUT_BATCH(opcode); 600 OUT_BATCH(br13); 601 OUT_BATCH((0 << 16) | 0); /* clip x1, y1 */ 602 OUT_BATCH((100 << 16) | 100); /* clip x2, y2 */ 603 OUT_RELOC(dst_buffer, DRM_BO_FLAG_MEM_TT | DRM_BO_FLAG_WRITE, dst_offset); 604 OUT_BATCH(0); /* bg */ 605 OUT_BATCH(fg_color); /* fg */ 606 OUT_BATCH(0); /* pattern base addr */ 607 608 OUT_BATCH(blit_cmd | ((3 - 2) + dwords)); 609 OUT_BATCH((y << 16) | x); 610 OUT_BATCH(((y + h) << 16) | (x + w)); 611 ADVANCE_BATCH(); 612 613 intel_batchbuffer_data( intel->batch, 614 src_bits, 615 dwords * 4, 616 NO_LOOP_CLIPRECTS ); 617} 618