radeon_context.c revision 553a8e0e7b0e8ec2f208a582c6e644cd340dba53 
1/* $XFree86: xc/lib/GL/mesa/src/drv/radeon/radeon_context.c,v 1.9 2003/09/24 02:43:12 dawes Exp $ */
2/**************************************************************************
3
4Copyright 2000, 2001 ATI Technologies Inc., Ontario, Canada, and
5                     VA Linux Systems Inc., Fremont, California.
6
7All Rights Reserved.
8
9Permission is hereby granted, free of charge, to any person obtaining
10a copy of this software and associated documentation files (the
11"Software"), to deal in the Software without restriction, including
12without limitation the rights to use, copy, modify, merge, publish,
13distribute, sublicense, and/or sell copies of the Software, and to
14permit persons to whom the Software is furnished to do so, subject to
15the following conditions:
16
17The above copyright notice and this permission notice (including the
18next paragraph) shall be included in all copies or substantial
19portions of the Software.
20
21THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
22EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
23MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
24IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
25LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
26OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
27WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
28
29**************************************************************************/
30
31/*
32 * Authors:
33 *   Kevin E. Martin <martin@valinux.com>
34 *   Gareth Hughes <gareth@valinux.com>
35 *   Keith Whitwell <keith@tungstengraphics.com>
36 */
37
38#include "glheader.h"
39#include "api_arrayelt.h"
40#include "context.h"
41#include "simple_list.h"
42#include "imports.h"
43#include "matrix.h"
44#include "extensions.h"
45
46#include "swrast/swrast.h"
47#include "swrast_setup/swrast_setup.h"
48#include "array_cache/acache.h"
49
50#include "tnl/tnl.h"
51#include "tnl/t_pipeline.h"
52
53#include "radeon_context.h"
54#include "radeon_ioctl.h"
55#include "radeon_state.h"
56#include "radeon_span.h"
57#include "radeon_tex.h"
58#include "radeon_swtcl.h"
59#include "radeon_tcl.h"
60#include "radeon_vtxfmt.h"
61#include "radeon_maos.h"
62
63#define DRIVER_DATE	"20030328"
64
65#include "vblank.h"
66#include "utils.h"
67#include "xmlpool.h" /* for symbolic values of enum-type options */
68#ifndef RADEON_DEBUG
69int RADEON_DEBUG = (0);
70#endif
71
72
73/* Return the width and height of the given buffer.
74 */
75static void radeonGetBufferSize( GLframebuffer *buffer,
76				 GLuint *width, GLuint *height )
77{
78   GET_CURRENT_CONTEXT(ctx);
79   radeonContextPtr rmesa = RADEON_CONTEXT(ctx);
80
81   LOCK_HARDWARE( rmesa );
82   *width  = rmesa->dri.drawable->w;
83   *height = rmesa->dri.drawable->h;
84   UNLOCK_HARDWARE( rmesa );
85}
86
87/* Return various strings for glGetString().
88 */
89static const GLubyte *radeonGetString( GLcontext *ctx, GLenum name )
90{
91   radeonContextPtr rmesa = RADEON_CONTEXT(ctx);
92   static char buffer[128];
93   unsigned   offset;
94   GLuint agp_mode = rmesa->radeonScreen->IsPCI ? 0 :
95      rmesa->radeonScreen->AGPMode;
96
97   switch ( name ) {
98   case GL_VENDOR:
99      return (GLubyte *)"Tungsten Graphics, Inc.";
100
101   case GL_RENDERER:
102      offset = driGetRendererString( buffer, "Radeon", DRIVER_DATE,
103				     agp_mode );
104
105      sprintf( & buffer[ offset ], "%sTCL",
106	       !(rmesa->TclFallback & RADEON_TCL_FALLBACK_TCL_DISABLE)
107	       ? "" : "NO-" );
108
109      return (GLubyte *)buffer;
110
111   default:
112      return NULL;
113   }
114}
115
116
117/* Extension strings exported by the R100 driver.
118 */
119static const char * const card_extensions[] =
120{
121    "GL_ARB_multisample",
122    "GL_ARB_multitexture",
123    "GL_ARB_texture_border_clamp",
124    "GL_ARB_texture_compression",
125    "GL_ARB_texture_env_add",
126    "GL_ARB_texture_env_combine",
127    "GL_ARB_texture_env_dot3",
128    "GL_ARB_texture_mirrored_repeat",
129    "GL_EXT_blend_logic_op",
130    "GL_EXT_blend_subtract",
131    "GL_EXT_secondary_color",
132    "GL_EXT_texture_edge_clamp",
133    "GL_EXT_texture_env_combine",
134    "GL_EXT_texture_env_dot3",
135    "GL_EXT_texture_filter_anisotropic",
136    "GL_EXT_texture_lod_bias",
137    "GL_ATI_texture_env_combine3",
138    "GL_ATI_texture_mirror_once",
139    "GL_MESA_ycbcr_texture",
140    "GL_NV_blend_square",
141    "GL_SGIS_generate_mipmap",
142    NULL
143};
144
145extern const struct tnl_pipeline_stage _radeon_texrect_stage;
146extern const struct tnl_pipeline_stage _radeon_render_stage;
147extern const struct tnl_pipeline_stage _radeon_tcl_stage;
148
149static const struct tnl_pipeline_stage *radeon_pipeline[] = {
150
151   /* Try and go straight to t&l
152    */
153   &_radeon_tcl_stage,
154
155   /* Catch any t&l fallbacks
156    */
157   &_tnl_vertex_transform_stage,
158   &_tnl_normal_transform_stage,
159   &_tnl_lighting_stage,
160   &_tnl_fog_coordinate_stage,
161   &_tnl_texgen_stage,
162   &_tnl_texture_transform_stage,
163
164   /* Scale texture rectangle to 0..1.
165    */
166   &_radeon_texrect_stage,
167
168   &_radeon_render_stage,
169   &_tnl_render_stage,		/* FALLBACK:  */
170   0,
171};
172
173
174
175/* Initialize the driver's misc functions.
176 */
177static void radeonInitDriverFuncs( GLcontext *ctx )
178{
179    ctx->Driver.GetBufferSize		= radeonGetBufferSize;
180    ctx->Driver.ResizeBuffers           = _swrast_alloc_buffers;
181    ctx->Driver.GetString		= radeonGetString;
182
183    ctx->Driver.Error			= NULL;
184    ctx->Driver.DrawPixels		= NULL;
185    ctx->Driver.Bitmap			= NULL;
186}
187
188static const struct dri_debug_control debug_control[] =
189{
190    { "fall",  DEBUG_FALLBACKS },
191    { "tex",   DEBUG_TEXTURE },
192    { "ioctl", DEBUG_IOCTL },
193    { "prim",  DEBUG_PRIMS },
194    { "vert",  DEBUG_VERTS },
195    { "state", DEBUG_STATE },
196    { "code",  DEBUG_CODEGEN },
197    { "vfmt",  DEBUG_VFMT },
198    { "vtxf",  DEBUG_VFMT },
199    { "verb",  DEBUG_VERBOSE },
200    { "dri",   DEBUG_DRI },
201    { "dma",   DEBUG_DMA },
202    { "san",   DEBUG_SANITY },
203    { NULL,    0 }
204};
205
206
207static int
208get_ust_nop( int64_t * ust )
209{
210   *ust = 1;
211   return 0;
212}
213
214
215/* Create the device specific context.
216 */
217GLboolean
218radeonCreateContext( const __GLcontextModes *glVisual,
219                     __DRIcontextPrivate *driContextPriv,
220                     void *sharedContextPrivate)
221{
222   __DRIscreenPrivate *sPriv = driContextPriv->driScreenPriv;
223   radeonScreenPtr screen = (radeonScreenPtr)(sPriv->private);
224   radeonContextPtr rmesa;
225   GLcontext *ctx, *shareCtx;
226   int i;
227   int tcl_mode, fthrottle_mode;
228
229   assert(glVisual);
230   assert(driContextPriv);
231   assert(screen);
232
233   /* Allocate the Radeon context */
234   rmesa = (radeonContextPtr) CALLOC( sizeof(*rmesa) );
235   if ( !rmesa )
236      return GL_FALSE;
237
238   /* Allocate the Mesa context */
239   if (sharedContextPrivate)
240      shareCtx = ((radeonContextPtr) sharedContextPrivate)->glCtx;
241   else
242      shareCtx = NULL;
243   rmesa->glCtx = _mesa_create_context(glVisual, shareCtx, (void *) rmesa, GL_TRUE);
244   if (!rmesa->glCtx) {
245      FREE(rmesa);
246      return GL_FALSE;
247   }
248   driContextPriv->driverPrivate = rmesa;
249
250   /* Init radeon context data */
251   rmesa->dri.context = driContextPriv;
252   rmesa->dri.screen = sPriv;
253   rmesa->dri.drawable = NULL; /* Set by XMesaMakeCurrent */
254   rmesa->dri.hwContext = driContextPriv->hHWContext;
255   rmesa->dri.hwLock = &sPriv->pSAREA->lock;
256   rmesa->dri.fd = sPriv->fd;
257   rmesa->dri.drmMinor = sPriv->drmMinor;
258
259   /* Parse configuration files */
260   driParseConfigFiles (&rmesa->optionCache, &screen->optionCache,
261			screen->driScreen->myNum, "radeon");
262
263   rmesa->radeonScreen = screen;
264   rmesa->sarea = (RADEONSAREAPrivPtr)((GLubyte *)sPriv->pSAREA +
265				       screen->sarea_priv_offset);
266
267
268   rmesa->dma.buf0_address = rmesa->radeonScreen->buffers->list[0].address;
269
270   (void) memset( rmesa->texture_heaps, 0, sizeof( rmesa->texture_heaps ) );
271   make_empty_list( & rmesa->swapped );
272
273   rmesa->nr_heaps = screen->numTexHeaps;
274   for ( i = 0 ; i < rmesa->nr_heaps ; i++ ) {
275      rmesa->texture_heaps[i] = driCreateTextureHeap( i, rmesa,
276	    screen->texSize[i],
277	    12,
278	    RADEON_NR_TEX_REGIONS,
279	    rmesa->sarea->texList[i],
280	    & rmesa->sarea->texAge[i],
281	    & rmesa->swapped,
282	    sizeof( radeonTexObj ),
283	    (destroy_texture_object_t *) radeonDestroyTexObj );
284
285      driSetTextureSwapCounterLocation( rmesa->texture_heaps[i],
286					& rmesa->c_textureSwaps );
287   }
288   rmesa->texture_depth = driQueryOptioni (&rmesa->optionCache,
289					   "texture_depth");
290   if (rmesa->texture_depth == DRI_CONF_TEXTURE_DEPTH_FB)
291      rmesa->texture_depth = ( screen->cpp == 4 ) ?
292	 DRI_CONF_TEXTURE_DEPTH_32 : DRI_CONF_TEXTURE_DEPTH_16;
293
294   rmesa->swtcl.RenderIndex = ~0;
295   rmesa->lost_context = 1;
296
297   /* Set the maximum texture size small enough that we can guarentee that
298    * all texture units can bind a maximal texture and have them both in
299    * texturable memory at once.
300    */
301
302   ctx = rmesa->glCtx;
303   ctx->Const.MaxTextureUnits = 2;
304   ctx->Const.MaxTextureImageUnits = 2;
305   ctx->Const.MaxTextureCoordUnits = 2;
306
307   driCalculateMaxTextureLevels( rmesa->texture_heaps,
308				 rmesa->nr_heaps,
309				 & ctx->Const,
310				 4,
311				 11, /* max 2D texture size is 2048x2048 */
312				 0,  /* 3D textures unsupported. */
313				 0,  /* cube textures unsupported. */
314				 11, /* max rect texture size is 2048x2048. */
315				 12,
316				 GL_FALSE );
317
318   ctx->Const.MaxTextureMaxAnisotropy = 16.0;
319
320   /* No wide points.
321    */
322   ctx->Const.MinPointSize = 1.0;
323   ctx->Const.MinPointSizeAA = 1.0;
324   ctx->Const.MaxPointSize = 1.0;
325   ctx->Const.MaxPointSizeAA = 1.0;
326
327   ctx->Const.MinLineWidth = 1.0;
328   ctx->Const.MinLineWidthAA = 1.0;
329   ctx->Const.MaxLineWidth = 10.0;
330   ctx->Const.MaxLineWidthAA = 10.0;
331   ctx->Const.LineWidthGranularity = 0.0625;
332
333   /* Set maxlocksize (and hence vb size) small enough to avoid
334    * fallbacks in radeon_tcl.c.  ie. guarentee that all vertices can
335    * fit in a single dma buffer for indexed rendering of quad strips,
336    * etc.
337    */
338   ctx->Const.MaxArrayLockSize =
339      MIN2( ctx->Const.MaxArrayLockSize,
340 	    RADEON_BUFFER_SIZE / RADEON_MAX_TCL_VERTSIZE );
341
342   rmesa->boxes = 0;
343
344   /* Initialize the software rasterizer and helper modules.
345    */
346   _swrast_CreateContext( ctx );
347   _ac_CreateContext( ctx );
348   _tnl_CreateContext( ctx );
349   _swsetup_CreateContext( ctx );
350   _ae_create_context( ctx );
351
352   /* Install the customized pipeline:
353    */
354   _tnl_destroy_pipeline( ctx );
355   _tnl_install_pipeline( ctx, radeon_pipeline );
356   ctx->Driver.FlushVertices = radeonFlushVertices;
357
358   /* Try and keep materials and vertices separate:
359    */
360   _tnl_isolate_materials( ctx, GL_TRUE );
361
362
363/*     _mesa_allow_light_in_model( ctx, GL_FALSE ); */
364
365   /* Try and keep materials and vertices separate:
366    */
367   _tnl_isolate_materials( ctx, GL_TRUE );
368
369
370   /* Configure swrast to match hardware characteristics:
371    */
372   _swrast_allow_pixel_fog( ctx, GL_FALSE );
373   _swrast_allow_vertex_fog( ctx, GL_TRUE );
374
375
376   _math_matrix_ctr( &rmesa->TexGenMatrix[0] );
377   _math_matrix_ctr( &rmesa->TexGenMatrix[1] );
378   _math_matrix_ctr( &rmesa->tmpmat );
379   _math_matrix_set_identity( &rmesa->TexGenMatrix[0] );
380   _math_matrix_set_identity( &rmesa->TexGenMatrix[1] );
381   _math_matrix_set_identity( &rmesa->tmpmat );
382
383   driInitExtensions( ctx, card_extensions, GL_TRUE );
384
385   if (rmesa->dri.drmMinor >= 9)
386      _mesa_enable_extension( ctx, "GL_NV_texture_rectangle");
387
388   radeonInitDriverFuncs( ctx );
389   radeonInitIoctlFuncs( ctx );
390   radeonInitStateFuncs( ctx );
391   radeonInitSpanFuncs( ctx );
392   radeonInitTextureFuncs( ctx );
393   radeonInitState( rmesa );
394   radeonInitSwtcl( ctx );
395
396   _mesa_vector4f_alloc( &rmesa->tcl.ObjClean, 0,
397			 ctx->Const.MaxArrayLockSize, 32 );
398
399   fthrottle_mode = driQueryOptioni(&rmesa->optionCache, "fthrottle_mode");
400   rmesa->iw.irq_seq = -1;
401   rmesa->irqsEmitted = 0;
402   rmesa->do_irqs = (rmesa->radeonScreen->irq != 0 &&
403		     fthrottle_mode == DRI_CONF_FTHROTTLE_IRQS);
404
405   rmesa->do_usleeps = (fthrottle_mode == DRI_CONF_FTHROTTLE_USLEEPS);
406
407   rmesa->vblank_flags = (rmesa->radeonScreen->irq != 0)
408       ? driGetDefaultVBlankFlags(&rmesa->optionCache) : VBLANK_FLAG_NO_IRQ;
409#ifndef _SOLO
410   rmesa->get_ust = (PFNGLXGETUSTPROC) glXGetProcAddress( (const GLubyte *) "__glXGetUST" );
411   if ( rmesa->get_ust == NULL ) {
412      rmesa->get_ust = get_ust_nop;
413   }
414#else
415   rmesa->get_ust = get_ust_nop;
416#endif
417
418   (*rmesa->get_ust)( & rmesa->swap_ust );
419
420
421#if DO_DEBUG
422   RADEON_DEBUG = driParseDebugString( getenv( "RADEON_DEBUG" ),
423				       debug_control );
424#endif
425
426   tcl_mode = driQueryOptioni(&rmesa->optionCache, "tcl_mode");
427   if (driQueryOptionb(&rmesa->optionCache, "no_rast")) {
428      fprintf(stderr, "disabling 3D acceleration\n");
429      FALLBACK(rmesa, RADEON_FALLBACK_DISABLE, 1);
430   } else if (tcl_mode == DRI_CONF_TCL_SW ||
431	      !(rmesa->radeonScreen->chipset & RADEON_CHIPSET_TCL)) {
432      rmesa->radeonScreen->chipset &= ~RADEON_CHIPSET_TCL;
433      fprintf(stderr, "disabling TCL support\n");
434      TCL_FALLBACK(rmesa->glCtx, RADEON_TCL_FALLBACK_TCL_DISABLE, 1);
435   }
436
437   if (rmesa->radeonScreen->chipset & RADEON_CHIPSET_TCL) {
438      if (tcl_mode >= DRI_CONF_TCL_VTXFMT)
439	 radeonVtxfmtInit( ctx, tcl_mode >= DRI_CONF_TCL_CODEGEN );
440
441      _tnl_need_dlist_norm_lengths( ctx, GL_FALSE );
442   }
443   return GL_TRUE;
444}
445
446
447/* Destroy the device specific context.
448 */
449/* Destroy the Mesa and driver specific context data.
450 */
451void radeonDestroyContext( __DRIcontextPrivate *driContextPriv )
452{
453   GET_CURRENT_CONTEXT(ctx);
454   radeonContextPtr rmesa = (radeonContextPtr) driContextPriv->driverPrivate;
455   radeonContextPtr current = ctx ? RADEON_CONTEXT(ctx) : NULL;
456
457   /* check if we're deleting the currently bound context */
458   if (rmesa == current) {
459      RADEON_FIREVERTICES( rmesa );
460      _mesa_make_current2(NULL, NULL, NULL);
461   }
462
463   /* Free radeon context resources */
464   assert(rmesa); /* should never be null */
465   if ( rmesa ) {
466      GLboolean   release_texture_heaps;
467
468
469      release_texture_heaps = (rmesa->glCtx->Shared->RefCount == 1);
470      _swsetup_DestroyContext( rmesa->glCtx );
471      _tnl_DestroyContext( rmesa->glCtx );
472      _ac_DestroyContext( rmesa->glCtx );
473      _swrast_DestroyContext( rmesa->glCtx );
474
475      radeonDestroySwtcl( rmesa->glCtx );
476      radeonReleaseArrays( rmesa->glCtx, ~0 );
477      if (rmesa->dma.current.buf) {
478	 radeonReleaseDmaRegion( rmesa, &rmesa->dma.current, __FUNCTION__ );
479	 radeonFlushCmdBuf( rmesa, __FUNCTION__ );
480      }
481
482      if (!(rmesa->TclFallback & RADEON_TCL_FALLBACK_TCL_DISABLE)) {
483	 int tcl_mode = driQueryOptioni(&rmesa->optionCache, "tcl_mode");
484	 if (tcl_mode >= DRI_CONF_TCL_VTXFMT)
485	    radeonVtxfmtDestroy( rmesa->glCtx );
486      }
487
488      /* free the Mesa context */
489      rmesa->glCtx->DriverCtx = NULL;
490      _mesa_destroy_context( rmesa->glCtx );
491
492      _mesa_vector4f_free( &rmesa->tcl.ObjClean );
493
494      if (rmesa->state.scissor.pClipRects) {
495	 FREE(rmesa->state.scissor.pClipRects);
496	 rmesa->state.scissor.pClipRects = 0;
497      }
498
499      if ( release_texture_heaps ) {
500         /* This share group is about to go away, free our private
501          * texture object data.
502          */
503         int i;
504
505         for ( i = 0 ; i < rmesa->nr_heaps ; i++ ) {
506	    driDestroyTextureHeap( rmesa->texture_heaps[ i ] );
507	    rmesa->texture_heaps[ i ] = NULL;
508         }
509
510	 assert( is_empty_list( & rmesa->swapped ) );
511      }
512
513      /* free the option cache */
514      driDestroyOptionCache (&rmesa->optionCache);
515
516      FREE( rmesa );
517   }
518}
519
520
521
522
523void
524radeonSwapBuffers( __DRIdrawablePrivate *dPriv )
525{
526
527   if (dPriv->driContextPriv && dPriv->driContextPriv->driverPrivate) {
528      radeonContextPtr rmesa;
529      GLcontext *ctx;
530      rmesa = (radeonContextPtr) dPriv->driContextPriv->driverPrivate;
531      ctx = rmesa->glCtx;
532      if (ctx->Visual.doubleBufferMode) {
533         _mesa_notifySwapBuffers( ctx );  /* flush pending rendering comands */
534
535         if ( rmesa->doPageFlip ) {
536            radeonPageFlip( dPriv );
537         }
538         else {
539            radeonCopyBuffer( dPriv );
540         }
541      }
542   }
543   else {
544      /* XXX this shouldn't be an error but we can't handle it for now */
545      _mesa_problem(NULL, "%s: drawable has no context!", __FUNCTION__);
546   }
547}
548
549
550/* Force the context `c' to be the current context and associate with it
551 * buffer `b'.
552 */
553GLboolean
554radeonMakeCurrent( __DRIcontextPrivate *driContextPriv,
555                   __DRIdrawablePrivate *driDrawPriv,
556                   __DRIdrawablePrivate *driReadPriv )
557{
558   if ( driContextPriv ) {
559      radeonContextPtr newCtx =
560	 (radeonContextPtr) driContextPriv->driverPrivate;
561
562      if (RADEON_DEBUG & DEBUG_DRI)
563	 fprintf(stderr, "%s ctx %p\n", __FUNCTION__, newCtx->glCtx);
564
565      if ( newCtx->dri.drawable != driDrawPriv ) {
566	 driDrawableInitVBlank( driDrawPriv, newCtx->vblank_flags );
567	 newCtx->dri.drawable = driDrawPriv;
568	 radeonUpdateWindow( newCtx->glCtx );
569	 radeonUpdateViewportOffset( newCtx->glCtx );
570      }
571
572      _mesa_make_current2( newCtx->glCtx,
573			   (GLframebuffer *) driDrawPriv->driverPrivate,
574			   (GLframebuffer *) driReadPriv->driverPrivate );
575
576      if ( !newCtx->glCtx->Viewport.Width ) {
577	 _mesa_set_viewport( newCtx->glCtx, 0, 0,
578			     driDrawPriv->w, driDrawPriv->h );
579      }
580
581      if (newCtx->vb.enabled)
582	 radeonVtxfmtMakeCurrent( newCtx->glCtx );
583
584   } else {
585      if (RADEON_DEBUG & DEBUG_DRI)
586	 fprintf(stderr, "%s ctx is null\n", __FUNCTION__);
587      _mesa_make_current( 0, 0 );
588   }
589
590   if (RADEON_DEBUG & DEBUG_DRI)
591      fprintf(stderr, "End %s\n", __FUNCTION__);
592   return GL_TRUE;
593}
594
595/* Force the context `c' to be unbound from its buffer.
596 */
597GLboolean
598radeonUnbindContext( __DRIcontextPrivate *driContextPriv )
599{
600   radeonContextPtr rmesa = (radeonContextPtr) driContextPriv->driverPrivate;
601
602   if (RADEON_DEBUG & DEBUG_DRI)
603      fprintf(stderr, "%s ctx %p\n", __FUNCTION__, rmesa->glCtx);
604
605   return GL_TRUE;
606}
607