1;//
2;// Copyright (C) 2007-2008 ARM Limited
3;//
4;// Licensed under the Apache License, Version 2.0 (the "License");
5;// you may not use this file except in compliance with the License.
6;// You may obtain a copy of the License at
7;//
8;//      http://www.apache.org/licenses/LICENSE-2.0
9;//
10;// Unless required by applicable law or agreed to in writing, software
11;// distributed under the License is distributed on an "AS IS" BASIS,
12;// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13;// See the License for the specific language governing permissions and
14;// limitations under the License.
15;//
16;//
17;//
18;// File Name:  omxVCM4P2_FindMVpred_s.s
19;// OpenMAX DL: v1.0.2
20;// Revision:   9641
21;// Date:       Thursday, February 7, 2008
22;//
23;//
24;//
25;//
26
27;// Function:
28;//     omxVCM4P2_FindMVpred
29;//
30        ;// Include headers
31        INCLUDE omxtypes_s.h
32        INCLUDE armCOMM_s.h
33        INCLUDE armVCCOMM_s.h
34
35        ;// Define cpu variants
36        M_VARIANTS ARM1136JS
37
38
39        IF ARM1136JS
40
41        M_TABLE armVCM4P2_pBlkIndexTable
42        DCD  OMXVCBlk0, OMXVCBlk1
43        DCD  OMXVCBlk2, OMXVCBlk3
44
45;//--------------------------------------------
46;// Declare input registers
47;//--------------------------------------------
48
49pSrcMVCurMB            RN 0
50pSrcCandMV1            RN 1
51pSrcCandMV2            RN 2
52pSrcCandMV3            RN 3
53pDstMVPred             RN 4
54pDstMVPredME           RN 5
55iBlk                   RN 6
56
57pTable                 RN 4
58CandMV                 RN 12
59
60pCandMV1               RN 7
61pCandMV2               RN 8
62pCandMV3               RN 9
63
64CandMV1dx              RN 0
65CandMV1dy              RN 1
66CandMV2dx              RN 2
67CandMV2dy              RN 3
68CandMV3dx              RN 10
69CandMV3dy              RN 11
70
71temp                   RN 14
72
73zero                   RN 14
74return                 RN 0
75
76; ----------------------------------------------
77; Main routine
78; ----------------------------------------------
79
80        M_ALLOC4 MV, 4
81
82        ;// Function header
83        M_START omxVCM4P2_FindMVpred, r11
84
85        ;// Define stack arguments
86        M_ARG   ppDstMVPred,  4
87        M_ARG   ppDstMVPredME, 4
88        M_ARG   Blk, 4
89
90        M_ADR CandMV, MV
91        MOV   zero, #0
92        M_LDR iBlk, Blk
93
94        ;// Set the default value for these
95        ;// to be used if pSrcCandMV[1|2|3] == NULL
96        MOV   pCandMV1, CandMV
97        MOV   pCandMV2, CandMV
98        MOV   pCandMV3, CandMV
99
100        STR   zero, [CandMV]
101
102        ;// Branch to the case based on blk number
103        M_SWITCH iBlk
104        M_CASE   OMXVCBlk0      ;// iBlk=0
105        M_CASE   OMXVCBlk1      ;// iBlk=0
106        M_CASE   OMXVCBlk2      ;// iBlk=0
107        M_CASE   OMXVCBlk3      ;// iBlk=0
108        M_ENDSWITCH
109
110OMXVCBlk0
111        CMP   pSrcCandMV1, #0
112        ADDNE pCandMV1, pSrcCandMV1, #4
113
114        CMP   pSrcCandMV2, #0
115        ADDNE pCandMV2, pSrcCandMV2, #8
116
117        CMP   pSrcCandMV3, #0
118        ADDNE pCandMV3, pSrcCandMV3, #8
119        CMPEQ pSrcCandMV1, #0
120
121        MOVEQ pCandMV3, pCandMV2
122        MOVEQ pCandMV1, pCandMV2
123
124        CMP   pSrcCandMV1, #0
125        CMPEQ pSrcCandMV2, #0
126
127        MOVEQ pCandMV1, pCandMV3
128        MOVEQ pCandMV2, pCandMV3
129
130        CMP   pSrcCandMV2, #0
131        CMPEQ pSrcCandMV3, #0
132
133        MOVEQ pCandMV2, pCandMV1
134        MOVEQ pCandMV3, pCandMV1
135
136        B     BlkEnd
137
138OMXVCBlk1
139        MOV   pCandMV1, pSrcMVCurMB
140        CMP   pSrcCandMV3, #0
141        ADDNE pCandMV3, pSrcCandMV3, #8
142
143        CMP   pSrcCandMV2, #0
144        ADDNE pCandMV2, pSrcCandMV2, #12
145
146        CMPEQ pSrcCandMV3, #0
147
148        MOVEQ pCandMV2, pCandMV1
149        MOVEQ pCandMV3, pCandMV1
150
151        B     BlkEnd
152
153OMXVCBlk2
154        CMP   pSrcCandMV1, #0
155        MOV   pCandMV2, pSrcMVCurMB
156        ADD   pCandMV3, pSrcMVCurMB, #4
157        ADDNE pCandMV1, pSrcCandMV1, #12
158        B     BlkEnd
159
160OMXVCBlk3
161        ADD   pCandMV1, pSrcMVCurMB, #8
162        MOV   pCandMV2, pSrcMVCurMB
163        ADD   pCandMV3, pSrcMVCurMB, #4
164
165BlkEnd
166
167        ;// Using the transperancy info, zero
168        ;// out the candidate MV if neccesary
169        LDRSH CandMV1dx, [pCandMV1], #2
170        LDRSH CandMV2dx, [pCandMV2], #2
171        LDRSH CandMV3dx, [pCandMV3], #2
172
173        ;// Load argument from the stack
174        M_LDR pDstMVPredME, ppDstMVPredME
175
176        LDRSH CandMV1dy, [pCandMV1]
177        LDRSH CandMV2dy, [pCandMV2]
178        LDRSH CandMV3dy, [pCandMV3]
179
180        CMP pDstMVPredME, #0
181
182        ;// Store the candidate MV's into the pDstMVPredME,
183        ;// these can be used in the fast algorithm if implemented
184
185        STRHNE CandMV1dx, [pDstMVPredME], #2
186        STRHNE CandMV1dy, [pDstMVPredME], #2
187        STRHNE CandMV2dx, [pDstMVPredME], #2
188        STRHNE CandMV2dy, [pDstMVPredME], #2
189        STRHNE CandMV3dx, [pDstMVPredME], #2
190        STRHNE CandMV3dy, [pDstMVPredME]
191
192        ; Find the median of the 3 candidate MV's
193        M_MEDIAN3 CandMV1dx, CandMV2dx, CandMV3dx, temp
194
195        ;// Load argument from the stack
196        M_LDR pDstMVPred, ppDstMVPred
197
198        M_MEDIAN3 CandMV1dy, CandMV2dy, CandMV3dy, temp
199
200        STRH CandMV3dx, [pDstMVPred], #2
201        STRH CandMV3dy, [pDstMVPred]
202
203        MOV return, #OMX_Sts_NoErr
204
205        M_END
206    ENDIF ;// ARM1136JS :LOR: CortexA8
207
208    END
209