Lines Matching refs:reg
83 for (const RegStorage& reg : core_regs) {
84 RegisterInfo* info = new (arena) RegisterInfo(reg, m2l_->GetRegMaskCommon(reg));
85 m2l_->reginfo_map_[reg.GetReg()] = info;
89 for (const RegStorage& reg : core64_regs) {
90 RegisterInfo* info = new (arena) RegisterInfo(reg, m2l_->GetRegMaskCommon(reg));
91 m2l_->reginfo_map_[reg.GetReg()] = info;
95 for (const RegStorage& reg : sp_regs) {
96 RegisterInfo* info = new (arena) RegisterInfo(reg, m2l_->GetRegMaskCommon(reg));
97 m2l_->reginfo_map_[reg.GetReg()] = info;
101 for (const RegStorage& reg : dp_regs) {
102 RegisterInfo* info = new (arena) RegisterInfo(reg, m2l_->GetRegMaskCommon(reg));
103 m2l_->reginfo_map_[reg.GetReg()] = info;
108 for (RegStorage reg : reserved_regs) {
109 m2l_->MarkInUse(reg);
111 for (RegStorage reg : reserved64_regs) {
112 m2l_->MarkInUse(reg);
116 for (RegStorage reg : core_temps) {
117 m2l_->MarkTemp(reg);
119 for (RegStorage reg : core64_temps) {
120 m2l_->MarkTemp(reg);
122 for (RegStorage reg : sp_temps) {
123 m2l_->MarkTemp(reg);
125 for (RegStorage reg : dp_temps) {
126 m2l_->MarkTemp(reg);
172 void Mir2Lir::Clobber(RegStorage reg) {
173 if (UNLIKELY(reg.IsPair())) {
174 DCHECK(!GetRegInfo(reg.GetLow())->IsAliased());
175 Clobber(reg.GetLow());
176 DCHECK(!GetRegInfo(reg.GetHigh())->IsAliased());
177 Clobber(reg.GetHigh());
179 RegisterInfo* info = GetRegInfo(reg);
258 void Mir2Lir::RecordCorePromotion(RegStorage reg, int s_reg) {
261 int reg_num = reg.GetRegNum();
262 GetRegInfo(reg)->MarkInUse();
264 // Include reg for later sort
290 void Mir2Lir::RecordFpPromotion(RegStorage reg, int s_reg) {
294 int reg_num = reg.GetRegNum();
295 GetRegInfo(reg)->MarkInUse();
297 // Include reg for later sort
301 promotion_map_[p_map_idx].fp_reg = reg.GetReg();
472 RegStorage reg;
474 reg = FindLiveReg(*reg_pool_->ref_regs_, s_reg);
475 CheckRegStorage(reg, WidenessCheck::kCheckNotWide, RefCheck::kCheckRef, FPCheck::kCheckNotFP);
477 if (!reg.Valid() && ((reg_class == kAnyReg) || (reg_class == kFPReg))) {
478 reg = FindLiveReg(wide ? reg_pool_->dp_regs_ : reg_pool_->sp_regs_, s_reg);
480 if (!reg.Valid() && (reg_class != kFPReg)) {
482 reg = FindLiveReg(wide || reg_class == kRefReg ? reg_pool_->core64_regs_ :
485 reg = FindLiveReg(reg_pool_->core_regs_, s_reg);
488 if (reg.Valid()) {
489 if (wide && !reg.IsFloat() && !cu_->target64) {
490 // Only allow reg pairs for core regs on 32-bit targets.
493 reg = RegStorage::MakeRegPair(reg, high_reg);
494 MarkWide(reg);
497 reg = RegStorage::InvalidReg();
500 if (reg.Valid() && (wide != GetRegInfo(reg)->IsWide())) {
502 reg = RegStorage::InvalidReg();
505 if (reg.Valid()) {
506 if (reg.IsPair()) {
507 RegisterInfo* info_low = GetRegInfo(reg.GetLow());
508 RegisterInfo* info_high = GetRegInfo(reg.GetHigh());
516 RegisterInfo* info = GetRegInfo(reg);
528 CheckRegStorage(reg, WidenessCheck::kIgnoreWide,
531 return reg;
534 void Mir2Lir::FreeTemp(RegStorage reg) {
535 if (reg.IsPair()) {
536 FreeTemp(reg.GetLow());
537 FreeTemp(reg.GetHigh());
539 RegisterInfo* p = GetRegInfo(reg);
543 p->SetPartner(reg);
551 int free_low = rl_free.reg.GetLowReg();
552 int free_high = rl_free.reg.GetHighReg();
553 int keep_low = rl_keep.reg.GetLowReg();
554 int keep_high = rl_keep.reg.GetHighReg();
558 FreeTemp(rl_free.reg);
562 bool Mir2Lir::IsLive(RegStorage reg) {
564 if (reg.IsPair()) {
565 RegisterInfo* p_lo = GetRegInfo(reg.GetLow());
566 RegisterInfo* p_hi = GetRegInfo(reg.GetHigh());
570 RegisterInfo* p = GetRegInfo(reg);
576 bool Mir2Lir::IsTemp(RegStorage reg) {
578 if (reg.IsPair()) {
579 RegisterInfo* p_lo = GetRegInfo(reg.GetLow());
580 RegisterInfo* p_hi = GetRegInfo(reg.GetHigh());
583 RegisterInfo* p = GetRegInfo(reg);
589 bool Mir2Lir::IsPromoted(RegStorage reg) {
591 if (reg.IsPair()) {
592 RegisterInfo* p_lo = GetRegInfo(reg.GetLow());
593 RegisterInfo* p_hi = GetRegInfo(reg.GetHigh());
596 RegisterInfo* p = GetRegInfo(reg);
602 bool Mir2Lir::IsDirty(RegStorage reg) {
604 if (reg.IsPair()) {
605 RegisterInfo* p_lo = GetRegInfo(reg.GetLow());
606 RegisterInfo* p_hi = GetRegInfo(reg.GetHigh());
609 RegisterInfo* p = GetRegInfo(reg);
620 void Mir2Lir::LockTemp(RegStorage reg) {
621 DCHECK(IsTemp(reg));
622 if (reg.IsPair()) {
623 RegisterInfo* p_lo = GetRegInfo(reg.GetLow());
624 RegisterInfo* p_hi = GetRegInfo(reg.GetHigh());
630 RegisterInfo* p = GetRegInfo(reg);
636 void Mir2Lir::ResetDef(RegStorage reg) {
637 if (reg.IsPair()) {
638 GetRegInfo(reg.GetLow())->ResetDefBody();
639 GetRegInfo(reg.GetHigh())->ResetDefBody();
641 GetRegInfo(reg)->ResetDefBody();
645 void Mir2Lir::NullifyRange(RegStorage reg, int s_reg) {
647 RegStorage rs = reg.IsPair() ? reg.GetLow() : reg;
649 info = GetRegInfo(reg);
671 RegisterInfo* p = GetRegInfo(rl.reg);
686 if (rl.reg.IsPair()) {
687 p = GetRegInfo(rl.reg.GetLow());
688 ResetDef(rl.reg.GetHigh()); // Only track low of pair
690 p = GetRegInfo(rl.reg);
698 if (IsTemp(rl.reg) && !(cu_->disable_opt & (1 << kSuppressLoads))) {
699 NullifyRange(rl.reg, rl.s_reg_low);
701 ResetDef(rl.reg);
706 // If pair, only track low reg of pair.
707 RegStorage rs = rl.reg.IsPair() ? rl.reg.GetLow() : rl.reg;
726 void Mir2Lir::FlushRegWide(RegStorage reg) {
727 if (reg.IsPair()) {
728 RegisterInfo* info1 = GetRegInfo(reg.GetLow());
729 RegisterInfo* info2 = GetRegInfo(reg.GetHigh());
746 StoreBaseDisp(TargetPtrReg(kSp), VRegOffset(v_reg), reg, k64, kNotVolatile);
749 RegisterInfo* info = GetRegInfo(reg);
754 StoreBaseDisp(TargetPtrReg(kSp), VRegOffset(v_reg), reg, k64, kNotVolatile);
759 void Mir2Lir::FlushReg(RegStorage reg) {
760 DCHECK(!reg.IsPair());
761 RegisterInfo* info = GetRegInfo(reg);
766 StoreBaseDisp(TargetPtrReg(kSp), VRegOffset(v_reg), reg, kWord, kNotVolatile);
789 bool Mir2Lir::RegClassMatches(int reg_class, RegStorage reg) {
797 return !reg.IsFloat();
799 return reg.IsFloat();
804 RegStorage reg = loc.reg;
805 if (!IsTemp(reg)) {
811 if (reg.IsPair()) {
812 GetRegInfo(reg.GetLow())->MarkDead();
813 GetRegInfo(reg.GetHigh())->MarkDead();
815 GetRegInfo(reg)->MarkDead();
818 if (reg.IsPair()) {
819 RegisterInfo* info_lo = GetRegInfo(reg.GetLow());
820 RegisterInfo* info_hi = GetRegInfo(reg.GetHigh());
830 RegisterInfo* info = GetRegInfo(reg);
841 MarkWide(reg);
843 MarkNarrow(reg);
848 void Mir2Lir::MarkTemp(RegStorage reg) {
849 DCHECK(!reg.IsPair());
850 RegisterInfo* info = GetRegInfo(reg);
855 void Mir2Lir::UnmarkTemp(RegStorage reg) {
856 DCHECK(!reg.IsPair());
857 RegisterInfo* info = GetRegInfo(reg);
864 void Mir2Lir::MarkWide(RegStorage reg) {
865 if (reg.IsPair()) {
866 RegisterInfo* info_lo = GetRegInfo(reg.GetLow());
867 RegisterInfo* info_hi = GetRegInfo(reg.GetHigh());
877 info_lo->SetPartner(reg.GetHigh());
878 info_hi->SetPartner(reg.GetLow());
880 RegisterInfo* info = GetRegInfo(reg);
882 info->SetPartner(reg);
886 void Mir2Lir::MarkNarrow(RegStorage reg) {
887 DCHECK(!reg.IsPair());
888 RegisterInfo* info = GetRegInfo(reg);
890 info->SetPartner(reg);
894 if (loc.reg.IsPair()) {
895 RegisterInfo* info = GetRegInfo(loc.reg.GetLow());
897 info = GetRegInfo(loc.reg.GetHigh());
900 RegisterInfo* info = GetRegInfo(loc.reg);
911 if (loc.reg.IsPair()) {
912 RegisterInfo* info = GetRegInfo(loc.reg.GetLow());
914 info = GetRegInfo(loc.reg.GetHigh());
917 RegisterInfo* info = GetRegInfo(loc.reg);
922 void Mir2Lir::MarkInUse(RegStorage reg) {
923 if (reg.IsPair()) {
924 GetRegInfo(reg.GetLow())->MarkInUse();
925 GetRegInfo(reg.GetHigh())->MarkInUse();
927 GetRegInfo(reg)->MarkInUse();
953 // TODO: Add checks in !info->IsDead() case to ensure every live bit is owned by exactly 1 reg.
997 RegStorage reg = AllocLiveReg(loc.s_reg_low, loc.ref ? kRefReg : kAnyReg, false);
998 if (reg.Valid()) {
1000 RegisterInfo* info = GetRegInfo(reg);
1001 match &= !reg.IsPair();
1005 loc.reg = reg;
1007 Clobber(reg);
1008 FreeTemp(reg);
1022 RegStorage reg = AllocLiveReg(loc.s_reg_low, kAnyReg, true);
1023 if (reg.Valid()) {
1025 if (reg.IsPair()) {
1027 RegisterInfo* info_lo = GetRegInfo(reg.GetLow());
1028 RegisterInfo* info_hi = GetRegInfo(reg.GetHigh());
1034 RegisterInfo* info = GetRegInfo(reg);
1040 loc.reg = reg;
1042 Clobber(reg);
1043 FreeTemp(reg);
1064 /* If already in registers, we can assume proper form. Right reg class? */
1066 if (!RegClassMatches(reg_class, loc.reg)) {
1070 Clobber(loc.reg);
1072 loc.reg = new_regs;
1073 MarkWide(loc.reg);
1083 loc.reg = AllocTypedTempWide(loc.fp, reg_class);
1084 MarkWide(loc.reg);
1107 if (!RegClassMatches(reg_class, loc.reg)) {
1110 // Clobber the old reg.
1111 Clobber(loc.reg);
1113 loc.reg = new_reg;
1122 loc.reg = AllocTypedTemp(loc.fp, reg_class);
1330 // Note that we fall back to sorting on reg so we get stable output on differing qsort
1370 * reg.
1408 RegStorage reg = RegStorage::InvalidReg();
1421 reg = AllocPreservedSingle(low_sreg);
1424 reg = AllocPreservedFpReg(low_sreg);
1426 if (!reg.Valid()) {
1438 RegStorage reg = AllocPreservedCoreReg(low_sreg);
1439 if (!reg.Valid()) {
1452 RegStorage reg = RegStorage::InvalidReg();
1459 reg = RegStorage::FloatSolo64(RegStorage::RegNum(reg_num) >> 1);
1463 reg = wide ? RegStorage::FloatSolo64(reg_num) : RegStorage::FloatSolo32(reg_num);
1469 reg = RegStorage(RegStorage::k64BitPair, reg_num, high_reg);
1472 reg = wide ? RegStorage::Solo64(reg_num) : RegStorage::Solo32(reg_num);
1475 if (reg.Valid()) {
1476 curr->reg = reg;
1507 Clobber(res.reg);
1508 LockTemp(res.reg);
1509 MarkWide(res.reg);
1521 Clobber(res.reg);
1523 MarkInUse(res.reg);
1525 LockTemp(res.reg);