Cross Reference: /art/compiler/dex/quick/x86/fp

Lines Matching refs:is_double
54       GenRemFP(rl_dest, rl_src1, rl_src2, false /* is_double */);
107       GenRemFP(rl_dest, rl_src1, rl_src2, true /* is_double */);
141 void X86Mir2Lir::GenLongToFP(RegLocation rl_dest, RegLocation rl_src, bool is_double) {
176   int opcode = is_double ? kX86Fstp64M : kX86Fstp32M;
177   int displacement = is_double ? dest_v_reg_offset + LOWORD_OFFSET : dest_v_reg_offset;
179   AnnotateDalvikRegAccess(fstp, displacement >> 2, false /* is_load */, is_double);
189   RegLocation rl_result = is_double ? UpdateLocWideTyped(rl_dest) : UpdateLocTyped(rl_dest);
198     if (is_double) {
280       GenLongToFP(rl_dest, rl_src, true /* is_double */);
288       GenLongToFP(rl_dest, rl_src, false /* is_double */);
361 void X86Mir2Lir::GenRemFP(RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2, bool is_double) {
368   rl_src1 = is_double ? UpdateLocWide(rl_src1) : UpdateLoc(rl_src1);
369   rl_src2 = is_double ? UpdateLocWide(rl_src2) : UpdateLoc(rl_src2);
387       StoreBaseDisp(rs_rSP, src1_v_reg_offset, rl_src1.reg, is_double ? k64 : k32,
398       StoreBaseDisp(rs_rSP, src2_v_reg_offset, rl_src2.reg, is_double ? k64 : k32,
403   int fld_opcode = is_double ? kX86Fld64M : kX86Fld32M;
409                           true /* is_load */, is_double /* is64bit */);
414                           true /* is_load */, is_double /* is64bit */);
439   int opcode = is_double ? kX86Fst64M : kX86Fst32M;
441   AnnotateDalvikRegAccess(fst, displacement >> 2, false /* is_load */, is_double /* is64bit */);
454   RegLocation rl_result = is_double ? UpdateLocWideTyped(rl_dest) : UpdateLocTyped(rl_dest);
457     if (is_double) {
513                                      bool is_double) {
519   if (is_double) {
731 bool X86Mir2Lir::GenInlinedMinMaxFP(CallInfo* info, bool is_min, bool is_double) {
732   if (is_double) {