Lines Matching defs:second

2113   Location second = locations->InAt(1);
2118 if (second.IsRegister()) {
2120 __ addl(out.AsRegister<CpuRegister>(), second.AsRegister<CpuRegister>());
2123 first.AsRegister<CpuRegister>(), second.AsRegister<CpuRegister>(), TIMES_1, 0));
2125 } else if (second.IsConstant()) {
2128 Immediate(second.GetConstant()->AsIntConstant()->GetValue()));
2131 first.AsRegister<CpuRegister>(), second.GetConstant()->AsIntConstant()->GetValue()));
2135 __ addl(first.AsRegister<CpuRegister>(), Address(CpuRegister(RSP), second.GetStackIndex()));
2141 if (second.IsRegister()) {
2143 __ addq(out.AsRegister<CpuRegister>(), second.AsRegister<CpuRegister>());
2146 first.AsRegister<CpuRegister>(), second.AsRegister<CpuRegister>(), TIMES_1, 0));
2149 DCHECK(second.IsConstant());
2150 int64_t value = second.GetConstant()->AsLongConstant()->GetValue();
2164 if (second.IsFpuRegister()) {
2165 __ addss(first.AsFpuRegister<XmmRegister>(), second.AsFpuRegister<XmmRegister>());
2166 } else if (second.IsConstant()) {
2168 codegen_->LiteralFloatAddress(second.GetConstant()->AsFloatConstant()->GetValue()));
2170 DCHECK(second.IsStackSlot());
2172 Address(CpuRegister(RSP), second.GetStackIndex()));
2178 if (second.IsFpuRegister()) {
2179 __ addsd(first.AsFpuRegister<XmmRegister>(), second.AsFpuRegister<XmmRegister>());
2180 } else if (second.IsConstant()) {
2182 codegen_->LiteralDoubleAddress(second.GetConstant()->AsDoubleConstant()->GetValue()));
2184 DCHECK(second.IsDoubleStackSlot());
2186 Address(CpuRegister(RSP), second.GetStackIndex()));
2227 Location second = locations->InAt(1);
2231 if (second.IsRegister()) {
2232 __ subl(first.AsRegister<CpuRegister>(), second.AsRegister<CpuRegister>());
2233 } else if (second.IsConstant()) {
2234 Immediate imm(second.GetConstant()->AsIntConstant()->GetValue());
2237 __ subl(first.AsRegister<CpuRegister>(), Address(CpuRegister(RSP), second.GetStackIndex()));
2242 if (second.IsConstant()) {
2243 int64_t value = second.GetConstant()->AsLongConstant()->GetValue();
2247 __ subq(first.AsRegister<CpuRegister>(), second.AsRegister<CpuRegister>());
2253 if (second.IsFpuRegister()) {
2254 __ subss(first.AsFpuRegister<XmmRegister>(), second.AsFpuRegister<XmmRegister>());
2255 } else if (second.IsConstant()) {
2257 codegen_->LiteralFloatAddress(second.GetConstant()->AsFloatConstant()->GetValue()));
2259 DCHECK(second.IsStackSlot());
2261 Address(CpuRegister(RSP), second.GetStackIndex()));
2267 if (second.IsFpuRegister()) {
2268 __ subsd(first.AsFpuRegister<XmmRegister>(), second.AsFpuRegister<XmmRegister>());
2269 } else if (second.IsConstant()) {
2271 codegen_->LiteralDoubleAddress(second.GetConstant()->AsDoubleConstant()->GetValue()));
2273 DCHECK(second.IsDoubleStackSlot());
2275 Address(CpuRegister(RSP), second.GetStackIndex()));
2322 Location second = locations->InAt(1);
2326 if (second.IsRegister()) {
2327 __ imull(first.AsRegister<CpuRegister>(), second.AsRegister<CpuRegister>());
2328 } else if (second.IsConstant()) {
2329 Immediate imm(second.GetConstant()->AsIntConstant()->GetValue());
2332 DCHECK(second.IsStackSlot());
2334 Address(CpuRegister(RSP), second.GetStackIndex()));
2339 if (second.IsConstant()) {
2340 int64_t value = second.GetConstant()->AsLongConstant()->GetValue();
2347 __ imulq(first.AsRegister<CpuRegister>(), second.AsRegister<CpuRegister>());
2354 if (second.IsFpuRegister()) {
2355 __ mulss(first.AsFpuRegister<XmmRegister>(), second.AsFpuRegister<XmmRegister>());
2356 } else if (second.IsConstant()) {
2358 codegen_->LiteralFloatAddress(second.GetConstant()->AsFloatConstant()->GetValue()));
2360 DCHECK(second.IsStackSlot());
2362 Address(CpuRegister(RSP), second.GetStackIndex()));
2369 if (second.IsFpuRegister()) {
2370 __ mulsd(first.AsFpuRegister<XmmRegister>(), second.AsFpuRegister<XmmRegister>());
2371 } else if (second.IsConstant()) {
2373 codegen_->LiteralDoubleAddress(second.GetConstant()->AsDoubleConstant()->GetValue()));
2375 DCHECK(second.IsDoubleStackSlot());
2377 Address(CpuRegister(RSP), second.GetStackIndex()));
2415 Location second = locations->InAt(1);
2423 PushOntoFPStack(second, elem_size, 2 * elem_size, is_float);
2466 Location second = locations->InAt(1);
2467 DCHECK(second.IsConstant());
2471 int64_t imm = Int64FromConstant(second.GetConstant());
2507 Location second = locations->InAt(1);
2512 int64_t imm = Int64FromConstant(second.GetConstant());
2553 Location second = locations->InAt(1);
2575 int imm = second.GetConstant()->AsIntConstant()->GetValue();
2618 int64_t imm = second.GetConstant()->AsLongConstant()->GetValue();
2680 Location second = locations->InAt(1);
2685 if (second.IsConstant()) {
2686 int64_t imm = Int64FromConstant(second.GetConstant());
2704 CpuRegister second_reg = second.AsRegister<CpuRegister>();
2763 Location second = locations->InAt(1);
2775 if (second.IsFpuRegister()) {
2776 __ divss(first.AsFpuRegister<XmmRegister>(), second.AsFpuRegister<XmmRegister>());
2777 } else if (second.IsConstant()) {
2779 codegen_->LiteralFloatAddress(second.GetConstant()->AsFloatConstant()->GetValue()));
2781 DCHECK(second.IsStackSlot());
2783 Address(CpuRegister(RSP), second.GetStackIndex()));
2789 if (second.IsFpuRegister()) {
2790 __ divsd(first.AsFpuRegister<XmmRegister>(), second.AsFpuRegister<XmmRegister>());
2791 } else if (second.IsConstant()) {
2793 codegen_->LiteralDoubleAddress(second.GetConstant()->AsDoubleConstant()->GetValue()));
2795 DCHECK(second.IsDoubleStackSlot());
2797 Address(CpuRegister(RSP), second.GetStackIndex()));
2938 Location second = locations->InAt(1);
2942 if (second.IsRegister()) {
2943 CpuRegister second_reg = second.AsRegister<CpuRegister>();
2952 Immediate imm(second.GetConstant()->AsIntConstant()->GetValue() & kMaxIntShiftValue);
2964 if (second.IsRegister()) {
2965 CpuRegister second_reg = second.AsRegister<CpuRegister>();
2974 Immediate imm(second.GetConstant()->AsIntConstant()->GetValue() & kMaxLongShiftValue);
4352 Location second = locations->InAt(1);
4356 if (second.IsRegister()) {
4358 __ andl(first.AsRegister<CpuRegister>(), second.AsRegister<CpuRegister>());
4360 __ orl(first.AsRegister<CpuRegister>(), second.AsRegister<CpuRegister>());
4363 __ xorl(first.AsRegister<CpuRegister>(), second.AsRegister<CpuRegister>());
4365 } else if (second.IsConstant()) {
4366 Immediate imm(second.GetConstant()->AsIntConstant()->GetValue());
4376 Address address(CpuRegister(RSP), second.GetStackIndex());
4391 if (second.IsConstant()) {
4393 value = second.GetConstant()->AsLongConstant()->GetValue();
4404 } else if (second.IsDoubleStackSlot()) {
4405 __ andq(first_reg, Address(CpuRegister(RSP), second.GetStackIndex()));
4407 __ andq(first_reg, second.AsRegister<CpuRegister>());
4416 } else if (second.IsDoubleStackSlot()) {
4417 __ orq(first_reg, Address(CpuRegister(RSP), second.GetStackIndex()));
4419 __ orq(first_reg, second.AsRegister<CpuRegister>());
4429 } else if (second.IsDoubleStackSlot()) {
4430 __ xorq(first_reg, Address(CpuRegister(RSP), second.GetStackIndex()));
4432 __ xorq(first_reg, second.AsRegister<CpuRegister>());