Lines Matching defs:rm

183 void Arm32Assembler::mul(Register rd, Register rn, Register rm, Condition cond) {
184 // Assembler registers rd, rn, rm are encoded as rn, rm, rs.
185 EmitMulOp(cond, 0, R0, rd, rn, rm);
189 void Arm32Assembler::mla(Register rd, Register rn, Register rm, Register ra,
191 // Assembler registers rd, rn, rm, ra are encoded as rn, rm, rs, rd.
192 EmitMulOp(cond, B21, ra, rd, rn, rm);
196 void Arm32Assembler::mls(Register rd, Register rn, Register rm, Register ra,
198 // Assembler registers rd, rn, rm, ra are encoded as rn, rm, rs, rd.
199 EmitMulOp(cond, B22 | B21, ra, rd, rn, rm);
204 Register rm, Condition cond) {
205 // Assembler registers rd_lo, rd_hi, rn, rm are encoded as rd, rn, rm, rs.
206 EmitMulOp(cond, B23, rd_lo, rd_hi, rn, rm);
210 void Arm32Assembler::sdiv(Register rd, Register rn, Register rm, Condition cond) {
213 CHECK_NE(rm, kNoRegister);
220 (static_cast<int32_t>(rm) << 8) |
226 void Arm32Assembler::udiv(Register rd, Register rn, Register rm, Condition cond) {
229 CHECK_NE(rm, kNoRegister);
236 (static_cast<int32_t>(rm) << 8) |
687 Register rm,
696 static_cast<int32_t>(rm);
704 Register rm,
714 static_cast<int32_t>(rm);
731 void Arm32Assembler::clz(Register rd, Register rm, Condition cond) {
733 CHECK_NE(rm, kNoRegister);
736 CHECK_NE(rm, PC);
740 (0xf << 8) | B4 | static_cast<int32_t>(rm);
765 Register rm, Register rs) {
768 CHECK_NE(rm, kNoRegister);
777 (static_cast<int32_t>(rm) << kRmShift);
1153 void Arm32Assembler::Lsl(Register rd, Register rm, uint32_t shift_imm,
1157 movs(rd, ShifterOperand(rm, LSL, shift_imm), cond);
1159 mov(rd, ShifterOperand(rm, LSL, shift_imm), cond);
1164 void Arm32Assembler::Lsr(Register rd, Register rm, uint32_t shift_imm,
1169 movs(rd, ShifterOperand(rm, LSR, shift_imm), cond);
1171 mov(rd, ShifterOperand(rm, LSR, shift_imm), cond);
1176 void Arm32Assembler::Asr(Register rd, Register rm, uint32_t shift_imm,
1181 movs(rd, ShifterOperand(rm, ASR, shift_imm), cond);
1183 mov(rd, ShifterOperand(rm, ASR, shift_imm), cond);
1188 void Arm32Assembler::Ror(Register rd, Register rm, uint32_t shift_imm,
1192 movs(rd, ShifterOperand(rm, ROR, shift_imm), cond);
1194 mov(rd, ShifterOperand(rm, ROR, shift_imm), cond);
1198 void Arm32Assembler::Rrx(Register rd, Register rm, bool setcc, Condition cond) {
1200 movs(rd, ShifterOperand(rm, ROR, 0), cond);
1202 mov(rd, ShifterOperand(rm, ROR, 0), cond);
1207 void Arm32Assembler::Lsl(Register rd, Register rm, Register rn,
1210 movs(rd, ShifterOperand(rm, LSL, rn), cond);
1212 mov(rd, ShifterOperand(rm, LSL, rn), cond);
1217 void Arm32Assembler::Lsr(Register rd, Register rm, Register rn,
1220 movs(rd, ShifterOperand(rm, LSR, rn), cond);
1222 mov(rd, ShifterOperand(rm, LSR, rn), cond);
1227 void Arm32Assembler::Asr(Register rd, Register rm, Register rn,
1230 movs(rd, ShifterOperand(rm, ASR, rn), cond);
1232 mov(rd, ShifterOperand(rm, ASR, rn), cond);
1237 void Arm32Assembler::Ror(Register rd, Register rm, Register rn,
1240 movs(rd, ShifterOperand(rm, ROR, rn), cond);
1242 mov(rd, ShifterOperand(rm, ROR, rn), cond);
1270 void Arm32Assembler::blx(Register rm, Condition cond) {
1271 CHECK_NE(rm, kNoRegister);
1275 (static_cast<int32_t>(rm) << kRmShift);
1280 void Arm32Assembler::bx(Register rm, Condition cond) {
1281 CHECK_NE(rm, kNoRegister);
1285 (static_cast<int32_t>(rm) << kRmShift);
1310 void Arm32Assembler::Mov(Register rd, Register rm, Condition cond) {
1311 if (rd != rm) {
1312 mov(rd, ShifterOperand(rm), cond);