Cross Reference: /art/compiler/utils/x86_64/assembler_x86

Lines Matching refs:reg
95   bool IsRegister(CpuRegister reg) const {
97         && ((encoding_[0] & 0x07) == reg.LowBits())  // Register codes match.
98         && (reg.NeedsRex() == ((rex_ & 1) != 0));  // REX.000B bits match.
154   explicit Operand(CpuRegister reg) : rex_(0), length_(0), fixup_(nullptr) { SetModRM(3, reg); }
313   void call(CpuRegister reg);
317   void pushq(CpuRegister reg);
321   void popq(CpuRegister reg);
473   void xchgl(CpuRegister reg, const Address& address);
477   void cmpl(CpuRegister reg, const Immediate& imm);
479   void cmpl(CpuRegister reg, const Address& address);
480   void cmpl(const Address& address, CpuRegister reg);
489   void testl(CpuRegister reg, const Address& address);
490   void testl(CpuRegister reg, const Immediate& imm);
493   void testq(CpuRegister reg, const Address& address);
497   void andl(CpuRegister reg, const Address& address);
500   void andq(CpuRegister reg, const Address& address);
504   void orl(CpuRegister reg, const Address& address);
507   void orq(CpuRegister reg, const Address& address);
511   void xorl(CpuRegister reg, const Address& address);
514   void xorq(CpuRegister reg, const Address& address);
517   void addl(CpuRegister reg, const Immediate& imm);
518   void addl(CpuRegister reg, const Address& address);
519   void addl(const Address& address, CpuRegister reg);
522   void addq(CpuRegister reg, const Immediate& imm);
527   void subl(CpuRegister reg, const Immediate& imm);
528   void subl(CpuRegister reg, const Address& address);
530   void subq(CpuRegister reg, const Immediate& imm);
537   void idivl(CpuRegister reg);
538   void idivq(CpuRegister reg);
541   void imull(CpuRegister reg, const Immediate& imm);
542   void imull(CpuRegister reg, const Address& address);
546   void imulq(CpuRegister reg, const Immediate& imm);
547   void imulq(CpuRegister reg, const Address& address);
548   void imulq(CpuRegister dst, CpuRegister reg, const Immediate& imm);
550   void imull(CpuRegister reg);
553   void mull(CpuRegister reg);
556   void shll(CpuRegister reg, const Immediate& imm);
558   void shrl(CpuRegister reg, const Immediate& imm);
560   void sarl(CpuRegister reg, const Immediate& imm);
563   void shlq(CpuRegister reg, const Immediate& imm);
565   void shrq(CpuRegister reg, const Immediate& imm);
567   void sarq(CpuRegister reg, const Immediate& imm);
570   void negl(CpuRegister reg);
571   void negq(CpuRegister reg);
573   void notl(CpuRegister reg);
574   void notq(CpuRegister reg);
588   void jmp(CpuRegister reg);
593   void cmpxchgl(const Address& address, CpuRegister reg);
594   void cmpxchgq(const Address& address, CpuRegister reg);
611   void AddImmediate(CpuRegister reg, const Immediate& imm);
615   void LockCmpxchgl(const Address& address, CpuRegister reg) {
616     lock()->cmpxchgl(address, reg);
619   void LockCmpxchgq(const Address& address, CpuRegister reg) {
620     lock()->cmpxchgq(address, reg);
774   void EmitRegisterOperand(uint8_t rm, uint8_t reg);
775   void EmitXmmRegisterOperand(uint8_t rm, XmmRegister reg);
786   void EmitGenericShift(bool wide, int rm, CpuRegister reg, const Immediate& imm);
792   // Emit a rex prefix byte if necessary for reg. ie if reg is a register in the range R8 to R15.
793   void EmitOptionalRex32(CpuRegister reg);
804   void EmitRex64(CpuRegister reg);
837 inline void X86_64Assembler::EmitRegisterOperand(uint8_t rm, uint8_t reg) {
840   buffer_.Emit<uint8_t>((0xC0 | (reg & 7)) + (rm << 3));
843 inline void X86_64Assembler::EmitXmmRegisterOperand(uint8_t rm, XmmRegister reg) {
844   EmitRegisterOperand(rm, static_cast<uint8_t>(reg.AsFloatRegister()));